
FEB_4114 03.02.25 16:11:21
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16:11:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 16:11:21:ST3_Shared:INFO: FEB-Microcable 16:11:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 16:11:21:febtest:INFO: Testing FEB with SN 4114 16:11:23:smx_tester:INFO: Scanning setup 16:11:23:elinks:INFO: Disabling clock on downlink 0 16:11:23:elinks:INFO: Disabling clock on downlink 1 16:11:23:elinks:INFO: Disabling clock on downlink 2 16:11:23:elinks:INFO: Disabling clock on downlink 3 16:11:23:elinks:INFO: Disabling clock on downlink 4 16:11:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:11:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 16:11:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:11:23:elinks:INFO: Disabling clock on downlink 0 16:11:23:elinks:INFO: Disabling clock on downlink 1 16:11:23:elinks:INFO: Disabling clock on downlink 2 16:11:23:elinks:INFO: Disabling clock on downlink 3 16:11:23:elinks:INFO: Disabling clock on downlink 4 16:11:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:11:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 16:11:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:11:23:elinks:INFO: Disabling clock on downlink 0 16:11:23:elinks:INFO: Disabling clock on downlink 1 16:11:23:elinks:INFO: Disabling clock on downlink 2 16:11:23:elinks:INFO: Disabling clock on downlink 3 16:11:23:elinks:INFO: Disabling clock on downlink 4 16:11:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:11:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:11:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 16:11:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 16:11:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 16:11:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 16:11:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 16:11:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 16:11:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 16:11:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 16:11:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:11:23:elinks:INFO: Disabling clock on downlink 0 16:11:23:elinks:INFO: Disabling clock on downlink 1 16:11:23:elinks:INFO: Disabling clock on downlink 2 16:11:23:elinks:INFO: Disabling clock on downlink 3 16:11:23:elinks:INFO: Disabling clock on downlink 4 16:11:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:11:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 16:11:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:11:23:elinks:INFO: Disabling clock on downlink 0 16:11:23:elinks:INFO: Disabling clock on downlink 1 16:11:23:elinks:INFO: Disabling clock on downlink 2 16:11:23:elinks:INFO: Disabling clock on downlink 3 16:11:23:elinks:INFO: Disabling clock on downlink 4 16:11:23:setup_element:INFO: Checking SOS, encoding_mode: SOS 16:11:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 16:11:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 16:11:23:setup_element:INFO: Scanning clock phase 16:11:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:11:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 16:11:24:setup_element:INFO: Clock phase scan results for group 0, downlink 2 16:11:24:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________ Clock Delay: 40 16:11:24:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________ Clock Delay: 40 16:11:24:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXX_____ Clock Delay: 32 16:11:24:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXX_____ Clock Delay: 32 16:11:24:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXX____ Clock Delay: 32 16:11:24:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXX____ Clock Delay: 32 16:11:24:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXX____ Clock Delay: 33 16:11:24:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXX____ Clock Delay: 33 16:11:24:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 16:11:24:setup_element:INFO: Scanning data phases 16:11:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:11:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 16:11:29:setup_element:INFO: Data phase scan results for group 0, downlink 2 16:11:29:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________ Data delay found: 30 16:11:29:setup_element:INFO: Eye window for uplink 25: ___________XXXX_________________________ Data delay found: 32 16:11:29:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________ Data delay found: 29 16:11:29:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXX______________________ Data delay found: 34 16:11:29:setup_element:INFO: Eye window for uplink 28: ______________XXXXX_____________________ Data delay found: 36 16:11:29:setup_element:INFO: Eye window for uplink 29: ________________XXXXX___________________ Data delay found: 38 16:11:29:setup_element:INFO: Eye window for uplink 30: _________XXXXXXXXXXXX___________________ Data delay found: 34 16:11:29:setup_element:INFO: Eye window for uplink 31: _________XXXXXXXXXXXX___________________ Data delay found: 34 16:11:29:setup_element:INFO: Setting the data phase to 30 for uplink 24 16:11:29:setup_element:INFO: Setting the data phase to 32 for uplink 25 16:11:29:setup_element:INFO: Setting the data phase to 29 for uplink 26 16:11:29:setup_element:INFO: Setting the data phase to 34 for uplink 27 16:11:29:setup_element:INFO: Setting the data phase to 36 for uplink 28 16:11:29:setup_element:INFO: Setting the data phase to 38 for uplink 29 16:11:29:setup_element:INFO: Setting the data phase to 34 for uplink 30 16:11:29:setup_element:INFO: Setting the data phase to 34 for uplink 31 16:11:29:setup_element:INFO: Beginning SMX ASICs map scan 16:11:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:11:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 16:11:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 16:11:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 16:11:29:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 16:11:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 16:11:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 16:11:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 16:11:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 16:11:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 16:11:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 16:11:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 16:11:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 16:11:31:setup_element:INFO: Performing Elink synchronization 16:11:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 16:11:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 16:11:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 16:11:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 16:11:31:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 16:11:31:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 16:11:32:febtest:INFO: Init all SMX (CSA): 30 16:11:39:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 16:11:39:febtest:INFO: 30-01 | XA-000-09-004-005-007-011-15 | 34.6 | 1171.5 16:11:40:febtest:INFO: 28-03 | XA-000-09-004-005-013-020-07 | 28.2 | 1201.0 16:11:40:febtest:INFO: 26-05 | XA-000-09-004-005-016-021-12 | 34.6 | 1177.4 16:11:40:febtest:INFO: 24-07 | XA-000-09-004-005-010-022-15 | 34.6 | 1159.7 16:11:41:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 16:11:43:ST3_smx:INFO: chip: 30-1 34.556970 C 1183.292940 mV 16:11:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:11:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:11:43:ST3_smx:INFO: Electrons 16:11:43:ST3_smx:INFO: # loops 0 16:11:45:ST3_smx:INFO: # loops 1 16:11:47:ST3_smx:INFO: # loops 2 16:11:48:ST3_smx:INFO: Total # of broken channels: 0 16:11:48:ST3_smx:INFO: List of broken channels: [] 16:11:48:ST3_smx:INFO: Total # of broken channels: 0 16:11:48:ST3_smx:INFO: List of broken channels: [] 16:11:50:ST3_smx:INFO: chip: 28-3 28.225000 C 1212.728715 mV 16:11:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:11:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:11:50:ST3_smx:INFO: Electrons 16:11:50:ST3_smx:INFO: # loops 0 16:11:52:ST3_smx:INFO: # loops 1 16:11:53:ST3_smx:INFO: # loops 2 16:11:55:ST3_smx:INFO: Total # of broken channels: 0 16:11:55:ST3_smx:INFO: List of broken channels: [] 16:11:55:ST3_smx:INFO: Total # of broken channels: 0 16:11:55:ST3_smx:INFO: List of broken channels: [] 16:11:57:ST3_smx:INFO: chip: 26-5 34.556970 C 1189.190035 mV 16:11:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:11:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:11:57:ST3_smx:INFO: Electrons 16:11:57:ST3_smx:INFO: # loops 0 16:11:59:ST3_smx:INFO: # loops 1 16:12:00:ST3_smx:INFO: # loops 2 16:12:02:ST3_smx:INFO: Total # of broken channels: 0 16:12:02:ST3_smx:INFO: List of broken channels: [] 16:12:02:ST3_smx:INFO: Total # of broken channels: 0 16:12:02:ST3_smx:INFO: List of broken channels: [] 16:12:03:ST3_smx:INFO: chip: 24-7 37.726682 C 1171.483840 mV 16:12:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:12:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 16:12:03:ST3_smx:INFO: Electrons 16:12:03:ST3_smx:INFO: # loops 0 16:12:05:ST3_smx:INFO: # loops 1 16:12:07:ST3_smx:INFO: # loops 2 16:12:08:ST3_smx:INFO: Total # of broken channels: 0 16:12:08:ST3_smx:INFO: List of broken channels: [] 16:12:08:ST3_smx:INFO: Total # of broken channels: 0 16:12:08:ST3_smx:INFO: List of broken channels: [] 16:12:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 16:12:09:febtest:INFO: 30-01 | XA-000-09-004-005-007-011-15 | 34.6 | 1201.0 16:12:09:febtest:INFO: 28-03 | XA-000-09-004-005-013-020-07 | 28.2 | 1230.3 16:12:09:febtest:INFO: 26-05 | XA-000-09-004-005-016-021-12 | 34.6 | 1212.7 16:12:09:febtest:INFO: 24-07 | XA-000-09-004-005-010-022-15 | 40.9 | 1189.2 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_02_03-16_11_21 OPERATOR : Henrik; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4114| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '0.7384', '1.850', '1.3170'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9862', '1.850', '1.2840'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9731', '1.850', '0.2639']