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FEB_4115 13.02.25 09:24:07
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09:24:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:24:07:ST3_Shared:INFO: FEB-Microcable
09:24:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:24:07:febtest:INFO: Testing FEB with SN 4115
09:24:09:smx_tester:INFO: Scanning setup
09:24:09:elinks:INFO: Disabling clock on downlink 0
09:24:09:elinks:INFO: Disabling clock on downlink 1
09:24:09:elinks:INFO: Disabling clock on downlink 2
09:24:09:elinks:INFO: Disabling clock on downlink 3
09:24:09:elinks:INFO: Disabling clock on downlink 4
09:24:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:24:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:09:elinks:INFO: Disabling clock on downlink 0
09:24:09:elinks:INFO: Disabling clock on downlink 1
09:24:09:elinks:INFO: Disabling clock on downlink 2
09:24:09:elinks:INFO: Disabling clock on downlink 3
09:24:09:elinks:INFO: Disabling clock on downlink 4
09:24:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:24:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:09:elinks:INFO: Disabling clock on downlink 0
09:24:09:elinks:INFO: Disabling clock on downlink 1
09:24:09:elinks:INFO: Disabling clock on downlink 2
09:24:09:elinks:INFO: Disabling clock on downlink 3
09:24:09:elinks:INFO: Disabling clock on downlink 4
09:24:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:24:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:24:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:09:elinks:INFO: Disabling clock on downlink 0
09:24:09:elinks:INFO: Disabling clock on downlink 1
09:24:09:elinks:INFO: Disabling clock on downlink 2
09:24:09:elinks:INFO: Disabling clock on downlink 3
09:24:09:elinks:INFO: Disabling clock on downlink 4
09:24:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:24:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:09:elinks:INFO: Disabling clock on downlink 0
09:24:09:elinks:INFO: Disabling clock on downlink 1
09:24:09:elinks:INFO: Disabling clock on downlink 2
09:24:09:elinks:INFO: Disabling clock on downlink 3
09:24:09:elinks:INFO: Disabling clock on downlink 4
09:24:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:24:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:24:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:24:09:setup_element:INFO: Scanning clock phase
09:24:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:24:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:24:10:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:24:10:setup_element:INFO: Eye window for uplink 16: __________________________________________________________________________XXXXX_
Clock Delay: 36
09:24:10:setup_element:INFO: Eye window for uplink 17: __________________________________________________________________________XXXXX_
Clock Delay: 36
09:24:10:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:24:10:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:24:10:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:24:10:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:24:10:setup_element:INFO: Eye window for uplink 22: _________________________________________________________________________XXXXX__
Clock Delay: 35
09:24:10:setup_element:INFO: Eye window for uplink 23: _________________________________________________________________________XXXXX__
Clock Delay: 35
09:24:10:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
09:24:10:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
09:24:10:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:24:10:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:24:10:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________________XXXXX__
Clock Delay: 35
09:24:10:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________________XXXXX__
Clock Delay: 35
09:24:10:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________________XXXX__
Clock Delay: 35
09:24:10:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________________XXXX__
Clock Delay: 35
09:24:10:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
09:24:10:setup_element:INFO: Scanning data phases
09:24:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:24:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:24:15:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:24:15:setup_element:INFO: Eye window for uplink 16: XXXX__________________________________XX
Data delay found: 20
09:24:15:setup_element:INFO: Eye window for uplink 17: XX__________________________________XXXX
Data delay found: 18
09:24:15:setup_element:INFO: Eye window for uplink 18: __________________________________XXXX__
Data delay found: 15
09:24:15:setup_element:INFO: Eye window for uplink 19: ________________________________XXXX____
Data delay found: 13
09:24:15:setup_element:INFO: Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
09:24:15:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
09:24:15:setup_element:INFO: Eye window for uplink 22: XXX___________________________________XX
Data delay found: 20
09:24:15:setup_element:INFO: Eye window for uplink 23: __________________________________XXXX__
Data delay found: 15
09:24:15:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
09:24:15:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
09:24:15:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________
Data delay found: 29
09:24:15:setup_element:INFO: Eye window for uplink 27: __________XXXXXXX_______________________
Data delay found: 33
09:24:15:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
09:24:15:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
09:24:15:setup_element:INFO: Eye window for uplink 30: _______________XXXXX____________________
Data delay found: 37
09:24:15:setup_element:INFO: Eye window for uplink 31: ________________XXXXX___________________
Data delay found: 38
09:24:15:setup_element:INFO: Setting the data phase to 20 for uplink 16
09:24:15:setup_element:INFO: Setting the data phase to 18 for uplink 17
09:24:15:setup_element:INFO: Setting the data phase to 15 for uplink 18
09:24:15:setup_element:INFO: Setting the data phase to 13 for uplink 19
09:24:15:setup_element:INFO: Setting the data phase to 15 for uplink 20
09:24:15:setup_element:INFO: Setting the data phase to 15 for uplink 21
09:24:15:setup_element:INFO: Setting the data phase to 20 for uplink 22
09:24:15:setup_element:INFO: Setting the data phase to 15 for uplink 23
09:24:15:setup_element:INFO: Setting the data phase to 28 for uplink 24
09:24:15:setup_element:INFO: Setting the data phase to 31 for uplink 25
09:24:15:setup_element:INFO: Setting the data phase to 29 for uplink 26
09:24:15:setup_element:INFO: Setting the data phase to 33 for uplink 27
09:24:15:setup_element:INFO: Setting the data phase to 35 for uplink 28
09:24:15:setup_element:INFO: Setting the data phase to 37 for uplink 29
09:24:15:setup_element:INFO: Setting the data phase to 37 for uplink 30
09:24:15:setup_element:INFO: Setting the data phase to 38 for uplink 31
09:24:15:setup_element:INFO: Beginning SMX ASICs map scan
09:24:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:24:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:24:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:24:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:24:15:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:24:15:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:24:15:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:24:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:24:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:24:15:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:24:15:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:24:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:24:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:24:16:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:24:16:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:24:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:24:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:24:16:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:24:16:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:24:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:24:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:24:17:setup_element:INFO: Performing Elink synchronization
09:24:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:24:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:24:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:24:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:24:17:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:24:17:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:24:18:febtest:INFO: Init all SMX (CSA): 30
09:24:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:24:33:febtest:INFO: 23-00 | XA-000-09-004-005-017-008-06 | 40.9 | 1147.8
09:24:33:febtest:INFO: 30-01 | XA-000-09-004-005-008-008-11 | 47.3 | 1124.0
09:24:33:febtest:INFO: 21-02 | XA-000-09-004-005-017-009-06 | 28.2 | 1212.7
09:24:33:febtest:INFO: 28-03 | XA-000-09-004-005-005-008-12 | 37.7 | 1165.6
09:24:33:febtest:INFO: 19-04 | XA-000-09-004-005-014-009-14 | 50.4 | 1112.1
09:24:34:febtest:INFO: 26-05 | XA-000-09-004-005-005-007-12 | 34.6 | 1171.5
09:24:34:febtest:INFO: 17-06 | XA-000-09-004-005-002-010-04 | 40.9 | 1153.7
09:24:34:febtest:INFO: 24-07 | XA-000-09-004-005-014-008-14 | 37.7 | 1159.7
09:24:35:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:24:37:ST3_smx:INFO: chip: 23-0 40.898880 C 1159.654860 mV
09:24:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:24:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:24:37:ST3_smx:INFO: Electrons
09:24:37:ST3_smx:INFO: # loops 0
09:24:39:ST3_smx:INFO: # loops 1
09:24:40:ST3_smx:INFO: # loops 2
09:24:42:ST3_smx:INFO: Total # of broken channels: 0
09:24:42:ST3_smx:INFO: List of broken channels: []
09:24:42:ST3_smx:INFO: Total # of broken channels: 16
09:24:42:ST3_smx:INFO: List of broken channels: [90, 92, 96, 98, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122]
09:24:44:ST3_smx:INFO: chip: 30-1 47.250730 C 1135.937260 mV
09:24:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:24:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:24:44:ST3_smx:INFO: Electrons
09:24:44:ST3_smx:INFO: # loops 0
09:24:46:ST3_smx:INFO: # loops 1
09:24:47:ST3_smx:INFO: # loops 2
09:24:49:ST3_smx:INFO: Total # of broken channels: 0
09:24:49:ST3_smx:INFO: List of broken channels: []
09:24:49:ST3_smx:INFO: Total # of broken channels: 0
09:24:49:ST3_smx:INFO: List of broken channels: []
09:24:50:ST3_smx:INFO: chip: 21-2 28.225000 C 1236.187875 mV
09:24:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:24:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:24:50:ST3_smx:INFO: Electrons
09:24:50:ST3_smx:INFO: # loops 0
09:24:52:ST3_smx:INFO: # loops 1
09:24:54:ST3_smx:INFO: # loops 2
09:24:55:ST3_smx:INFO: Total # of broken channels: 0
09:24:55:ST3_smx:INFO: List of broken channels: []
09:24:55:ST3_smx:INFO: Total # of broken channels: 12
09:24:55:ST3_smx:INFO: List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22]
09:24:57:ST3_smx:INFO: chip: 28-3 37.726682 C 1177.390875 mV
09:24:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:24:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:24:57:ST3_smx:INFO: Electrons
09:24:57:ST3_smx:INFO: # loops 0
09:24:59:ST3_smx:INFO: # loops 1
09:25:00:ST3_smx:INFO: # loops 2
09:25:02:ST3_smx:INFO: Total # of broken channels: 0
09:25:02:ST3_smx:INFO: List of broken channels: []
09:25:02:ST3_smx:INFO: Total # of broken channels: 15
09:25:02:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29]
09:25:04:ST3_smx:INFO: chip: 19-4 50.430383 C 1124.048640 mV
09:25:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:04:ST3_smx:INFO: Electrons
09:25:04:ST3_smx:INFO: # loops 0
09:25:05:ST3_smx:INFO: # loops 1
09:25:07:ST3_smx:INFO: # loops 2
09:25:08:ST3_smx:INFO: Total # of broken channels: 0
09:25:08:ST3_smx:INFO: List of broken channels: []
09:25:08:ST3_smx:INFO: Total # of broken channels: 0
09:25:08:ST3_smx:INFO: List of broken channels: []
09:25:10:ST3_smx:INFO: chip: 26-5 37.726682 C 1183.292940 mV
09:25:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:10:ST3_smx:INFO: Electrons
09:25:10:ST3_smx:INFO: # loops 0
09:25:12:ST3_smx:INFO: # loops 1
09:25:13:ST3_smx:INFO: # loops 2
09:25:15:ST3_smx:INFO: Total # of broken channels: 0
09:25:15:ST3_smx:INFO: List of broken channels: []
09:25:15:ST3_smx:INFO: Total # of broken channels: 0
09:25:15:ST3_smx:INFO: List of broken channels: []
09:25:17:ST3_smx:INFO: chip: 17-6 40.898880 C 1159.654860 mV
09:25:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:17:ST3_smx:INFO: Electrons
09:25:17:ST3_smx:INFO: # loops 0
09:25:18:ST3_smx:INFO: # loops 1
09:25:20:ST3_smx:INFO: # loops 2
09:25:21:ST3_smx:INFO: Total # of broken channels: 0
09:25:21:ST3_smx:INFO: List of broken channels: []
09:25:21:ST3_smx:INFO: Total # of broken channels: 0
09:25:21:ST3_smx:INFO: List of broken channels: []
09:25:23:ST3_smx:INFO: chip: 24-7 40.898880 C 1171.483840 mV
09:25:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:25:23:ST3_smx:INFO: Electrons
09:25:23:ST3_smx:INFO: # loops 0
09:25:24:ST3_smx:INFO: # loops 1
09:25:26:ST3_smx:INFO: # loops 2
09:25:27:ST3_smx:INFO: Total # of broken channels: 0
09:25:27:ST3_smx:INFO: List of broken channels: []
09:25:27:ST3_smx:INFO: Total # of broken channels: 0
09:25:27:ST3_smx:INFO: List of broken channels: []
09:25:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:25:28:febtest:INFO: 23-00 | XA-000-09-004-005-017-008-06 | 40.9 | 1177.4
09:25:28:febtest:INFO: 30-01 | XA-000-09-004-005-008-008-11 | 50.4 | 1159.7
09:25:28:febtest:INFO: 21-02 | XA-000-09-004-005-017-009-06 | 25.1 | 1329.2
09:25:28:febtest:INFO: 28-03 | XA-000-09-004-005-005-008-12 | 40.9 | 1195.1
09:25:29:febtest:INFO: 19-04 | XA-000-09-004-005-014-009-14 | 53.6 | 1147.8
09:25:29:febtest:INFO: 26-05 | XA-000-09-004-005-005-007-12 | 37.7 | 1206.9
09:25:29:febtest:INFO: 17-06 | XA-000-09-004-005-002-010-04 | 44.1 | 1183.3
09:25:29:febtest:INFO: 24-07 | XA-000-09-004-005-014-008-14 | 40.9 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_13-09_24_07
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4115| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '1.4950', '1.849', '2.6040']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9700', '1.850', '2.4880']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9770', '1.850', '0.5275']