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FEB_4116 17.02.25 15:21:10
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15:21:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:21:10:ST3_Shared:INFO: FEB-Microcable
15:21:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:21:10:febtest:INFO: Testing FEB with SN 4116
15:21:11:smx_tester:INFO: Scanning setup
15:21:11:elinks:INFO: Disabling clock on downlink 0
15:21:11:elinks:INFO: Disabling clock on downlink 1
15:21:11:elinks:INFO: Disabling clock on downlink 2
15:21:11:elinks:INFO: Disabling clock on downlink 3
15:21:11:elinks:INFO: Disabling clock on downlink 4
15:21:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:21:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:21:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:21:12:elinks:INFO: Disabling clock on downlink 0
15:21:12:elinks:INFO: Disabling clock on downlink 1
15:21:12:elinks:INFO: Disabling clock on downlink 2
15:21:12:elinks:INFO: Disabling clock on downlink 3
15:21:12:elinks:INFO: Disabling clock on downlink 4
15:21:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:21:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:21:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:21:12:elinks:INFO: Disabling clock on downlink 0
15:21:12:elinks:INFO: Disabling clock on downlink 1
15:21:12:elinks:INFO: Disabling clock on downlink 2
15:21:12:elinks:INFO: Disabling clock on downlink 3
15:21:12:elinks:INFO: Disabling clock on downlink 4
15:21:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:21:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:21:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:21:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:21:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:21:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:21:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:21:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:21:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:21:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:21:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:21:12:elinks:INFO: Disabling clock on downlink 0
15:21:12:elinks:INFO: Disabling clock on downlink 1
15:21:12:elinks:INFO: Disabling clock on downlink 2
15:21:12:elinks:INFO: Disabling clock on downlink 3
15:21:12:elinks:INFO: Disabling clock on downlink 4
15:21:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:21:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:21:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:21:12:elinks:INFO: Disabling clock on downlink 0
15:21:12:elinks:INFO: Disabling clock on downlink 1
15:21:12:elinks:INFO: Disabling clock on downlink 2
15:21:12:elinks:INFO: Disabling clock on downlink 3
15:21:12:elinks:INFO: Disabling clock on downlink 4
15:21:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:21:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:21:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:21:12:setup_element:INFO: Scanning clock phase
15:21:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:21:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:21:12:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:21:12:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
15:21:12:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
15:21:12:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
15:21:12:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
15:21:12:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________X________
Clock Delay: 31
15:21:12:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________X________
Clock Delay: 31
15:21:12:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXX_____
Clock Delay: 32
15:21:12:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXX_____
Clock Delay: 32
15:21:12:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
15:21:12:setup_element:INFO: Scanning data phases
15:21:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:21:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:21:17:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:21:17:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
15:21:17:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
15:21:17:setup_element:INFO: Eye window for uplink 26: _________XXXXX__________________________
Data delay found: 31
15:21:17:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
15:21:17:setup_element:INFO: Eye window for uplink 28: ________________XXXX____________XXXXXXXX
Data delay found: 7
15:21:18:setup_element:INFO: Eye window for uplink 29: __________________XXXXX_________XXXXXXXX
Data delay found: 8
15:21:18:setup_element:INFO: Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
15:21:18:setup_element:INFO: Eye window for uplink 31: ______________XXXX______________________
Data delay found: 35
15:21:18:setup_element:INFO: Setting the data phase to 28 for uplink 24
15:21:18:setup_element:INFO: Setting the data phase to 31 for uplink 25
15:21:18:setup_element:INFO: Setting the data phase to 31 for uplink 26
15:21:18:setup_element:INFO: Setting the data phase to 35 for uplink 27
15:21:18:setup_element:INFO: Setting the data phase to 7 for uplink 28
15:21:18:setup_element:INFO: Setting the data phase to 8 for uplink 29
15:21:18:setup_element:INFO: Setting the data phase to 35 for uplink 30
15:21:18:setup_element:INFO: Setting the data phase to 35 for uplink 31
15:21:18:setup_element:INFO: Beginning SMX ASICs map scan
15:21:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:21:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:21:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:21:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:21:18:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
15:21:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:21:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:21:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:21:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:21:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:21:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:21:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:21:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:21:20:setup_element:INFO: Performing Elink synchronization
15:21:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:21:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:21:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:21:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:21:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:21:20:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:21:21:febtest:INFO: Init all SMX (CSA): 30
15:21:29:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:21:29:febtest:INFO: 30-01 | XA-000-09-004-002-009-006-12 | 31.4 | 1189.2
15:21:29:febtest:INFO: 28-03 | XA-000-09-004-002-012-002-07 | 53.6 | 1112.1
15:21:29:febtest:INFO: 26-05 | XA-000-09-004-002-012-005-07 | 50.4 | 1124.0
15:21:29:febtest:INFO: 24-07 | XA-000-09-004-002-006-006-08 | 40.9 | 1153.7
15:21:30:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:21:32:ST3_smx:INFO: chip: 30-1 31.389742 C 1200.969315 mV
15:21:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:21:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:21:32:ST3_smx:INFO: Electrons
15:21:32:ST3_smx:INFO: # loops 0
15:21:34:ST3_smx:INFO: # loops 1
15:21:36:ST3_smx:INFO: # loops 2
15:21:38:ST3_smx:INFO: Total # of broken channels: 0
15:21:38:ST3_smx:INFO: List of broken channels: []
15:21:38:ST3_smx:INFO: Total # of broken channels: 0
15:21:38:ST3_smx:INFO: List of broken channels: []
15:21:40:ST3_smx:INFO: chip: 28-3 53.612520 C 1118.096875 mV
15:21:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:21:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:21:40:ST3_smx:INFO: Electrons
15:21:40:ST3_smx:INFO: # loops 0
15:21:41:ST3_smx:INFO: # loops 1
15:21:43:ST3_smx:INFO: # loops 2
15:21:45:ST3_smx:INFO: Total # of broken channels: 0
15:21:45:ST3_smx:INFO: List of broken channels: []
15:21:45:ST3_smx:INFO: Total # of broken channels: 0
15:21:45:ST3_smx:INFO: List of broken channels: []
15:21:47:ST3_smx:INFO: chip: 26-5 50.430383 C 1129.995435 mV
15:21:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:21:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:21:47:ST3_smx:INFO: Electrons
15:21:47:ST3_smx:INFO: # loops 0
15:21:48:ST3_smx:INFO: # loops 1
15:21:50:ST3_smx:INFO: # loops 2
15:21:51:ST3_smx:INFO: Total # of broken channels: 0
15:21:51:ST3_smx:INFO: List of broken channels: []
15:21:51:ST3_smx:INFO: Total # of broken channels: 0
15:21:51:ST3_smx:INFO: List of broken channels: []
15:21:53:ST3_smx:INFO: chip: 24-7 44.073563 C 1165.571835 mV
15:21:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:21:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:21:53:ST3_smx:INFO: Electrons
15:21:53:ST3_smx:INFO: # loops 0
15:21:55:ST3_smx:INFO: # loops 1
15:21:57:ST3_smx:INFO: # loops 2
15:21:59:ST3_smx:INFO: Total # of broken channels: 0
15:21:59:ST3_smx:INFO: List of broken channels: []
15:21:59:ST3_smx:INFO: Total # of broken channels: 0
15:21:59:ST3_smx:INFO: List of broken channels: []
15:21:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:21:59:febtest:INFO: 30-01 | XA-000-09-004-002-009-006-12 | 31.4 | 1224.5
15:21:59:febtest:INFO: 28-03 | XA-000-09-004-002-012-002-07 | 56.8 | 1141.9
15:22:00:febtest:INFO: 26-05 | XA-000-09-004-002-012-005-07 | 53.6 | 1153.7
15:22:00:febtest:INFO: 24-07 | XA-000-09-004-002-006-006-08 | 47.3 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_17-15_21_10
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4116| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7876', '1.850', '1.3990']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0030', '1.850', '1.2960']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9903', '1.850', '0.2686']