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FEB_4116 18.02.25 11:57:37
Info
11:57:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:57:37:ST3_Shared:INFO: FEB-Microcable
11:57:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:57:37:febtest:INFO: Testing FEB with SN 4116
11:57:39:smx_tester:INFO: Scanning setup
11:57:39:elinks:INFO: Disabling clock on downlink 0
11:57:39:elinks:INFO: Disabling clock on downlink 1
11:57:39:elinks:INFO: Disabling clock on downlink 2
11:57:39:elinks:INFO: Disabling clock on downlink 3
11:57:39:elinks:INFO: Disabling clock on downlink 4
11:57:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:57:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:39:elinks:INFO: Disabling clock on downlink 0
11:57:39:elinks:INFO: Disabling clock on downlink 1
11:57:39:elinks:INFO: Disabling clock on downlink 2
11:57:39:elinks:INFO: Disabling clock on downlink 3
11:57:39:elinks:INFO: Disabling clock on downlink 4
11:57:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:57:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:39:elinks:INFO: Disabling clock on downlink 0
11:57:39:elinks:INFO: Disabling clock on downlink 1
11:57:39:elinks:INFO: Disabling clock on downlink 2
11:57:39:elinks:INFO: Disabling clock on downlink 3
11:57:39:elinks:INFO: Disabling clock on downlink 4
11:57:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:57:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:57:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:39:elinks:INFO: Disabling clock on downlink 0
11:57:39:elinks:INFO: Disabling clock on downlink 1
11:57:39:elinks:INFO: Disabling clock on downlink 2
11:57:39:elinks:INFO: Disabling clock on downlink 3
11:57:39:elinks:INFO: Disabling clock on downlink 4
11:57:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:57:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:39:elinks:INFO: Disabling clock on downlink 0
11:57:39:elinks:INFO: Disabling clock on downlink 1
11:57:39:elinks:INFO: Disabling clock on downlink 2
11:57:39:elinks:INFO: Disabling clock on downlink 3
11:57:39:elinks:INFO: Disabling clock on downlink 4
11:57:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:57:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:39:setup_element:INFO: Scanning clock phase
11:57:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:57:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:57:40:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:57:40:setup_element:INFO: Eye window for uplink 16: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:57:40:setup_element:INFO: Eye window for uplink 17: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:57:40:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:57:40:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:57:40:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXX____
Clock Delay: 33
11:57:40:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXX____
Clock Delay: 33
11:57:40:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
11:57:40:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
11:57:40:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:57:40:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:57:40:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:57:40:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:57:40:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
11:57:40:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
11:57:40:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:57:40:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:57:40:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
11:57:40:setup_element:INFO: Scanning data phases
11:57:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:57:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:57:45:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:57:45:setup_element:INFO: Eye window for uplink 16: XXX__________________________________XXX
Data delay found: 19
11:57:45:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX
Data delay found: 17
11:57:45:setup_element:INFO: Eye window for uplink 18: XXXX___________________________________X
Data delay found: 21
11:57:45:setup_element:INFO: Eye window for uplink 19: XX__________________________________XXXX
Data delay found: 18
11:57:45:setup_element:INFO: Eye window for uplink 20: X___________________________________XXXX
Data delay found: 18
11:57:45:setup_element:INFO: Eye window for uplink 21: X___________________________________XXXX
Data delay found: 18
11:57:45:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
11:57:45:setup_element:INFO: Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
11:57:45:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
11:57:45:setup_element:INFO: Eye window for uplink 25: _______XXXXXX___________________________
Data delay found: 29
11:57:45:setup_element:INFO: Eye window for uplink 26: _________XXXXX__________________________
Data delay found: 31
11:57:45:setup_element:INFO: Eye window for uplink 27: ____________XXXXXX______________________
Data delay found: 34
11:57:45:setup_element:INFO: Eye window for uplink 28: ________________XXXXX___________________
Data delay found: 38
11:57:45:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
11:57:45:setup_element:INFO: Eye window for uplink 30: ______________XXXXX___XXXXXXXXXXXXXXXXXX
Data delay found: 6
11:57:45:setup_element:INFO: Eye window for uplink 31: _______________XXX____XXXXXXXXXXXXXXXXXX
Data delay found: 7
11:57:45:setup_element:INFO: Setting the data phase to 19 for uplink 16
11:57:45:setup_element:INFO: Setting the data phase to 17 for uplink 17
11:57:45:setup_element:INFO: Setting the data phase to 21 for uplink 18
11:57:45:setup_element:INFO: Setting the data phase to 18 for uplink 19
11:57:45:setup_element:INFO: Setting the data phase to 18 for uplink 20
11:57:45:setup_element:INFO: Setting the data phase to 18 for uplink 21
11:57:45:setup_element:INFO: Setting the data phase to 19 for uplink 22
11:57:45:setup_element:INFO: Setting the data phase to 15 for uplink 23
11:57:45:setup_element:INFO: Setting the data phase to 27 for uplink 24
11:57:45:setup_element:INFO: Setting the data phase to 29 for uplink 25
11:57:45:setup_element:INFO: Setting the data phase to 31 for uplink 26
11:57:45:setup_element:INFO: Setting the data phase to 34 for uplink 27
11:57:45:setup_element:INFO: Setting the data phase to 38 for uplink 28
11:57:45:setup_element:INFO: Setting the data phase to 0 for uplink 29
11:57:45:setup_element:INFO: Setting the data phase to 6 for uplink 30
11:57:45:setup_element:INFO: Setting the data phase to 7 for uplink 31
11:57:45:setup_element:INFO: Beginning SMX ASICs map scan
11:57:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:57:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:57:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:57:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:57:45:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:57:45:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:57:45:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:57:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:57:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:57:45:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:57:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:57:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:57:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:57:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:57:46:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:57:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:57:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:57:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:57:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:57:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:57:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:57:48:setup_element:INFO: Performing Elink synchronization
11:57:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:57:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:57:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:57:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:57:48:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:57:48:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:57:49:febtest:INFO: Init all SMX (CSA): 30
11:58:02:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:58:02:febtest:INFO: 23-00 | XA-000-09-004-002-008-027-06 | 34.6 | 1153.7
11:58:03:febtest:INFO: 30-01 | XA-000-09-004-002-009-006-12 | 28.2 | 1189.2
11:58:03:febtest:INFO: 21-02 | XA-000-09-004-002-009-005-12 | 40.9 | 1135.9
11:58:03:febtest:INFO: 28-03 | XA-000-09-004-002-012-002-07 | 53.6 | 1106.2
11:58:03:febtest:INFO: 19-04 | XA-000-09-004-002-006-005-08 | 40.9 | 1153.7
11:58:03:febtest:INFO: 26-05 | XA-000-09-004-002-012-005-07 | 50.4 | 1118.1
11:58:04:febtest:INFO: 17-06 | XA-000-09-004-002-005-024-01 | 40.9 | 1153.7
11:58:04:febtest:INFO: 24-07 | XA-000-09-004-002-006-006-08 | 40.9 | 1153.7
11:58:05:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:58:07:ST3_smx:INFO: chip: 23-0 34.556970 C 1165.571835 mV
11:58:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:07:ST3_smx:INFO: Electrons
11:58:07:ST3_smx:INFO: # loops 0
11:58:08:ST3_smx:INFO: # loops 1
11:58:10:ST3_smx:INFO: # loops 2
11:58:12:ST3_smx:INFO: Total # of broken channels: 0
11:58:12:ST3_smx:INFO: List of broken channels: []
11:58:12:ST3_smx:INFO: Total # of broken channels: 0
11:58:12:ST3_smx:INFO: List of broken channels: []
11:58:14:ST3_smx:INFO: chip: 30-1 31.389742 C 1200.969315 mV
11:58:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:14:ST3_smx:INFO: Electrons
11:58:14:ST3_smx:INFO: # loops 0
11:58:16:ST3_smx:INFO: # loops 1
11:58:17:ST3_smx:INFO: # loops 2
11:58:19:ST3_smx:INFO: Total # of broken channels: 0
11:58:19:ST3_smx:INFO: List of broken channels: []
11:58:19:ST3_smx:INFO: Total # of broken channels: 0
11:58:19:ST3_smx:INFO: List of broken channels: []
11:58:20:ST3_smx:INFO: chip: 21-2 44.073563 C 1147.806000 mV
11:58:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:20:ST3_smx:INFO: Electrons
11:58:20:ST3_smx:INFO: # loops 0
11:58:22:ST3_smx:INFO: # loops 1
11:58:23:ST3_smx:INFO: # loops 2
11:58:25:ST3_smx:INFO: Total # of broken channels: 0
11:58:25:ST3_smx:INFO: List of broken channels: []
11:58:25:ST3_smx:INFO: Total # of broken channels: 0
11:58:25:ST3_smx:INFO: List of broken channels: []
11:58:27:ST3_smx:INFO: chip: 28-3 53.612520 C 1124.048640 mV
11:58:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:27:ST3_smx:INFO: Electrons
11:58:27:ST3_smx:INFO: # loops 0
11:58:28:ST3_smx:INFO: # loops 1
11:58:30:ST3_smx:INFO: # loops 2
11:58:31:ST3_smx:INFO: Total # of broken channels: 0
11:58:31:ST3_smx:INFO: List of broken channels: []
11:58:31:ST3_smx:INFO: Total # of broken channels: 0
11:58:31:ST3_smx:INFO: List of broken channels: []
11:58:33:ST3_smx:INFO: chip: 19-4 40.898880 C 1165.571835 mV
11:58:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:33:ST3_smx:INFO: Electrons
11:58:33:ST3_smx:INFO: # loops 0
11:58:35:ST3_smx:INFO: # loops 1
11:58:37:ST3_smx:INFO: # loops 2
11:58:39:ST3_smx:INFO: Total # of broken channels: 1
11:58:39:ST3_smx:INFO: List of broken channels: [1]
11:58:39:ST3_smx:INFO: Total # of broken channels: 1
11:58:39:ST3_smx:INFO: List of broken channels: [1]
11:58:40:ST3_smx:INFO: chip: 26-5 50.430383 C 1129.995435 mV
11:58:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:40:ST3_smx:INFO: Electrons
11:58:40:ST3_smx:INFO: # loops 0
11:58:42:ST3_smx:INFO: # loops 1
11:58:43:ST3_smx:INFO: # loops 2
11:58:45:ST3_smx:INFO: Total # of broken channels: 0
11:58:45:ST3_smx:INFO: List of broken channels: []
11:58:45:ST3_smx:INFO: Total # of broken channels: 0
11:58:45:ST3_smx:INFO: List of broken channels: []
11:58:47:ST3_smx:INFO: chip: 17-6 44.073563 C 1165.571835 mV
11:58:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:47:ST3_smx:INFO: Electrons
11:58:47:ST3_smx:INFO: # loops 0
11:58:48:ST3_smx:INFO: # loops 1
11:58:50:ST3_smx:INFO: # loops 2
11:58:52:ST3_smx:INFO: Total # of broken channels: 0
11:58:52:ST3_smx:INFO: List of broken channels: []
11:58:52:ST3_smx:INFO: Total # of broken channels: 0
11:58:52:ST3_smx:INFO: List of broken channels: []
11:58:53:ST3_smx:INFO: chip: 24-7 44.073563 C 1165.571835 mV
11:58:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:53:ST3_smx:INFO: Electrons
11:58:53:ST3_smx:INFO: # loops 0
11:58:55:ST3_smx:INFO: # loops 1
11:58:57:ST3_smx:INFO: # loops 2
11:58:58:ST3_smx:INFO: Total # of broken channels: 0
11:58:58:ST3_smx:INFO: List of broken channels: []
11:58:59:ST3_smx:INFO: Total # of broken channels: 0
11:58:59:ST3_smx:INFO: List of broken channels: []
11:58:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:58:59:febtest:INFO: 23-00 | XA-000-09-004-002-008-027-06 | 37.7 | 1189.2
11:58:59:febtest:INFO: 30-01 | XA-000-09-004-002-009-006-12 | 31.4 | 1224.5
11:58:59:febtest:INFO: 21-02 | XA-000-09-004-002-009-005-12 | 44.1 | 1171.5
11:59:00:febtest:INFO: 28-03 | XA-000-09-004-002-012-002-07 | 56.8 | 1141.9
11:59:00:febtest:INFO: 19-04 | XA-000-09-004-002-006-005-08 | 44.1 | 1195.1
11:59:00:febtest:INFO: 26-05 | XA-000-09-004-002-012-005-07 | 53.6 | 1153.7
11:59:00:febtest:INFO: 17-06 | XA-000-09-004-002-005-024-01 | 44.1 | 1189.2
11:59:00:febtest:INFO: 24-07 | XA-000-09-004-002-006-006-08 | 44.1 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_18-11_57_37
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4116| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '1.5650', '1.850', '2.6720']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0050', '1.850', '2.5090']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9770', '1.850', '0.5296']