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FEB_4117 04.09.25 10:48:36
Info
10:48:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:48:36:ST3_Shared:INFO: FEB-Microcable
10:48:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:48:37:febtest:INFO: Testing FEB with SN 4117
10:48:38:smx_tester:INFO: Scanning setup
10:48:38:elinks:INFO: Disabling clock on downlink 0
10:48:38:elinks:INFO: Disabling clock on downlink 1
10:48:38:elinks:INFO: Disabling clock on downlink 2
10:48:38:elinks:INFO: Disabling clock on downlink 3
10:48:38:elinks:INFO: Disabling clock on downlink 4
10:48:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:48:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:48:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:48:38:elinks:INFO: Disabling clock on downlink 0
10:48:38:elinks:INFO: Disabling clock on downlink 1
10:48:38:elinks:INFO: Disabling clock on downlink 2
10:48:38:elinks:INFO: Disabling clock on downlink 3
10:48:38:elinks:INFO: Disabling clock on downlink 4
10:48:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:48:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:48:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:48:38:elinks:INFO: Disabling clock on downlink 0
10:48:38:elinks:INFO: Disabling clock on downlink 1
10:48:38:elinks:INFO: Disabling clock on downlink 2
10:48:38:elinks:INFO: Disabling clock on downlink 3
10:48:38:elinks:INFO: Disabling clock on downlink 4
10:48:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:48:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:48:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:48:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:48:39:elinks:INFO: Disabling clock on downlink 0
10:48:39:elinks:INFO: Disabling clock on downlink 1
10:48:39:elinks:INFO: Disabling clock on downlink 2
10:48:39:elinks:INFO: Disabling clock on downlink 3
10:48:39:elinks:INFO: Disabling clock on downlink 4
10:48:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:48:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:48:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:48:39:elinks:INFO: Disabling clock on downlink 0
10:48:39:elinks:INFO: Disabling clock on downlink 1
10:48:39:elinks:INFO: Disabling clock on downlink 2
10:48:39:elinks:INFO: Disabling clock on downlink 3
10:48:39:elinks:INFO: Disabling clock on downlink 4
10:48:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:48:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:48:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:48:39:setup_element:INFO: Scanning clock phase
10:48:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:48:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:48:39:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:48:39:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:48:39:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:48:39:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXX_____
Clock Delay: 32
10:48:39:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXX_____
Clock Delay: 32
10:48:39:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:48:39:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:48:39:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:48:39:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:48:39:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
10:48:39:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
10:48:39:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:48:39:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:48:39:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:48:39:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:48:39:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:48:39:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:48:39:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
10:48:39:setup_element:INFO: Scanning data phases
10:48:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:48:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:48:44:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:48:44:setup_element:INFO: Eye window for uplink 16: X__________________________________XXXXX
Data delay found: 17
10:48:44:setup_element:INFO: Eye window for uplink 17: _________________________________XXXXXX_
Data delay found: 15
10:48:44:setup_element:INFO: Eye window for uplink 18: _________________________________XXXX___
Data delay found: 14
10:48:44:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXXX__
Data delay found: 14
10:48:44:setup_element:INFO: Eye window for uplink 20: _________________________________XXXX___
Data delay found: 14
10:48:44:setup_element:INFO: Eye window for uplink 21: __________________________________XXXX__
Data delay found: 15
10:48:44:setup_element:INFO: Eye window for uplink 22: X___________________________________XXXX
Data delay found: 18
10:48:44:setup_element:INFO: Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
10:48:44:setup_element:INFO: Eye window for uplink 24: _____XXXXXX_____________________________
Data delay found: 27
10:48:44:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
10:48:44:setup_element:INFO: Eye window for uplink 26: __________XXXXXXX_______________________
Data delay found: 33
10:48:44:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
10:48:44:setup_element:INFO: Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
10:48:44:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
10:48:44:setup_element:INFO: Eye window for uplink 30: ______________XXXXXXX___________________
Data delay found: 37
10:48:44:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_____________________
Data delay found: 36
10:48:44:setup_element:INFO: Setting the data phase to 17 for uplink 16
10:48:44:setup_element:INFO: Setting the data phase to 15 for uplink 17
10:48:44:setup_element:INFO: Setting the data phase to 14 for uplink 18
10:48:44:setup_element:INFO: Setting the data phase to 14 for uplink 19
10:48:44:setup_element:INFO: Setting the data phase to 14 for uplink 20
10:48:44:setup_element:INFO: Setting the data phase to 15 for uplink 21
10:48:44:setup_element:INFO: Setting the data phase to 18 for uplink 22
10:48:44:setup_element:INFO: Setting the data phase to 15 for uplink 23
10:48:44:setup_element:INFO: Setting the data phase to 27 for uplink 24
10:48:44:setup_element:INFO: Setting the data phase to 29 for uplink 25
10:48:44:setup_element:INFO: Setting the data phase to 33 for uplink 26
10:48:44:setup_element:INFO: Setting the data phase to 35 for uplink 27
10:48:44:setup_element:INFO: Setting the data phase to 36 for uplink 28
10:48:44:setup_element:INFO: Setting the data phase to 36 for uplink 29
10:48:44:setup_element:INFO: Setting the data phase to 37 for uplink 30
10:48:44:setup_element:INFO: Setting the data phase to 36 for uplink 31
10:48:44:setup_element:INFO: Beginning SMX ASICs map scan
10:48:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:48:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:48:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:48:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:48:44:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:48:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:48:45:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:48:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:48:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:48:45:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:48:45:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:48:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:48:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:48:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:48:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:48:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:48:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:48:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:48:46:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:48:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:48:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:48:47:setup_element:INFO: Performing Elink synchronization
10:48:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:48:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:48:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:48:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:48:47:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:48:47:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:48:48:febtest:INFO: Init all SMX (CSA): 30
10:49:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:49:04:febtest:INFO: 23-00 | XA-000-09-004-035-016-016-09 | 21.9 | 1218.6
10:49:04:febtest:INFO: 30-01 | XA-000-09-004-002-008-024-06 | 44.1 | 1153.7
10:49:04:febtest:INFO: 21-02 | XA-000-09-004-035-016-015-14 | 25.1 | 1218.6
10:49:05:febtest:INFO: 28-03 | XA-000-09-004-002-011-027-08 | 31.4 | 1201.0
10:49:05:febtest:INFO: 19-04 | XA-000-09-004-035-013-015-05 | 31.4 | 1195.1
10:49:05:febtest:INFO: 26-05 | XA-000-09-004-002-005-023-01 | 37.7 | 1183.3
10:49:05:febtest:INFO: 17-06 | XA-000-09-004-035-010-016-10 | 37.7 | 1171.5
10:49:05:febtest:INFO: 24-07 | XA-000-09-004-002-011-024-08 | 44.1 | 1159.7
10:49:06:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:49:08:ST3_smx:INFO: chip: 23-0 21.902970 C 1230.330540 mV
10:49:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:08:ST3_smx:INFO: Electrons
10:49:08:ST3_smx:INFO: # loops 0
10:49:10:ST3_smx:INFO: # loops 1
10:49:12:ST3_smx:INFO: # loops 2
10:49:14:ST3_smx:INFO: Total # of broken channels: 0
10:49:14:ST3_smx:INFO: List of broken channels: []
10:49:14:ST3_smx:INFO: Total # of broken channels: 0
10:49:14:ST3_smx:INFO: List of broken channels: []
10:49:15:ST3_smx:INFO: chip: 30-1 44.073563 C 1165.571835 mV
10:49:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:15:ST3_smx:INFO: Electrons
10:49:15:ST3_smx:INFO: # loops 0
10:49:17:ST3_smx:INFO: # loops 1
10:49:19:ST3_smx:INFO: # loops 2
10:49:21:ST3_smx:INFO: Total # of broken channels: 0
10:49:21:ST3_smx:INFO: List of broken channels: []
10:49:21:ST3_smx:INFO: Total # of broken channels: 0
10:49:21:ST3_smx:INFO: List of broken channels: []
10:49:22:ST3_smx:INFO: chip: 21-2 25.062742 C 1236.187875 mV
10:49:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:22:ST3_smx:INFO: Electrons
10:49:22:ST3_smx:INFO: # loops 0
10:49:24:ST3_smx:INFO: # loops 1
10:49:26:ST3_smx:INFO: # loops 2
10:49:28:ST3_smx:INFO: Total # of broken channels: 0
10:49:28:ST3_smx:INFO: List of broken channels: []
10:49:28:ST3_smx:INFO: Total # of broken channels: 0
10:49:28:ST3_smx:INFO: List of broken channels: []
10:49:29:ST3_smx:INFO: chip: 28-3 31.389742 C 1212.728715 mV
10:49:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:29:ST3_smx:INFO: Electrons
10:49:29:ST3_smx:INFO: # loops 0
10:49:31:ST3_smx:INFO: # loops 1
10:49:33:ST3_smx:INFO: # loops 2
10:49:35:ST3_smx:INFO: Total # of broken channels: 0
10:49:35:ST3_smx:INFO: List of broken channels: []
10:49:35:ST3_smx:INFO: Total # of broken channels: 0
10:49:35:ST3_smx:INFO: List of broken channels: []
10:49:36:ST3_smx:INFO: chip: 19-4 34.556970 C 1200.969315 mV
10:49:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:36:ST3_smx:INFO: Electrons
10:49:36:ST3_smx:INFO: # loops 0
10:49:38:ST3_smx:INFO: # loops 1
10:49:40:ST3_smx:INFO: # loops 2
10:49:42:ST3_smx:INFO: Total # of broken channels: 0
10:49:42:ST3_smx:INFO: List of broken channels: []
10:49:42:ST3_smx:INFO: Total # of broken channels: 0
10:49:42:ST3_smx:INFO: List of broken channels: []
10:49:43:ST3_smx:INFO: chip: 26-5 40.898880 C 1195.082160 mV
10:49:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:43:ST3_smx:INFO: Electrons
10:49:43:ST3_smx:INFO: # loops 0
10:49:45:ST3_smx:INFO: # loops 1
10:49:47:ST3_smx:INFO: # loops 2
10:49:49:ST3_smx:INFO: Total # of broken channels: 0
10:49:49:ST3_smx:INFO: List of broken channels: []
10:49:49:ST3_smx:INFO: Total # of broken channels: 0
10:49:49:ST3_smx:INFO: List of broken channels: []
10:49:50:ST3_smx:INFO: chip: 17-6 37.726682 C 1183.292940 mV
10:49:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:50:ST3_smx:INFO: Electrons
10:49:50:ST3_smx:INFO: # loops 0
10:49:52:ST3_smx:INFO: # loops 1
10:49:54:ST3_smx:INFO: # loops 2
10:49:56:ST3_smx:INFO: Total # of broken channels: 0
10:49:56:ST3_smx:INFO: List of broken channels: []
10:49:56:ST3_smx:INFO: Total # of broken channels: 0
10:49:56:ST3_smx:INFO: List of broken channels: []
10:49:57:ST3_smx:INFO: chip: 24-7 47.250730 C 1165.571835 mV
10:49:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:49:57:ST3_smx:INFO: Electrons
10:49:57:ST3_smx:INFO: # loops 0
10:49:59:ST3_smx:INFO: # loops 1
10:50:01:ST3_smx:INFO: # loops 2
10:50:03:ST3_smx:INFO: Total # of broken channels: 0
10:50:03:ST3_smx:INFO: List of broken channels: []
10:50:03:ST3_smx:INFO: Total # of broken channels: 0
10:50:03:ST3_smx:INFO: List of broken channels: []
10:50:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:50:03:febtest:INFO: 23-00 | XA-000-09-004-035-016-016-09 | 25.1 | 1247.9
10:50:04:febtest:INFO: 30-01 | XA-000-09-004-002-008-024-06 | 44.1 | 1189.2
10:50:04:febtest:INFO: 21-02 | XA-000-09-004-035-016-015-14 | 28.2 | 1253.7
10:50:04:febtest:INFO: 28-03 | XA-000-09-004-002-011-027-08 | 34.6 | 1230.3
10:50:04:febtest:INFO: 19-04 | XA-000-09-004-035-013-015-05 | 34.6 | 1224.5
10:50:04:febtest:INFO: 26-05 | XA-000-09-004-002-005-023-01 | 40.9 | 1218.6
10:50:05:febtest:INFO: 17-06 | XA-000-09-004-035-010-016-10 | 40.9 | 1201.0
10:50:05:febtest:INFO: 24-07 | XA-000-09-004-002-011-024-08 | 50.4 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_04-10_48_36
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4117| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8100', '1.847', '2.2490']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9840', '1.850', '2.5430']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9530', '1.850', '0.5215']