Go Back
FEB_4118 27.02.25 11:11:45
TextEdit.txt
11:11:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:11:45:ST3_Shared:INFO: FEB-Microcable
11:11:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:11:45:febtest:INFO: Testing FEB with SN 4118
11:11:47:smx_tester:INFO: Scanning setup
11:11:47:elinks:INFO: Disabling clock on downlink 0
11:11:47:elinks:INFO: Disabling clock on downlink 1
11:11:47:elinks:INFO: Disabling clock on downlink 2
11:11:47:elinks:INFO: Disabling clock on downlink 3
11:11:47:elinks:INFO: Disabling clock on downlink 4
11:11:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:11:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:11:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:11:47:elinks:INFO: Disabling clock on downlink 0
11:11:47:elinks:INFO: Disabling clock on downlink 1
11:11:47:elinks:INFO: Disabling clock on downlink 2
11:11:47:elinks:INFO: Disabling clock on downlink 3
11:11:47:elinks:INFO: Disabling clock on downlink 4
11:11:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:11:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:11:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:11:47:elinks:INFO: Disabling clock on downlink 0
11:11:47:elinks:INFO: Disabling clock on downlink 1
11:11:47:elinks:INFO: Disabling clock on downlink 2
11:11:47:elinks:INFO: Disabling clock on downlink 3
11:11:47:elinks:INFO: Disabling clock on downlink 4
11:11:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:11:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:11:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:11:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:11:47:elinks:INFO: Disabling clock on downlink 0
11:11:47:elinks:INFO: Disabling clock on downlink 1
11:11:47:elinks:INFO: Disabling clock on downlink 2
11:11:47:elinks:INFO: Disabling clock on downlink 3
11:11:47:elinks:INFO: Disabling clock on downlink 4
11:11:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:11:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:11:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:11:47:elinks:INFO: Disabling clock on downlink 0
11:11:47:elinks:INFO: Disabling clock on downlink 1
11:11:47:elinks:INFO: Disabling clock on downlink 2
11:11:47:elinks:INFO: Disabling clock on downlink 3
11:11:47:elinks:INFO: Disabling clock on downlink 4
11:11:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:11:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:11:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:11:47:setup_element:INFO: Scanning clock phase
11:11:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:11:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:11:48:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:11:48:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:11:48:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:11:48:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:11:48:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:11:48:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:11:48:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:11:48:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:11:48:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:11:48:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:11:48:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:11:48:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:11:48:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:11:48:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:11:48:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:11:48:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:11:48:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:11:48:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
11:11:48:setup_element:INFO: Scanning data phases
11:11:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:11:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:11:53:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:11:53:setup_element:INFO: Eye window for uplink 16: ________________________________XXXXX___
Data delay found: 14
11:11:53:setup_element:INFO: Eye window for uplink 17: ______________________________XXXXX_____
Data delay found: 12
11:11:53:setup_element:INFO: Eye window for uplink 18: _________________________________XXXXXX_
Data delay found: 15
11:11:53:setup_element:INFO: Eye window for uplink 19: _______________________________XXXXXX___
Data delay found: 13
11:11:53:setup_element:INFO: Eye window for uplink 20: X__________________________________XXXX_
Data delay found: 17
11:11:53:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
11:11:53:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX
Data delay found: 17
11:11:53:setup_element:INFO: Eye window for uplink 23: _______________________________XXXX_____
Data delay found: 12
11:11:53:setup_element:INFO: Eye window for uplink 24: ____XXXXXX______________________________
Data delay found: 26
11:11:53:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
11:11:53:setup_element:INFO: Eye window for uplink 26: ____XXXXXX______________________________
Data delay found: 26
11:11:53:setup_element:INFO: Eye window for uplink 27: ________XXXXXXX_________________________
Data delay found: 31
11:11:53:setup_element:INFO: Eye window for uplink 28: ___________XXXXX________________________
Data delay found: 33
11:11:53:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
11:11:53:setup_element:INFO: Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
11:11:53:setup_element:INFO: Eye window for uplink 31: ______________XXXX______________________
Data delay found: 35
11:11:53:setup_element:INFO: Setting the data phase to 14 for uplink 16
11:11:53:setup_element:INFO: Setting the data phase to 12 for uplink 17
11:11:53:setup_element:INFO: Setting the data phase to 15 for uplink 18
11:11:53:setup_element:INFO: Setting the data phase to 13 for uplink 19
11:11:53:setup_element:INFO: Setting the data phase to 17 for uplink 20
11:11:53:setup_element:INFO: Setting the data phase to 16 for uplink 21
11:11:53:setup_element:INFO: Setting the data phase to 17 for uplink 22
11:11:53:setup_element:INFO: Setting the data phase to 12 for uplink 23
11:11:53:setup_element:INFO: Setting the data phase to 26 for uplink 24
11:11:53:setup_element:INFO: Setting the data phase to 29 for uplink 25
11:11:53:setup_element:INFO: Setting the data phase to 26 for uplink 26
11:11:53:setup_element:INFO: Setting the data phase to 31 for uplink 27
11:11:53:setup_element:INFO: Setting the data phase to 33 for uplink 28
11:11:53:setup_element:INFO: Setting the data phase to 35 for uplink 29
11:11:53:setup_element:INFO: Setting the data phase to 35 for uplink 30
11:11:53:setup_element:INFO: Setting the data phase to 35 for uplink 31
11:11:53:setup_element:INFO: Beginning SMX ASICs map scan
11:11:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:11:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:11:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:11:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:11:53:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:11:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:11:53:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:11:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:11:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:11:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:11:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:11:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:11:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:11:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:11:54:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:11:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:11:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:11:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:11:54:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:11:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:11:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:11:56:setup_element:INFO: Performing Elink synchronization
11:11:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:11:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:11:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:11:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:11:56:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:11:56:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:11:57:febtest:INFO: Init all SMX (CSA): 30
11:12:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:12:10:febtest:INFO: 23-00 | XA-000-09-004-002-006-011-08 | 44.1 | 1141.9
11:12:11:febtest:INFO: 30-01 | XA-000-09-004-002-012-011-07 | 34.6 | 1171.5
11:12:11:febtest:INFO: 21-02 | XA-000-09-004-002-003-011-03 | 44.1 | 1141.9
11:12:11:febtest:INFO: 28-03 | XA-000-09-004-002-012-010-07 | 40.9 | 1159.7
11:12:11:febtest:INFO: 19-04 | XA-000-09-004-002-003-012-03 | 34.6 | 1171.5
11:12:11:febtest:INFO: 26-05 | XA-000-09-004-002-009-010-12 | 37.7 | 1165.6
11:12:12:febtest:INFO: 17-06 | XA-000-09-004-002-006-012-08 | 40.9 | 1153.7
11:12:12:febtest:INFO: 24-07 | XA-000-09-004-002-006-010-08 | 37.7 | 1177.4
11:12:13:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:12:15:ST3_smx:INFO: chip: 23-0 44.073563 C 1153.732915 mV
11:12:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:15:ST3_smx:INFO: Electrons
11:12:15:ST3_smx:INFO: # loops 0
11:12:17:ST3_smx:INFO: # loops 1
11:12:18:ST3_smx:INFO: # loops 2
11:12:20:ST3_smx:INFO: Total # of broken channels: 0
11:12:20:ST3_smx:INFO: List of broken channels: []
11:12:20:ST3_smx:INFO: Total # of broken channels: 4
11:12:20:ST3_smx:INFO: List of broken channels: [4, 6, 8, 10]
11:12:22:ST3_smx:INFO: chip: 30-1 34.556970 C 1189.190035 mV
11:12:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:22:ST3_smx:INFO: Electrons
11:12:22:ST3_smx:INFO: # loops 0
11:12:23:ST3_smx:INFO: # loops 1
11:12:25:ST3_smx:INFO: # loops 2
11:12:26:ST3_smx:INFO: Total # of broken channels: 0
11:12:26:ST3_smx:INFO: List of broken channels: []
11:12:26:ST3_smx:INFO: Total # of broken channels: 0
11:12:26:ST3_smx:INFO: List of broken channels: []
11:12:28:ST3_smx:INFO: chip: 21-2 44.073563 C 1159.654860 mV
11:12:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:28:ST3_smx:INFO: Electrons
11:12:28:ST3_smx:INFO: # loops 0
11:12:30:ST3_smx:INFO: # loops 1
11:12:31:ST3_smx:INFO: # loops 2
11:12:33:ST3_smx:INFO: Total # of broken channels: 0
11:12:33:ST3_smx:INFO: List of broken channels: []
11:12:33:ST3_smx:INFO: Total # of broken channels: 0
11:12:33:ST3_smx:INFO: List of broken channels: []
11:12:34:ST3_smx:INFO: chip: 28-3 40.898880 C 1177.390875 mV
11:12:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:34:ST3_smx:INFO: Electrons
11:12:34:ST3_smx:INFO: # loops 0
11:12:36:ST3_smx:INFO: # loops 1
11:12:38:ST3_smx:INFO: # loops 2
11:12:39:ST3_smx:INFO: Total # of broken channels: 0
11:12:39:ST3_smx:INFO: List of broken channels: []
11:12:39:ST3_smx:INFO: Total # of broken channels: 0
11:12:39:ST3_smx:INFO: List of broken channels: []
11:12:41:ST3_smx:INFO: chip: 19-4 37.726682 C 1183.292940 mV
11:12:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:41:ST3_smx:INFO: Electrons
11:12:41:ST3_smx:INFO: # loops 0
11:12:43:ST3_smx:INFO: # loops 1
11:12:44:ST3_smx:INFO: # loops 2
11:12:46:ST3_smx:INFO: Total # of broken channels: 0
11:12:46:ST3_smx:INFO: List of broken channels: []
11:12:46:ST3_smx:INFO: Total # of broken channels: 0
11:12:46:ST3_smx:INFO: List of broken channels: []
11:12:47:ST3_smx:INFO: chip: 26-5 37.726682 C 1183.292940 mV
11:12:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:47:ST3_smx:INFO: Electrons
11:12:47:ST3_smx:INFO: # loops 0
11:12:49:ST3_smx:INFO: # loops 1
11:12:50:ST3_smx:INFO: # loops 2
11:12:52:ST3_smx:INFO: Total # of broken channels: 0
11:12:52:ST3_smx:INFO: List of broken channels: []
11:12:52:ST3_smx:INFO: Total # of broken channels: 0
11:12:52:ST3_smx:INFO: List of broken channels: []
11:12:53:ST3_smx:INFO: chip: 17-6 44.073563 C 1165.571835 mV
11:12:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:12:53:ST3_smx:INFO: Electrons
11:12:53:ST3_smx:INFO: # loops 0
11:12:55:ST3_smx:INFO: # loops 1
11:12:57:ST3_smx:INFO: # loops 2
11:12:59:ST3_smx:INFO: Total # of broken channels: 0
11:12:59:ST3_smx:INFO: List of broken channels: []
11:12:59:ST3_smx:INFO: Total # of broken channels: 0
11:12:59:ST3_smx:INFO: List of broken channels: []
11:13:00:ST3_smx:INFO: chip: 24-7 40.898880 C 1189.190035 mV
11:13:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:13:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:13:00:ST3_smx:INFO: Electrons
11:13:00:ST3_smx:INFO: # loops 0
11:13:02:ST3_smx:INFO: # loops 1
11:13:03:ST3_smx:INFO: # loops 2
11:13:05:ST3_smx:INFO: Total # of broken channels: 0
11:13:05:ST3_smx:INFO: List of broken channels: []
11:13:05:ST3_smx:INFO: Total # of broken channels: 0
11:13:05:ST3_smx:INFO: List of broken channels: []
11:13:05:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:13:05:febtest:INFO: 23-00 | XA-000-09-004-002-006-011-08 | 47.3 | 1177.4
11:13:06:febtest:INFO: 30-01 | XA-000-09-004-002-012-011-07 | 37.7 | 1212.7
11:13:06:febtest:INFO: 21-02 | XA-000-09-004-002-003-011-03 | 44.1 | 1201.0
11:13:06:febtest:INFO: 28-03 | XA-000-09-004-002-012-010-07 | 44.1 | 1201.0
11:13:06:febtest:INFO: 19-04 | XA-000-09-004-002-003-012-03 | 37.7 | 1201.0
11:13:07:febtest:INFO: 26-05 | XA-000-09-004-002-009-010-12 | 40.9 | 1201.0
11:13:07:febtest:INFO: 17-06 | XA-000-09-004-002-006-012-08 | 44.1 | 1183.3
11:13:07:febtest:INFO: 24-07 | XA-000-09-004-002-006-010-08 | 40.9 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_27-11_11_45
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4118| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '1.4670', '1.850', '2.1840']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0010', '1.850', '2.5790']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9700', '1.850', '0.5283']