
FEB_4121 03.03.25 11:08:48
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11:08:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:08:48:ST3_Shared:INFO: FEB-Microcable 11:08:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:08:48:febtest:INFO: Testing FEB with SN 4121 11:08:50:smx_tester:INFO: Scanning setup 11:08:50:elinks:INFO: Disabling clock on downlink 0 11:08:50:elinks:INFO: Disabling clock on downlink 1 11:08:50:elinks:INFO: Disabling clock on downlink 2 11:08:50:elinks:INFO: Disabling clock on downlink 3 11:08:50:elinks:INFO: Disabling clock on downlink 4 11:08:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:08:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:08:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:08:50:elinks:INFO: Disabling clock on downlink 0 11:08:50:elinks:INFO: Disabling clock on downlink 1 11:08:50:elinks:INFO: Disabling clock on downlink 2 11:08:50:elinks:INFO: Disabling clock on downlink 3 11:08:50:elinks:INFO: Disabling clock on downlink 4 11:08:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:08:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:08:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:08:50:elinks:INFO: Disabling clock on downlink 0 11:08:50:elinks:INFO: Disabling clock on downlink 1 11:08:50:elinks:INFO: Disabling clock on downlink 2 11:08:50:elinks:INFO: Disabling clock on downlink 3 11:08:50:elinks:INFO: Disabling clock on downlink 4 11:08:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:08:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:08:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 11:08:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 11:08:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 11:08:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 11:08:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 11:08:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 11:08:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 11:08:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 11:08:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:08:50:elinks:INFO: Disabling clock on downlink 0 11:08:50:elinks:INFO: Disabling clock on downlink 1 11:08:50:elinks:INFO: Disabling clock on downlink 2 11:08:50:elinks:INFO: Disabling clock on downlink 3 11:08:50:elinks:INFO: Disabling clock on downlink 4 11:08:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:08:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 11:08:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:08:50:elinks:INFO: Disabling clock on downlink 0 11:08:50:elinks:INFO: Disabling clock on downlink 1 11:08:50:elinks:INFO: Disabling clock on downlink 2 11:08:50:elinks:INFO: Disabling clock on downlink 3 11:08:50:elinks:INFO: Disabling clock on downlink 4 11:08:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:08:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 11:08:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:08:51:setup_element:INFO: Scanning clock phase 11:08:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:08:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:08:51:setup_element:INFO: Clock phase scan results for group 0, downlink 2 11:08:51:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________ Clock Delay: 40 11:08:51:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________ Clock Delay: 40 11:08:51:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____ Clock Delay: 32 11:08:51:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____ Clock Delay: 32 11:08:51:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXX___ Clock Delay: 33 11:08:51:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXX___ Clock Delay: 33 11:08:51:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXX____ Clock Delay: 33 11:08:51:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXX____ Clock Delay: 33 11:08:51:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 11:08:51:setup_element:INFO: Scanning data phases 11:08:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:08:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:08:56:setup_element:INFO: Data phase scan results for group 0, downlink 2 11:08:56:setup_element:INFO: Eye window for uplink 24: _______XXXXX____________________________ Data delay found: 29 11:08:56:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_________________________ Data delay found: 31 11:08:56:setup_element:INFO: Eye window for uplink 26: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 2 11:08:56:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 4 11:08:56:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________ Data delay found: 35 11:08:56:setup_element:INFO: Eye window for uplink 29: _______________XXXXX____________________ Data delay found: 37 11:08:56:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________ Data delay found: 36 11:08:56:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_____________________ Data delay found: 36 11:08:56:setup_element:INFO: Setting the data phase to 29 for uplink 24 11:08:56:setup_element:INFO: Setting the data phase to 31 for uplink 25 11:08:56:setup_element:INFO: Setting the data phase to 2 for uplink 26 11:08:56:setup_element:INFO: Setting the data phase to 4 for uplink 27 11:08:56:setup_element:INFO: Setting the data phase to 35 for uplink 28 11:08:56:setup_element:INFO: Setting the data phase to 37 for uplink 29 11:08:56:setup_element:INFO: Setting the data phase to 36 for uplink 30 11:08:56:setup_element:INFO: Setting the data phase to 36 for uplink 31 11:08:56:setup_element:INFO: Beginning SMX ASICs map scan 11:08:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:08:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:08:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 11:08:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 11:08:56:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 11:08:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 11:08:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 11:08:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 11:08:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 11:08:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 11:08:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 11:08:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 11:08:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 11:08:59:setup_element:INFO: Performing Elink synchronization 11:08:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:08:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:08:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 11:08:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 11:08:59:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 11:08:59:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 11:08:59:febtest:INFO: Init all SMX (CSA): 30 11:09:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:09:06:febtest:INFO: 30-01 | XA-000-09-004-005-008-005-11 | 37.7 | 1153.7 11:09:07:febtest:INFO: 28-03 | XA-000-09-004-005-005-005-12 | 21.9 | 1218.6 11:09:07:febtest:INFO: 26-05 | XA-000-09-004-005-008-007-11 | 25.1 | 1206.9 11:09:07:febtest:INFO: 24-07 | XA-000-09-004-005-011-005-05 | 40.9 | 1153.7 11:09:08:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 11:09:10:ST3_smx:INFO: chip: 30-1 40.898880 C 1165.571835 mV 11:09:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:09:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:09:10:ST3_smx:INFO: Electrons 11:09:10:ST3_smx:INFO: # loops 0 11:09:12:ST3_smx:INFO: # loops 1 11:09:13:ST3_smx:INFO: # loops 2 11:09:15:ST3_smx:INFO: Total # of broken channels: 0 11:09:15:ST3_smx:INFO: List of broken channels: [] 11:09:15:ST3_smx:INFO: Total # of broken channels: 0 11:09:15:ST3_smx:INFO: List of broken channels: [] 11:09:17:ST3_smx:INFO: chip: 28-3 21.902970 C 1230.330540 mV 11:09:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:09:17:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:09:17:ST3_smx:INFO: Electrons 11:09:17:ST3_smx:INFO: # loops 0 11:09:19:ST3_smx:INFO: # loops 1 11:09:21:ST3_smx:INFO: # loops 2 11:09:22:ST3_smx:INFO: Total # of broken channels: 0 11:09:22:ST3_smx:INFO: List of broken channels: [] 11:09:23:ST3_smx:INFO: Total # of broken channels: 0 11:09:23:ST3_smx:INFO: List of broken channels: [] 11:09:24:ST3_smx:INFO: chip: 26-5 25.062742 C 1212.728715 mV 11:09:24:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:09:24:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:09:24:ST3_smx:INFO: Electrons 11:09:24:ST3_smx:INFO: # loops 0 11:09:26:ST3_smx:INFO: # loops 1 11:09:27:ST3_smx:INFO: # loops 2 11:09:29:ST3_smx:INFO: Total # of broken channels: 0 11:09:29:ST3_smx:INFO: List of broken channels: [] 11:09:29:ST3_smx:INFO: Total # of broken channels: 0 11:09:29:ST3_smx:INFO: List of broken channels: [] 11:09:30:ST3_smx:INFO: chip: 24-7 40.898880 C 1165.571835 mV 11:09:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:09:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:09:30:ST3_smx:INFO: Electrons 11:09:30:ST3_smx:INFO: # loops 0 11:09:32:ST3_smx:INFO: # loops 1 11:09:34:ST3_smx:INFO: # loops 2 11:09:35:ST3_smx:INFO: Total # of broken channels: 0 11:09:35:ST3_smx:INFO: List of broken channels: [] 11:09:35:ST3_smx:INFO: Total # of broken channels: 0 11:09:35:ST3_smx:INFO: List of broken channels: [] 11:09:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:09:36:febtest:INFO: 30-01 | XA-000-09-004-005-008-005-11 | 40.9 | 1189.2 11:09:36:febtest:INFO: 28-03 | XA-000-09-004-005-005-005-12 | 21.9 | 1253.7 11:09:36:febtest:INFO: 26-05 | XA-000-09-004-005-008-007-11 | 25.1 | 1236.2 11:09:36:febtest:INFO: 24-07 | XA-000-09-004-005-011-005-05 | 40.9 | 1189.2 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_03_03-11_08_48 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4121| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8251', '1.850', '1.0000'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0080', '1.850', '1.2850'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9852', '1.850', '0.2673']