FEB_4123 04.03.25 08:48:59
Info
08:48:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:48:59:ST3_Shared:INFO: FEB-Microcable
08:48:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:48:59:febtest:INFO: Testing FEB with SN 4123
08:49:01:smx_tester:INFO: Scanning setup
08:49:01:elinks:INFO: Disabling clock on downlink 0
08:49:01:elinks:INFO: Disabling clock on downlink 1
08:49:01:elinks:INFO: Disabling clock on downlink 2
08:49:01:elinks:INFO: Disabling clock on downlink 3
08:49:01:elinks:INFO: Disabling clock on downlink 4
08:49:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:49:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:49:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:49:01:elinks:INFO: Disabling clock on downlink 0
08:49:01:elinks:INFO: Disabling clock on downlink 1
08:49:01:elinks:INFO: Disabling clock on downlink 2
08:49:01:elinks:INFO: Disabling clock on downlink 3
08:49:01:elinks:INFO: Disabling clock on downlink 4
08:49:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:49:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:49:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:49:01:elinks:INFO: Disabling clock on downlink 0
08:49:01:elinks:INFO: Disabling clock on downlink 1
08:49:01:elinks:INFO: Disabling clock on downlink 2
08:49:01:elinks:INFO: Disabling clock on downlink 3
08:49:01:elinks:INFO: Disabling clock on downlink 4
08:49:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:49:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:49:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:49:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:49:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:49:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:49:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:49:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:49:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:49:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:49:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:49:02:elinks:INFO: Disabling clock on downlink 0
08:49:02:elinks:INFO: Disabling clock on downlink 1
08:49:02:elinks:INFO: Disabling clock on downlink 2
08:49:02:elinks:INFO: Disabling clock on downlink 3
08:49:02:elinks:INFO: Disabling clock on downlink 4
08:49:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:49:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:49:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:49:02:elinks:INFO: Disabling clock on downlink 0
08:49:02:elinks:INFO: Disabling clock on downlink 1
08:49:02:elinks:INFO: Disabling clock on downlink 2
08:49:02:elinks:INFO: Disabling clock on downlink 3
08:49:02:elinks:INFO: Disabling clock on downlink 4
08:49:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:49:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:49:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:49:02:setup_element:INFO: Scanning clock phase
08:49:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:49:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:49:02:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:49:02:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:49:02:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:49:02:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:49:02:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:49:02:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
08:49:02:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
08:49:02:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:49:02:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:49:02:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
08:49:02:setup_element:INFO: Scanning data phases
08:49:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:49:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:49:07:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:49:07:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
08:49:07:setup_element:INFO: Eye window for uplink 25: _________XXXXXXX________________________
Data delay found: 32
08:49:07:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________
Data delay found: 29
08:49:07:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXX______________________
Data delay found: 34
08:49:07:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________
Data delay found: 34
08:49:07:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXX___________________
Data delay found: 37
08:49:07:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
08:49:07:setup_element:INFO: Eye window for uplink 31: _______________XXXX_____________________
Data delay found: 36
08:49:07:setup_element:INFO: Setting the data phase to 29 for uplink 24
08:49:07:setup_element:INFO: Setting the data phase to 32 for uplink 25
08:49:07:setup_element:INFO: Setting the data phase to 29 for uplink 26
08:49:07:setup_element:INFO: Setting the data phase to 34 for uplink 27
08:49:07:setup_element:INFO: Setting the data phase to 34 for uplink 28
08:49:07:setup_element:INFO: Setting the data phase to 37 for uplink 29
08:49:07:setup_element:INFO: Setting the data phase to 36 for uplink 30
08:49:07:setup_element:INFO: Setting the data phase to 36 for uplink 31
08:49:07:setup_element:INFO: Beginning SMX ASICs map scan
08:49:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:49:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:49:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:49:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:49:07:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:49:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:49:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:49:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:49:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:49:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:49:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:49:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:49:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:49:10:setup_element:INFO: Performing Elink synchronization
08:49:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:49:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:49:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:49:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:49:10:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:49:10:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:49:10:febtest:INFO: Init all SMX (CSA): 30
08:49:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:49:18:febtest:INFO: 30-01 | XA-000-09-004-005-018-018-15 | 34.6 | 1165.6
08:49:18:febtest:INFO: 28-03 | XA-000-09-004-005-009-020-01 | 40.9 | 1153.7
08:49:18:febtest:INFO: 26-05 | XA-000-09-004-005-015-019-04 | 31.4 | 1177.4
08:49:19:febtest:INFO: 24-07 | XA-000-09-004-005-006-020-05 | 31.4 | 1189.2
08:49:20:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:49:22:ST3_smx:INFO: chip: 30-1 34.556970 C 1171.483840 mV
08:49:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:49:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:49:22:ST3_smx:INFO: Electrons
08:49:22:ST3_smx:INFO: # loops 0
08:49:23:ST3_smx:INFO: # loops 1
08:49:25:ST3_smx:INFO: # loops 2
08:49:27:ST3_smx:INFO: Total # of broken channels: 0
08:49:27:ST3_smx:INFO: List of broken channels: []
08:49:27:ST3_smx:INFO: Total # of broken channels: 0
08:49:27:ST3_smx:INFO: List of broken channels: []
08:49:28:ST3_smx:INFO: chip: 28-3 40.898880 C 1165.571835 mV
08:49:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:49:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:49:28:ST3_smx:INFO: Electrons
08:49:28:ST3_smx:INFO: # loops 0
08:49:30:ST3_smx:INFO: # loops 1
08:49:32:ST3_smx:INFO: # loops 2
08:49:33:ST3_smx:INFO: Total # of broken channels: 0
08:49:33:ST3_smx:INFO: List of broken channels: []
08:49:33:ST3_smx:INFO: Total # of broken channels: 0
08:49:33:ST3_smx:INFO: List of broken channels: []
08:49:35:ST3_smx:INFO: chip: 26-5 34.556970 C 1189.190035 mV
08:49:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:49:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:49:35:ST3_smx:INFO: Electrons
08:49:35:ST3_smx:INFO: # loops 0
08:49:37:ST3_smx:INFO: # loops 1
08:49:38:ST3_smx:INFO: # loops 2
08:49:40:ST3_smx:INFO: Total # of broken channels: 0
08:49:40:ST3_smx:INFO: List of broken channels: []
08:49:40:ST3_smx:INFO: Total # of broken channels: 0
08:49:40:ST3_smx:INFO: List of broken channels: []
08:49:42:ST3_smx:INFO: chip: 24-7 31.389742 C 1195.082160 mV
08:49:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:49:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:49:42:ST3_smx:INFO: Electrons
08:49:42:ST3_smx:INFO: # loops 0
08:49:43:ST3_smx:INFO: # loops 1
08:49:45:ST3_smx:INFO: # loops 2
08:49:47:ST3_smx:INFO: Total # of broken channels: 0
08:49:47:ST3_smx:INFO: List of broken channels: []
08:49:47:ST3_smx:INFO: Total # of broken channels: 0
08:49:47:ST3_smx:INFO: List of broken channels: []
08:49:48:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:49:48:febtest:INFO: 30-01 | XA-000-09-004-005-018-018-15 | 34.6 | 1195.1
08:49:48:febtest:INFO: 28-03 | XA-000-09-004-005-009-020-01 | 40.9 | 1183.3
08:49:48:febtest:INFO: 26-05 | XA-000-09-004-005-015-019-04 | 34.6 | 1212.7
08:49:48:febtest:INFO: 24-07 | XA-000-09-004-005-006-020-05 | 31.4 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_04-08_48_59
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4123| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '0.7260', '1.850', '0.9370']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9934', '1.850', '1.3090']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9787', '1.850', '0.2647']