
FEB_4123 05.03.25 15:15:59
TextEdit.txt
15:15:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 15:15:59:ST3_Shared:INFO: FEB-Microcable 15:15:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 15:15:59:febtest:INFO: Testing FEB with SN 4123 15:16:01:smx_tester:INFO: Scanning setup 15:16:01:elinks:INFO: Disabling clock on downlink 0 15:16:01:elinks:INFO: Disabling clock on downlink 1 15:16:01:elinks:INFO: Disabling clock on downlink 2 15:16:01:elinks:INFO: Disabling clock on downlink 3 15:16:01:elinks:INFO: Disabling clock on downlink 4 15:16:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:16:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 15:16:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:16:01:elinks:INFO: Disabling clock on downlink 0 15:16:01:elinks:INFO: Disabling clock on downlink 1 15:16:01:elinks:INFO: Disabling clock on downlink 2 15:16:01:elinks:INFO: Disabling clock on downlink 3 15:16:01:elinks:INFO: Disabling clock on downlink 4 15:16:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:16:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 15:16:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:16:01:elinks:INFO: Disabling clock on downlink 0 15:16:01:elinks:INFO: Disabling clock on downlink 1 15:16:01:elinks:INFO: Disabling clock on downlink 2 15:16:01:elinks:INFO: Disabling clock on downlink 3 15:16:01:elinks:INFO: Disabling clock on downlink 4 15:16:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:16:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 15:16:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 15:16:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:16:01:elinks:INFO: Disabling clock on downlink 0 15:16:01:elinks:INFO: Disabling clock on downlink 1 15:16:01:elinks:INFO: Disabling clock on downlink 2 15:16:01:elinks:INFO: Disabling clock on downlink 3 15:16:01:elinks:INFO: Disabling clock on downlink 4 15:16:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:16:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 15:16:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:16:01:elinks:INFO: Disabling clock on downlink 0 15:16:01:elinks:INFO: Disabling clock on downlink 1 15:16:01:elinks:INFO: Disabling clock on downlink 2 15:16:01:elinks:INFO: Disabling clock on downlink 3 15:16:01:elinks:INFO: Disabling clock on downlink 4 15:16:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 15:16:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 15:16:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 15:16:01:setup_element:INFO: Scanning clock phase 15:16:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 15:16:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 15:16:02:setup_element:INFO: Clock phase scan results for group 0, downlink 2 15:16:02:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________ Clock Delay: 40 15:16:02:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________ Clock Delay: 40 15:16:02:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXX__ Clock Delay: 34 15:16:02:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXX__ Clock Delay: 34 15:16:02:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 15:16:02:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXXXXX_ Clock Delay: 35 15:16:02:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXXX__ Clock Delay: 34 15:16:02:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXXX__ Clock Delay: 34 15:16:02:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________XXXXX___ Clock Delay: 34 15:16:02:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________XXXXX___ Clock Delay: 34 15:16:02:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________XXXXX___ Clock Delay: 34 15:16:02:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________XXXXX___ Clock Delay: 34 15:16:02:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________________XXXXX__ Clock Delay: 35 15:16:02:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________________XXXXX__ Clock Delay: 35 15:16:02:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________ Clock Delay: 40 15:16:02:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________ Clock Delay: 40 15:16:02:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 2 15:16:02:setup_element:INFO: Scanning data phases 15:16:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 15:16:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 15:16:07:setup_element:INFO: Data phase scan results for group 0, downlink 2 15:16:07:setup_element:INFO: Eye window for uplink 16: XXX__________________________________XXX Data delay found: 19 15:16:07:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX Data delay found: 17 15:16:07:setup_element:INFO: Eye window for uplink 18: X__________________________________XXXXX Data delay found: 17 15:16:07:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__ Data delay found: 15 15:16:07:setup_element:INFO: Eye window for uplink 20: XX__________________________________XXXX Data delay found: 18 15:16:07:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX Data delay found: 17 15:16:07:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXXX Data delay found: 17 15:16:07:setup_element:INFO: Eye window for uplink 23: _______________________________XXXXX____ Data delay found: 13 15:16:07:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________ Data delay found: 28 15:16:07:setup_element:INFO: Eye window for uplink 25: ________XXXXXX__________________________ Data delay found: 30 15:16:07:setup_element:INFO: Eye window for uplink 26: ______XXXXXX____________________________ Data delay found: 28 15:16:07:setup_element:INFO: Eye window for uplink 27: _________XXXXXXX________________________ Data delay found: 32 15:16:07:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX_______________________ Data delay found: 33 15:16:07:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________________ Data delay found: 36 15:16:07:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXX____________________ Data delay found: 36 15:16:07:setup_element:INFO: Eye window for uplink 31: _______________XXXX_____________________ Data delay found: 36 15:16:07:setup_element:INFO: Setting the data phase to 19 for uplink 16 15:16:07:setup_element:INFO: Setting the data phase to 17 for uplink 17 15:16:07:setup_element:INFO: Setting the data phase to 17 for uplink 18 15:16:07:setup_element:INFO: Setting the data phase to 15 for uplink 19 15:16:07:setup_element:INFO: Setting the data phase to 18 for uplink 20 15:16:07:setup_element:INFO: Setting the data phase to 17 for uplink 21 15:16:07:setup_element:INFO: Setting the data phase to 17 for uplink 22 15:16:07:setup_element:INFO: Setting the data phase to 13 for uplink 23 15:16:07:setup_element:INFO: Setting the data phase to 28 for uplink 24 15:16:07:setup_element:INFO: Setting the data phase to 30 for uplink 25 15:16:07:setup_element:INFO: Setting the data phase to 28 for uplink 26 15:16:07:setup_element:INFO: Setting the data phase to 32 for uplink 27 15:16:07:setup_element:INFO: Setting the data phase to 33 for uplink 28 15:16:07:setup_element:INFO: Setting the data phase to 36 for uplink 29 15:16:07:setup_element:INFO: Setting the data phase to 36 for uplink 30 15:16:07:setup_element:INFO: Setting the data phase to 36 for uplink 31 15:16:07:setup_element:INFO: Beginning SMX ASICs map scan 15:16:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 15:16:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 15:16:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 15:16:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 15:16:07:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 15:16:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 15:16:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 15:16:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 15:16:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 15:16:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 15:16:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 15:16:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 15:16:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 15:16:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 15:16:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 15:16:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 15:16:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 15:16:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 15:16:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 15:16:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 15:16:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 15:16:10:setup_element:INFO: Performing Elink synchronization 15:16:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 15:16:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 15:16:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 15:16:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 15:16:10:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 15:16:10:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 15:16:11:febtest:INFO: Init all SMX (CSA): 30 15:16:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 15:16:30:febtest:INFO: 23-00 | XA-000-09-004-005-012-019-10 | 31.4 | 1171.5 15:16:30:febtest:INFO: 30-01 | XA-000-09-004-005-018-018-15 | 34.6 | 1159.7 15:16:31:febtest:INFO: 21-02 | XA-000-09-004-005-003-020-14 | 37.7 | 1159.7 15:16:31:febtest:INFO: 28-03 | XA-000-09-004-005-009-020-01 | 40.9 | 1147.8 15:16:31:febtest:INFO: 19-04 | XA-000-09-004-005-006-019-05 | 40.9 | 1147.8 15:16:31:febtest:INFO: 26-05 | XA-000-09-004-005-015-019-04 | 34.6 | 1177.4 15:16:31:febtest:INFO: 17-06 | XA-000-09-004-005-003-019-14 | 37.7 | 1153.7 15:16:32:febtest:INFO: 24-07 | XA-000-09-004-005-006-020-05 | 34.6 | 1189.2 15:16:33:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 15:16:35:ST3_smx:INFO: chip: 23-0 31.389742 C 1183.292940 mV 15:16:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:16:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:16:35:ST3_smx:INFO: Electrons 15:16:35:ST3_smx:INFO: # loops 0 15:16:37:ST3_smx:INFO: # loops 1 15:16:39:ST3_smx:INFO: # loops 2 15:16:41:ST3_smx:INFO: Total # of broken channels: 0 15:16:41:ST3_smx:INFO: List of broken channels: [] 15:16:41:ST3_smx:INFO: Total # of broken channels: 0 15:16:41:ST3_smx:INFO: List of broken channels: [] 15:16:43:ST3_smx:INFO: chip: 30-1 34.556970 C 1171.483840 mV 15:16:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:16:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:16:43:ST3_smx:INFO: Electrons 15:16:43:ST3_smx:INFO: # loops 0 15:16:46:ST3_smx:INFO: # loops 1 15:16:48:ST3_smx:INFO: # loops 2 15:16:50:ST3_smx:INFO: Total # of broken channels: 0 15:16:50:ST3_smx:INFO: List of broken channels: [] 15:16:50:ST3_smx:INFO: Total # of broken channels: 0 15:16:50:ST3_smx:INFO: List of broken channels: [] 15:16:51:ST3_smx:INFO: chip: 21-2 37.726682 C 1177.390875 mV 15:16:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:16:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:16:51:ST3_smx:INFO: Electrons 15:16:51:ST3_smx:INFO: # loops 0 15:16:54:ST3_smx:INFO: # loops 1 15:16:56:ST3_smx:INFO: # loops 2 15:16:58:ST3_smx:INFO: Total # of broken channels: 0 15:16:58:ST3_smx:INFO: List of broken channels: [] 15:16:58:ST3_smx:INFO: Total # of broken channels: 0 15:16:58:ST3_smx:INFO: List of broken channels: [] 15:17:00:ST3_smx:INFO: chip: 28-3 40.898880 C 1159.654860 mV 15:17:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:17:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:17:00:ST3_smx:INFO: Electrons 15:17:00:ST3_smx:INFO: # loops 0 15:17:02:ST3_smx:INFO: # loops 1 15:17:04:ST3_smx:INFO: # loops 2 15:17:06:ST3_smx:INFO: Total # of broken channels: 0 15:17:06:ST3_smx:INFO: List of broken channels: [] 15:17:06:ST3_smx:INFO: Total # of broken channels: 0 15:17:06:ST3_smx:INFO: List of broken channels: [] 15:17:08:ST3_smx:INFO: chip: 19-4 44.073563 C 1159.654860 mV 15:17:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:17:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:17:08:ST3_smx:INFO: Electrons 15:17:08:ST3_smx:INFO: # loops 0 15:17:10:ST3_smx:INFO: # loops 1 15:17:12:ST3_smx:INFO: # loops 2 15:17:14:ST3_smx:INFO: Total # of broken channels: 0 15:17:14:ST3_smx:INFO: List of broken channels: [] 15:17:14:ST3_smx:INFO: Total # of broken channels: 0 15:17:14:ST3_smx:INFO: List of broken channels: [] 15:17:15:ST3_smx:INFO: chip: 26-5 37.726682 C 1195.082160 mV 15:17:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:17:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:17:15:ST3_smx:INFO: Electrons 15:17:15:ST3_smx:INFO: # loops 0 15:17:17:ST3_smx:INFO: # loops 1 15:17:20:ST3_smx:INFO: # loops 2 15:17:22:ST3_smx:INFO: Total # of broken channels: 0 15:17:22:ST3_smx:INFO: List of broken channels: [] 15:17:22:ST3_smx:INFO: Total # of broken channels: 0 15:17:22:ST3_smx:INFO: List of broken channels: [] 15:17:23:ST3_smx:INFO: chip: 17-6 40.898880 C 1165.571835 mV 15:17:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:17:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:17:23:ST3_smx:INFO: Electrons 15:17:23:ST3_smx:INFO: # loops 0 15:17:25:ST3_smx:INFO: # loops 1 15:17:27:ST3_smx:INFO: # loops 2 15:17:29:ST3_smx:INFO: Total # of broken channels: 0 15:17:29:ST3_smx:INFO: List of broken channels: [] 15:17:29:ST3_smx:INFO: Total # of broken channels: 0 15:17:29:ST3_smx:INFO: List of broken channels: [] 15:17:31:ST3_smx:INFO: chip: 24-7 37.726682 C 1200.969315 mV 15:17:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:17:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 15:17:31:ST3_smx:INFO: Electrons 15:17:31:ST3_smx:INFO: # loops 0 15:17:33:ST3_smx:INFO: # loops 1 15:17:35:ST3_smx:INFO: # loops 2 15:17:37:ST3_smx:INFO: Total # of broken channels: 0 15:17:37:ST3_smx:INFO: List of broken channels: [] 15:17:37:ST3_smx:INFO: Total # of broken channels: 0 15:17:37:ST3_smx:INFO: List of broken channels: [] 15:17:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 15:17:37:febtest:INFO: 23-00 | XA-000-09-004-005-012-019-10 | 34.6 | 1201.0 15:17:38:febtest:INFO: 30-01 | XA-000-09-004-005-018-018-15 | 37.7 | 1195.1 15:17:38:febtest:INFO: 21-02 | XA-000-09-004-005-003-020-14 | 37.7 | 1195.1 15:17:38:febtest:INFO: 28-03 | XA-000-09-004-005-009-020-01 | 44.1 | 1183.3 15:17:38:febtest:INFO: 19-04 | XA-000-09-004-005-006-019-05 | 47.3 | 1177.4 15:17:39:febtest:INFO: 26-05 | XA-000-09-004-005-015-019-04 | 37.7 | 1218.6 15:17:39:febtest:INFO: 17-06 | XA-000-09-004-005-003-019-14 | 44.1 | 1183.3 15:17:39:febtest:INFO: 24-07 | XA-000-09-004-005-006-020-05 | 37.7 | 1218.6 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_03_05-15_15_59 OPERATOR : Henrik; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4123| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8970', '1.849', '2.4180'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9870', '1.850', '2.6320'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9580', '1.850', '0.5347']