14:01:23:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:01:23:ST3_Shared:INFO:	                       FEB-Microcable                       
14:01:23:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:01:23:febtest:INFO:	Testing FEB with SN 4124
14:01:25:smx_tester:INFO:	Scanning setup
14:01:25:elinks:INFO:	Disabling clock on downlink 0
14:01:25:elinks:INFO:	Disabling clock on downlink 1
14:01:25:elinks:INFO:	Disabling clock on downlink 2
14:01:25:elinks:INFO:	Disabling clock on downlink 3
14:01:25:elinks:INFO:	Disabling clock on downlink 4
14:01:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:01:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:01:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:01:25:elinks:INFO:	Disabling clock on downlink 0
14:01:25:elinks:INFO:	Disabling clock on downlink 1
14:01:25:elinks:INFO:	Disabling clock on downlink 2
14:01:25:elinks:INFO:	Disabling clock on downlink 3
14:01:25:elinks:INFO:	Disabling clock on downlink 4
14:01:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:01:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:01:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:01:25:elinks:INFO:	Disabling clock on downlink 0
14:01:25:elinks:INFO:	Disabling clock on downlink 1
14:01:25:elinks:INFO:	Disabling clock on downlink 2
14:01:25:elinks:INFO:	Disabling clock on downlink 3
14:01:25:elinks:INFO:	Disabling clock on downlink 4
14:01:25:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:01:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:01:25:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:01:25:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:01:25:elinks:INFO:	Disabling clock on downlink 0
14:01:25:elinks:INFO:	Disabling clock on downlink 1
14:01:26:elinks:INFO:	Disabling clock on downlink 2
14:01:26:elinks:INFO:	Disabling clock on downlink 3
14:01:26:elinks:INFO:	Disabling clock on downlink 4
14:01:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:01:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:01:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:01:26:elinks:INFO:	Disabling clock on downlink 0
14:01:26:elinks:INFO:	Disabling clock on downlink 1
14:01:26:elinks:INFO:	Disabling clock on downlink 2
14:01:26:elinks:INFO:	Disabling clock on downlink 3
14:01:26:elinks:INFO:	Disabling clock on downlink 4
14:01:26:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:01:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:01:26:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:01:26:setup_element:INFO:	Scanning clock phase
14:01:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:01:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:01:26:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:01:26:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:01:26:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:01:26:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________________XXXXX_____
Clock Delay: 32
14:01:26:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXX_____
Clock Delay: 32
14:01:26:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:01:26:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:01:26:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:01:26:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:01:26:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 2
14:01:26:setup_element:INFO:	Scanning data phases
14:01:26:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:01:26:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:01:31:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:01:31:setup_element:INFO:	Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
14:01:31:setup_element:INFO:	Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
14:01:31:setup_element:INFO:	Eye window for uplink 26: ________XXXXX___________________________
Data delay found: 30
14:01:31:setup_element:INFO:	Eye window for uplink 27: ___________XXXXXXX______________________
Data delay found: 34
14:01:31:setup_element:INFO:	Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
14:01:31:setup_element:INFO:	Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
14:01:31:setup_element:INFO:	Eye window for uplink 30: ______________XXXXXXX___________________
Data delay found: 37
14:01:31:setup_element:INFO:	Eye window for uplink 31: _______________XXXXXX___________________
Data delay found: 37
14:01:31:setup_element:INFO:	Setting the data phase to 29 for uplink 24
14:01:31:setup_element:INFO:	Setting the data phase to 32 for uplink 25
14:01:31:setup_element:INFO:	Setting the data phase to 30 for uplink 26
14:01:31:setup_element:INFO:	Setting the data phase to 34 for uplink 27
14:01:31:setup_element:INFO:	Setting the data phase to 35 for uplink 28
14:01:31:setup_element:INFO:	Setting the data phase to 37 for uplink 29
14:01:31:setup_element:INFO:	Setting the data phase to 37 for uplink 30
14:01:31:setup_element:INFO:	Setting the data phase to 37 for uplink 31
14:01:31:setup_element:INFO:	Beginning SMX ASICs map scan
14:01:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:01:31:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:01:31:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:01:31:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:01:31:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
14:01:31:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:01:31:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:01:32:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:01:32:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:01:32:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:01:32:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:01:32:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:01:33:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:01:34:setup_element:INFO:	Performing Elink synchronization
14:01:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:01:34:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:01:34:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:01:34:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:01:34:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:01:34:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:01:34:febtest:INFO:	Init all SMX (CSA): 30
14:01:42:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:01:42:febtest:INFO:	30-01 | XA-000-09-004-005-006-017-05 |  47.3 | 1135.9
14:01:42:febtest:INFO:	28-03 | XA-000-09-004-005-012-016-10 |  44.1 | 1141.9
14:01:42:febtest:INFO:	26-05 | XA-000-09-004-005-009-016-01 |  44.1 | 1153.7
14:01:42:febtest:INFO:	24-07 | XA-000-09-004-005-006-016-05 |  40.9 | 1147.8
14:01:43:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:01:45:ST3_smx:INFO:	chip: 30-1 	 47.250730 C 	 1147.806000 mV
14:01:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:01:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:01:45:ST3_smx:INFO:		Electrons
14:01:45:ST3_smx:INFO:	# loops 0
14:01:47:ST3_smx:INFO:	# loops 1
14:01:49:ST3_smx:INFO:	# loops 2
14:01:50:ST3_smx:INFO:	Total # of broken channels: 0
14:01:50:ST3_smx:INFO:	List of broken channels: []
14:01:50:ST3_smx:INFO:	Total # of broken channels: 0
14:01:50:ST3_smx:INFO:	List of broken channels: []
14:01:52:ST3_smx:INFO:	chip: 28-3 	 44.073563 C 	 1147.806000 mV
14:01:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:01:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:01:52:ST3_smx:INFO:		Electrons
14:01:52:ST3_smx:INFO:	# loops 0
14:01:54:ST3_smx:INFO:	# loops 1
14:01:56:ST3_smx:INFO:	# loops 2
14:01:58:ST3_smx:INFO:	Total # of broken channels: 0
14:01:58:ST3_smx:INFO:	List of broken channels: []
14:01:58:ST3_smx:INFO:	Total # of broken channels: 0
14:01:58:ST3_smx:INFO:	List of broken channels: []
14:02:00:ST3_smx:INFO:	chip: 26-5 	 44.073563 C 	 1159.654860 mV
14:02:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:00:ST3_smx:INFO:		Electrons
14:02:00:ST3_smx:INFO:	# loops 0
14:02:01:ST3_smx:INFO:	# loops 1
14:02:03:ST3_smx:INFO:	# loops 2
14:02:05:ST3_smx:INFO:	Total # of broken channels: 0
14:02:05:ST3_smx:INFO:	List of broken channels: []
14:02:05:ST3_smx:INFO:	Total # of broken channels: 0
14:02:05:ST3_smx:INFO:	List of broken channels: []
14:02:06:ST3_smx:INFO:	chip: 24-7 	 44.073563 C 	 1159.654860 mV
14:02:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:02:06:ST3_smx:INFO:		Electrons
14:02:06:ST3_smx:INFO:	# loops 0
14:02:08:ST3_smx:INFO:	# loops 1
14:02:10:ST3_smx:INFO:	# loops 2
14:02:11:ST3_smx:INFO:	Total # of broken channels: 0
14:02:11:ST3_smx:INFO:	List of broken channels: []
14:02:11:ST3_smx:INFO:	Total # of broken channels: 0
14:02:11:ST3_smx:INFO:	List of broken channels: []
14:02:12:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:02:12:febtest:INFO:	30-01 | XA-000-09-004-005-006-017-05 |  47.3 | 1165.6
14:02:12:febtest:INFO:	28-03 | XA-000-09-004-005-012-016-10 |  44.1 | 1171.5
14:02:12:febtest:INFO:	26-05 | XA-000-09-004-005-009-016-01 |  44.1 | 1195.1
14:02:12:febtest:INFO:	24-07 | XA-000-09-004-005-006-016-05 |  44.1 | 1177.4
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_07-14_01_23
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4124| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0460', '1.850', '1.1690']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0310', '1.850', '1.3150']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9911', '1.850', '0.2667']