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FEB_4124 10.03.25 08:53:56
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08:53:56:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:53:56:ST3_Shared:INFO: FEB-Microcable
08:53:56:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:53:56:febtest:INFO: Testing FEB with SN 4124
08:53:57:smx_tester:INFO: Scanning setup
08:53:57:elinks:INFO: Disabling clock on downlink 0
08:53:57:elinks:INFO: Disabling clock on downlink 1
08:53:57:elinks:INFO: Disabling clock on downlink 2
08:53:57:elinks:INFO: Disabling clock on downlink 3
08:53:57:elinks:INFO: Disabling clock on downlink 4
08:53:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:53:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:58:elinks:INFO: Disabling clock on downlink 0
08:53:58:elinks:INFO: Disabling clock on downlink 1
08:53:58:elinks:INFO: Disabling clock on downlink 2
08:53:58:elinks:INFO: Disabling clock on downlink 3
08:53:58:elinks:INFO: Disabling clock on downlink 4
08:53:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:53:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:58:elinks:INFO: Disabling clock on downlink 0
08:53:58:elinks:INFO: Disabling clock on downlink 1
08:53:58:elinks:INFO: Disabling clock on downlink 2
08:53:58:elinks:INFO: Disabling clock on downlink 3
08:53:58:elinks:INFO: Disabling clock on downlink 4
08:53:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:53:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:53:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:53:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:53:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:53:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:53:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:53:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:53:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:53:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:58:elinks:INFO: Disabling clock on downlink 0
08:53:58:elinks:INFO: Disabling clock on downlink 1
08:53:58:elinks:INFO: Disabling clock on downlink 2
08:53:58:elinks:INFO: Disabling clock on downlink 3
08:53:58:elinks:INFO: Disabling clock on downlink 4
08:53:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:53:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:58:elinks:INFO: Disabling clock on downlink 0
08:53:58:elinks:INFO: Disabling clock on downlink 1
08:53:58:elinks:INFO: Disabling clock on downlink 2
08:53:58:elinks:INFO: Disabling clock on downlink 3
08:53:58:elinks:INFO: Disabling clock on downlink 4
08:53:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:53:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:58:setup_element:INFO: Scanning clock phase
08:53:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:53:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:53:58:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:53:58:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:53:58:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:53:58:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:53:58:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:53:58:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:53:58:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:53:58:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:53:58:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:53:58:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
08:53:58:setup_element:INFO: Scanning data phases
08:53:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:53:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:03:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:54:03:setup_element:INFO: Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
08:54:03:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_________________________
Data delay found: 31
08:54:03:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
08:54:03:setup_element:INFO: Eye window for uplink 27: ___________XXXXXX_______________________
Data delay found: 33
08:54:03:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________
Data delay found: 34
08:54:03:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
08:54:03:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXX____________________
Data delay found: 36
08:54:03:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_____________________
Data delay found: 36
08:54:03:setup_element:INFO: Setting the data phase to 29 for uplink 24
08:54:03:setup_element:INFO: Setting the data phase to 31 for uplink 25
08:54:03:setup_element:INFO: Setting the data phase to 29 for uplink 26
08:54:03:setup_element:INFO: Setting the data phase to 33 for uplink 27
08:54:03:setup_element:INFO: Setting the data phase to 34 for uplink 28
08:54:03:setup_element:INFO: Setting the data phase to 36 for uplink 29
08:54:03:setup_element:INFO: Setting the data phase to 36 for uplink 30
08:54:03:setup_element:INFO: Setting the data phase to 36 for uplink 31
08:54:03:setup_element:INFO: Beginning SMX ASICs map scan
08:54:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:54:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:54:04:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:54:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:54:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:54:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:54:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:54:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:54:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:54:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:54:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:54:06:setup_element:INFO: Performing Elink synchronization
08:54:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:54:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:54:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:54:06:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:54:07:febtest:INFO: Init all SMX (CSA): 30
08:54:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:54:14:febtest:INFO: 30-01 | XA-000-09-004-005-006-017-05 | 44.1 | 1135.9
08:54:14:febtest:INFO: 28-03 | XA-000-09-004-005-012-016-10 | 40.9 | 1135.9
08:54:14:febtest:INFO: 26-05 | XA-000-09-004-005-009-016-01 | 40.9 | 1147.8
08:54:15:febtest:INFO: 24-07 | XA-000-09-004-005-006-016-05 | 40.9 | 1147.8
08:54:16:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:54:18:ST3_smx:INFO: chip: 30-1 47.250730 C 1147.806000 mV
08:54:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:18:ST3_smx:INFO: Electrons
08:54:18:ST3_smx:INFO: # loops 0
08:54:19:ST3_smx:INFO: # loops 1
08:54:21:ST3_smx:INFO: # loops 2
08:54:22:ST3_smx:INFO: Total # of broken channels: 0
08:54:22:ST3_smx:INFO: List of broken channels: []
08:54:22:ST3_smx:INFO: Total # of broken channels: 0
08:54:22:ST3_smx:INFO: List of broken channels: []
08:54:24:ST3_smx:INFO: chip: 28-3 40.898880 C 1153.732915 mV
08:54:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:24:ST3_smx:INFO: Electrons
08:54:24:ST3_smx:INFO: # loops 0
08:54:26:ST3_smx:INFO: # loops 1
08:54:27:ST3_smx:INFO: # loops 2
08:54:29:ST3_smx:INFO: Total # of broken channels: 0
08:54:29:ST3_smx:INFO: List of broken channels: []
08:54:29:ST3_smx:INFO: Total # of broken channels: 0
08:54:29:ST3_smx:INFO: List of broken channels: []
08:54:30:ST3_smx:INFO: chip: 26-5 40.898880 C 1159.654860 mV
08:54:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:30:ST3_smx:INFO: Electrons
08:54:30:ST3_smx:INFO: # loops 0
08:54:32:ST3_smx:INFO: # loops 1
08:54:34:ST3_smx:INFO: # loops 2
08:54:35:ST3_smx:INFO: Total # of broken channels: 0
08:54:35:ST3_smx:INFO: List of broken channels: []
08:54:35:ST3_smx:INFO: Total # of broken channels: 0
08:54:35:ST3_smx:INFO: List of broken channels: []
08:54:37:ST3_smx:INFO: chip: 24-7 40.898880 C 1159.654860 mV
08:54:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:37:ST3_smx:INFO: Electrons
08:54:37:ST3_smx:INFO: # loops 0
08:54:39:ST3_smx:INFO: # loops 1
08:54:41:ST3_smx:INFO: # loops 2
08:54:42:ST3_smx:INFO: Total # of broken channels: 0
08:54:42:ST3_smx:INFO: List of broken channels: []
08:54:42:ST3_smx:INFO: Total # of broken channels: 0
08:54:42:ST3_smx:INFO: List of broken channels: []
08:54:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:54:43:febtest:INFO: 30-01 | XA-000-09-004-005-006-017-05 | 47.3 | 1165.6
08:54:43:febtest:INFO: 28-03 | XA-000-09-004-005-012-016-10 | 40.9 | 1171.5
08:54:43:febtest:INFO: 26-05 | XA-000-09-004-005-009-016-01 | 40.9 | 1189.2
08:54:43:febtest:INFO: 24-07 | XA-000-09-004-005-006-016-05 | 44.1 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_10-08_53_56
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4124| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.453', '0.8650', '1.850', '1.2800']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0310', '1.850', '1.3160']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9906', '1.850', '0.2665']