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FEB_4125 06.03.25 14:34:16
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14:34:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:34:16:ST3_Shared:INFO: FEB-Microcable
14:34:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:34:16:febtest:INFO: Testing FEB with SN 4125
14:34:17:smx_tester:INFO: Scanning setup
14:34:17:elinks:INFO: Disabling clock on downlink 0
14:34:17:elinks:INFO: Disabling clock on downlink 1
14:34:17:elinks:INFO: Disabling clock on downlink 2
14:34:17:elinks:INFO: Disabling clock on downlink 3
14:34:17:elinks:INFO: Disabling clock on downlink 4
14:34:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:34:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:18:elinks:INFO: Disabling clock on downlink 0
14:34:18:elinks:INFO: Disabling clock on downlink 1
14:34:18:elinks:INFO: Disabling clock on downlink 2
14:34:18:elinks:INFO: Disabling clock on downlink 3
14:34:18:elinks:INFO: Disabling clock on downlink 4
14:34:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:18:elinks:INFO: Disabling clock on downlink 0
14:34:18:elinks:INFO: Disabling clock on downlink 1
14:34:18:elinks:INFO: Disabling clock on downlink 2
14:34:18:elinks:INFO: Disabling clock on downlink 3
14:34:18:elinks:INFO: Disabling clock on downlink 4
14:34:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:34:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:34:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:18:elinks:INFO: Disabling clock on downlink 0
14:34:18:elinks:INFO: Disabling clock on downlink 1
14:34:18:elinks:INFO: Disabling clock on downlink 2
14:34:18:elinks:INFO: Disabling clock on downlink 3
14:34:18:elinks:INFO: Disabling clock on downlink 4
14:34:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:34:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:18:elinks:INFO: Disabling clock on downlink 0
14:34:18:elinks:INFO: Disabling clock on downlink 1
14:34:18:elinks:INFO: Disabling clock on downlink 2
14:34:18:elinks:INFO: Disabling clock on downlink 3
14:34:18:elinks:INFO: Disabling clock on downlink 4
14:34:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:34:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:18:setup_element:INFO: Scanning clock phase
14:34:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:34:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:34:18:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:34:18:setup_element:INFO: Eye window for uplink 16: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:34:18:setup_element:INFO: Eye window for uplink 17: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:34:19:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:34:19:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:34:19:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:34:19:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:34:19:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:34:19:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:34:19:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:34:19:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:34:19:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
14:34:19:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
14:34:19:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:34:19:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:34:19:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:34:19:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:34:19:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
14:34:19:setup_element:INFO: Scanning data phases
14:34:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:34:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:34:24:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:34:24:setup_element:INFO: Eye window for uplink 16: XXX__________________________________XXX
Data delay found: 19
14:34:24:setup_element:INFO: Eye window for uplink 17: X___________________________________XXXX
Data delay found: 18
14:34:24:setup_element:INFO: Eye window for uplink 18: X__________________________________XXXXX
Data delay found: 17
14:34:24:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXXX_
Data delay found: 15
14:34:24:setup_element:INFO: Eye window for uplink 20: ________________________________XXX_____
Data delay found: 13
14:34:24:setup_element:INFO: Eye window for uplink 21: _______________________________XXXX_____
Data delay found: 12
14:34:24:setup_element:INFO: Eye window for uplink 22: __________________________________XXXXX_
Data delay found: 16
14:34:24:setup_element:INFO: Eye window for uplink 23: ______________________________XXXXX_____
Data delay found: 12
14:34:24:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
14:34:24:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
14:34:24:setup_element:INFO: Eye window for uplink 26: ______XXXXXX____________________________
Data delay found: 28
14:34:24:setup_element:INFO: Eye window for uplink 27: __________XXXXXXX_______________________
Data delay found: 33
14:34:24:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
14:34:24:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
14:34:24:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
14:34:24:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX___________________
Data delay found: 37
14:34:24:setup_element:INFO: Setting the data phase to 19 for uplink 16
14:34:24:setup_element:INFO: Setting the data phase to 18 for uplink 17
14:34:24:setup_element:INFO: Setting the data phase to 17 for uplink 18
14:34:24:setup_element:INFO: Setting the data phase to 15 for uplink 19
14:34:24:setup_element:INFO: Setting the data phase to 13 for uplink 20
14:34:24:setup_element:INFO: Setting the data phase to 12 for uplink 21
14:34:24:setup_element:INFO: Setting the data phase to 16 for uplink 22
14:34:24:setup_element:INFO: Setting the data phase to 12 for uplink 23
14:34:24:setup_element:INFO: Setting the data phase to 28 for uplink 24
14:34:24:setup_element:INFO: Setting the data phase to 31 for uplink 25
14:34:24:setup_element:INFO: Setting the data phase to 28 for uplink 26
14:34:24:setup_element:INFO: Setting the data phase to 33 for uplink 27
14:34:24:setup_element:INFO: Setting the data phase to 34 for uplink 28
14:34:24:setup_element:INFO: Setting the data phase to 36 for uplink 29
14:34:24:setup_element:INFO: Setting the data phase to 36 for uplink 30
14:34:24:setup_element:INFO: Setting the data phase to 37 for uplink 31
14:34:24:setup_element:INFO: Beginning SMX ASICs map scan
14:34:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:34:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:34:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:34:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:34:24:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:34:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:34:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:34:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:34:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:34:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:34:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:34:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:34:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:34:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:34:25:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:34:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:34:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:34:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:34:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:34:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:34:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:34:27:setup_element:INFO: Performing Elink synchronization
14:34:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:34:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:34:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:34:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:34:27:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:34:27:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:34:27:febtest:INFO: Init all SMX (CSA): 30
14:34:46:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:34:46:febtest:INFO: 23-00 | XA-000-09-004-005-003-012-09 | 31.4 | 1171.5
14:34:46:febtest:INFO: 30-01 | XA-000-09-004-005-010-027-15 | 37.7 | 1171.5
14:34:46:febtest:INFO: 21-02 | XA-000-09-004-005-009-012-06 | 47.3 | 1118.1
14:34:46:febtest:INFO: 28-03 | XA-000-09-004-005-008-027-12 | 40.9 | 1153.7
14:34:47:febtest:INFO: 19-04 | XA-000-09-004-005-009-013-06 | 47.3 | 1130.0
14:34:47:febtest:INFO: 26-05 | XA-000-09-004-005-011-027-02 | 28.2 | 1195.1
14:34:47:febtest:INFO: 17-06 | XA-000-09-004-005-003-011-09 | 40.9 | 1153.7
14:34:47:febtest:INFO: 24-07 | XA-000-09-004-005-012-027-10 | 31.4 | 1189.2
14:34:48:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:34:50:ST3_smx:INFO: chip: 23-0 31.389742 C 1183.292940 mV
14:34:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:50:ST3_smx:INFO: Electrons
14:34:50:ST3_smx:INFO: # loops 0
14:34:52:ST3_smx:INFO: # loops 1
14:34:54:ST3_smx:INFO: # loops 2
14:34:56:ST3_smx:INFO: Total # of broken channels: 0
14:34:56:ST3_smx:INFO: List of broken channels: []
14:34:56:ST3_smx:INFO: Total # of broken channels: 0
14:34:56:ST3_smx:INFO: List of broken channels: []
14:34:58:ST3_smx:INFO: chip: 30-1 37.726682 C 1183.292940 mV
14:34:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:58:ST3_smx:INFO: Electrons
14:34:58:ST3_smx:INFO: # loops 0
14:35:00:ST3_smx:INFO: # loops 1
14:35:03:ST3_smx:INFO: # loops 2
14:35:05:ST3_smx:INFO: Total # of broken channels: 0
14:35:05:ST3_smx:INFO: List of broken channels: []
14:35:05:ST3_smx:INFO: Total # of broken channels: 0
14:35:05:ST3_smx:INFO: List of broken channels: []
14:35:06:ST3_smx:INFO: chip: 21-2 50.430383 C 1129.995435 mV
14:35:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:06:ST3_smx:INFO: Electrons
14:35:06:ST3_smx:INFO: # loops 0
14:35:08:ST3_smx:INFO: # loops 1
14:35:10:ST3_smx:INFO: # loops 2
14:35:13:ST3_smx:INFO: Total # of broken channels: 0
14:35:13:ST3_smx:INFO: List of broken channels: []
14:35:13:ST3_smx:INFO: Total # of broken channels: 0
14:35:13:ST3_smx:INFO: List of broken channels: []
14:35:14:ST3_smx:INFO: chip: 28-3 40.898880 C 1171.483840 mV
14:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:14:ST3_smx:INFO: Electrons
14:35:14:ST3_smx:INFO: # loops 0
14:35:16:ST3_smx:INFO: # loops 1
14:35:19:ST3_smx:INFO: # loops 2
14:35:21:ST3_smx:INFO: Total # of broken channels: 0
14:35:21:ST3_smx:INFO: List of broken channels: []
14:35:21:ST3_smx:INFO: Total # of broken channels: 4
14:35:21:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7]
14:35:22:ST3_smx:INFO: chip: 19-4 47.250730 C 1141.874115 mV
14:35:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:22:ST3_smx:INFO: Electrons
14:35:22:ST3_smx:INFO: # loops 0
14:35:24:ST3_smx:INFO: # loops 1
14:35:26:ST3_smx:INFO: # loops 2
14:35:28:ST3_smx:INFO: Total # of broken channels: 0
14:35:28:ST3_smx:INFO: List of broken channels: []
14:35:28:ST3_smx:INFO: Total # of broken channels: 0
14:35:28:ST3_smx:INFO: List of broken channels: []
14:35:30:ST3_smx:INFO: chip: 26-5 31.389742 C 1206.851500 mV
14:35:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:30:ST3_smx:INFO: Electrons
14:35:30:ST3_smx:INFO: # loops 0
14:35:32:ST3_smx:INFO: # loops 1
14:35:34:ST3_smx:INFO: # loops 2
14:35:36:ST3_smx:INFO: Total # of broken channels: 0
14:35:36:ST3_smx:INFO: List of broken channels: []
14:35:36:ST3_smx:INFO: Total # of broken channels: 0
14:35:36:ST3_smx:INFO: List of broken channels: []
14:35:38:ST3_smx:INFO: chip: 17-6 44.073563 C 1159.654860 mV
14:35:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:38:ST3_smx:INFO: Electrons
14:35:38:ST3_smx:INFO: # loops 0
14:35:40:ST3_smx:INFO: # loops 1
14:35:42:ST3_smx:INFO: # loops 2
14:35:44:ST3_smx:INFO: Total # of broken channels: 0
14:35:44:ST3_smx:INFO: List of broken channels: []
14:35:44:ST3_smx:INFO: Total # of broken channels: 0
14:35:44:ST3_smx:INFO: List of broken channels: []
14:35:46:ST3_smx:INFO: chip: 24-7 34.556970 C 1200.969315 mV
14:35:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:46:ST3_smx:INFO: Electrons
14:35:46:ST3_smx:INFO: # loops 0
14:35:48:ST3_smx:INFO: # loops 1
14:35:50:ST3_smx:INFO: # loops 2
14:35:52:ST3_smx:INFO: Total # of broken channels: 0
14:35:52:ST3_smx:INFO: List of broken channels: []
14:35:52:ST3_smx:INFO: Total # of broken channels: 0
14:35:52:ST3_smx:INFO: List of broken channels: []
14:35:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:35:53:febtest:INFO: 23-00 | XA-000-09-004-005-003-012-09 | 34.6 | 1206.9
14:35:53:febtest:INFO: 30-01 | XA-000-09-004-005-010-027-15 | 37.7 | 1206.9
14:35:53:febtest:INFO: 21-02 | XA-000-09-004-005-009-012-06 | 50.4 | 1159.7
14:35:53:febtest:INFO: 28-03 | XA-000-09-004-005-008-027-12 | 44.1 | 1189.2
14:35:54:febtest:INFO: 19-04 | XA-000-09-004-005-009-013-06 | 50.4 | 1159.7
14:35:54:febtest:INFO: 26-05 | XA-000-09-004-005-011-027-02 | 31.4 | 1224.5
14:35:54:febtest:INFO: 17-06 | XA-000-09-004-005-003-011-09 | 44.1 | 1183.3
14:35:54:febtest:INFO: 24-07 | XA-000-09-004-005-012-027-10 | 34.6 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_06-14_34_16
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4125| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4260', '1.850', '1.9460']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9700', '1.850', '2.6070']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9450', '1.850', '0.5194']