14:43:38:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:43:38:ST3_Shared:INFO:	                       FEB-Microcable                       
14:43:38:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:43:38:febtest:INFO:	Testing FEB with SN 4126
14:43:40:smx_tester:INFO:	Scanning setup
14:43:40:elinks:INFO:	Disabling clock on downlink 0
14:43:40:elinks:INFO:	Disabling clock on downlink 1
14:43:40:elinks:INFO:	Disabling clock on downlink 2
14:43:40:elinks:INFO:	Disabling clock on downlink 3
14:43:40:elinks:INFO:	Disabling clock on downlink 4
14:43:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:43:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:43:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:43:40:elinks:INFO:	Disabling clock on downlink 0
14:43:40:elinks:INFO:	Disabling clock on downlink 1
14:43:40:elinks:INFO:	Disabling clock on downlink 2
14:43:40:elinks:INFO:	Disabling clock on downlink 3
14:43:40:elinks:INFO:	Disabling clock on downlink 4
14:43:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:43:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:43:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:43:40:elinks:INFO:	Disabling clock on downlink 0
14:43:40:elinks:INFO:	Disabling clock on downlink 1
14:43:40:elinks:INFO:	Disabling clock on downlink 2
14:43:40:elinks:INFO:	Disabling clock on downlink 3
14:43:40:elinks:INFO:	Disabling clock on downlink 4
14:43:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:43:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:43:40:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:43:40:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:43:40:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:43:40:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:43:40:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:43:40:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:43:40:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:43:40:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:43:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:43:40:elinks:INFO:	Disabling clock on downlink 0
14:43:41:elinks:INFO:	Disabling clock on downlink 1
14:43:41:elinks:INFO:	Disabling clock on downlink 2
14:43:41:elinks:INFO:	Disabling clock on downlink 3
14:43:41:elinks:INFO:	Disabling clock on downlink 4
14:43:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:43:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:43:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:43:41:elinks:INFO:	Disabling clock on downlink 0
14:43:41:elinks:INFO:	Disabling clock on downlink 1
14:43:41:elinks:INFO:	Disabling clock on downlink 2
14:43:41:elinks:INFO:	Disabling clock on downlink 3
14:43:41:elinks:INFO:	Disabling clock on downlink 4
14:43:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:43:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:43:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:43:41:setup_element:INFO:	Scanning clock phase
14:43:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:43:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:43:41:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:43:41:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:43:41:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:43:41:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:43:41:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:43:41:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
14:43:41:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
14:43:41:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:43:41:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:43:41:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
14:43:41:setup_element:INFO:	Scanning data phases
14:43:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:43:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:43:46:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:43:46:setup_element:INFO:	Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
14:43:46:setup_element:INFO:	Eye window for uplink 25: ___________XXXXXX_______________________
Data delay found: 33
14:43:46:setup_element:INFO:	Eye window for uplink 26: _____XXXXX______________________________
Data delay found: 27
14:43:46:setup_element:INFO:	Eye window for uplink 27: ________XXXXXXX_________________________
Data delay found: 31
14:43:46:setup_element:INFO:	Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
14:43:46:setup_element:INFO:	Eye window for uplink 29: _______________XXXXX____________________
Data delay found: 37
14:43:46:setup_element:INFO:	Eye window for uplink 30: _____________XXXXXXX____________________
Data delay found: 36
14:43:46:setup_element:INFO:	Eye window for uplink 31: ______________XXXXX_____________________
Data delay found: 36
14:43:46:setup_element:INFO:	Setting the data phase to 30 for uplink 24
14:43:46:setup_element:INFO:	Setting the data phase to 33 for uplink 25
14:43:46:setup_element:INFO:	Setting the data phase to 27 for uplink 26
14:43:46:setup_element:INFO:	Setting the data phase to 31 for uplink 27
14:43:46:setup_element:INFO:	Setting the data phase to 35 for uplink 28
14:43:46:setup_element:INFO:	Setting the data phase to 37 for uplink 29
14:43:46:setup_element:INFO:	Setting the data phase to 36 for uplink 30
14:43:46:setup_element:INFO:	Setting the data phase to 36 for uplink 31
14:43:46:setup_element:INFO:	Beginning SMX ASICs map scan
14:43:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:43:46:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:43:46:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:43:46:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:43:46:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
14:43:46:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:43:46:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:43:47:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:43:47:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:43:47:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:43:47:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:43:47:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:43:47:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:43:49:setup_element:INFO:	Performing Elink synchronization
14:43:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:43:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:43:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:43:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:43:49:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:43:49:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:43:49:febtest:INFO:	Init all SMX (CSA): 30
14:43:57:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:43:57:febtest:INFO:	30-01 | XA-000-09-004-005-014-007-14 |  37.7 | 1165.6
14:43:57:febtest:INFO:	28-03 | XA-000-09-004-005-014-004-14 |  40.9 | 1177.4
14:43:57:febtest:INFO:	26-05 | XA-000-09-004-005-014-006-14 |  40.9 | 1165.6
14:43:58:febtest:INFO:	24-07 | XA-000-09-004-005-017-007-06 |  34.6 | 1177.4
14:43:59:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:44:01:ST3_smx:INFO:	chip: 30-1 	 40.898880 C 	 1177.390875 mV
14:44:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:44:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:44:01:ST3_smx:INFO:		Electrons
14:44:01:ST3_smx:INFO:	# loops 0
14:44:02:ST3_smx:INFO:	# loops 1
14:44:04:ST3_smx:INFO:	# loops 2
14:44:06:ST3_smx:INFO:	Total # of broken channels: 0
14:44:06:ST3_smx:INFO:	List of broken channels: []
14:44:06:ST3_smx:INFO:	Total # of broken channels: 0
14:44:06:ST3_smx:INFO:	List of broken channels: []
14:44:07:ST3_smx:INFO:	chip: 28-3 	 40.898880 C 	 1183.292940 mV
14:44:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:44:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:44:07:ST3_smx:INFO:		Electrons
14:44:07:ST3_smx:INFO:	# loops 0
14:44:09:ST3_smx:INFO:	# loops 1
14:44:10:ST3_smx:INFO:	# loops 2
14:44:12:ST3_smx:INFO:	Total # of broken channels: 0
14:44:12:ST3_smx:INFO:	List of broken channels: []
14:44:12:ST3_smx:INFO:	Total # of broken channels: 0
14:44:12:ST3_smx:INFO:	List of broken channels: []
14:44:14:ST3_smx:INFO:	chip: 26-5 	 44.073563 C 	 1171.483840 mV
14:44:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:44:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:44:14:ST3_smx:INFO:		Electrons
14:44:14:ST3_smx:INFO:	# loops 0
14:44:15:ST3_smx:INFO:	# loops 1
14:44:17:ST3_smx:INFO:	# loops 2
14:44:18:ST3_smx:INFO:	Total # of broken channels: 0
14:44:18:ST3_smx:INFO:	List of broken channels: []
14:44:18:ST3_smx:INFO:	Total # of broken channels: 0
14:44:18:ST3_smx:INFO:	List of broken channels: []
14:44:20:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1183.292940 mV
14:44:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:44:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:44:20:ST3_smx:INFO:		Electrons
14:44:20:ST3_smx:INFO:	# loops 0
14:44:22:ST3_smx:INFO:	# loops 1
14:44:23:ST3_smx:INFO:	# loops 2
14:44:25:ST3_smx:INFO:	Total # of broken channels: 0
14:44:25:ST3_smx:INFO:	List of broken channels: []
14:44:25:ST3_smx:INFO:	Total # of broken channels: 0
14:44:25:ST3_smx:INFO:	List of broken channels: []
14:44:25:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:44:25:febtest:INFO:	30-01 | XA-000-09-004-005-014-007-14 |  40.9 | 1195.1
14:44:26:febtest:INFO:	28-03 | XA-000-09-004-005-014-004-14 |  40.9 | 1206.9
14:44:26:febtest:INFO:	26-05 | XA-000-09-004-005-014-006-14 |  44.1 | 1189.2
14:44:26:febtest:INFO:	24-07 | XA-000-09-004-005-017-007-06 |  40.9 | 1201.0
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_06-14_43_38
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4126| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.6987', '1.850', '1.1380']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9818', '1.850', '1.2670']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9661', '1.850', '0.2609']