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FEB_4126 07.03.25 10:53:20
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10:53:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:53:20:ST3_Shared:INFO: FEB-Microcable
10:53:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:53:20:febtest:INFO: Testing FEB with SN 4126
10:53:22:smx_tester:INFO: Scanning setup
10:53:22:elinks:INFO: Disabling clock on downlink 0
10:53:22:elinks:INFO: Disabling clock on downlink 1
10:53:22:elinks:INFO: Disabling clock on downlink 2
10:53:22:elinks:INFO: Disabling clock on downlink 3
10:53:22:elinks:INFO: Disabling clock on downlink 4
10:53:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:53:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:53:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:53:22:elinks:INFO: Disabling clock on downlink 0
10:53:22:elinks:INFO: Disabling clock on downlink 1
10:53:22:elinks:INFO: Disabling clock on downlink 2
10:53:22:elinks:INFO: Disabling clock on downlink 3
10:53:22:elinks:INFO: Disabling clock on downlink 4
10:53:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:53:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:53:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:53:22:elinks:INFO: Disabling clock on downlink 0
10:53:22:elinks:INFO: Disabling clock on downlink 1
10:53:22:elinks:INFO: Disabling clock on downlink 2
10:53:22:elinks:INFO: Disabling clock on downlink 3
10:53:22:elinks:INFO: Disabling clock on downlink 4
10:53:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:53:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:53:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:53:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:53:22:elinks:INFO: Disabling clock on downlink 0
10:53:22:elinks:INFO: Disabling clock on downlink 1
10:53:22:elinks:INFO: Disabling clock on downlink 2
10:53:22:elinks:INFO: Disabling clock on downlink 3
10:53:22:elinks:INFO: Disabling clock on downlink 4
10:53:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:53:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:53:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:53:22:elinks:INFO: Disabling clock on downlink 0
10:53:22:elinks:INFO: Disabling clock on downlink 1
10:53:22:elinks:INFO: Disabling clock on downlink 2
10:53:22:elinks:INFO: Disabling clock on downlink 3
10:53:22:elinks:INFO: Disabling clock on downlink 4
10:53:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:53:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:53:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:53:22:setup_element:INFO: Scanning clock phase
10:53:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:53:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:53:23:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:53:23:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:53:23:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:53:23:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:53:23:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:53:23:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:53:23:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:53:23:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:53:23:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:53:23:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:53:23:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:53:23:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:53:23:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:53:23:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:53:23:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:53:23:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:53:23:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:53:23:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
10:53:23:setup_element:INFO: Scanning data phases
10:53:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:53:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:53:28:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:53:28:setup_element:INFO: Eye window for uplink 16: XX__________________________________XXXX
Data delay found: 18
10:53:28:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXX_
Data delay found: 17
10:53:28:setup_element:INFO: Eye window for uplink 18: X__________________________________XXXXX
Data delay found: 17
10:53:28:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXXX_
Data delay found: 15
10:53:28:setup_element:INFO: Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
10:53:28:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
10:53:28:setup_element:INFO: Eye window for uplink 22: X___________________________________XXXX
Data delay found: 18
10:53:28:setup_element:INFO: Eye window for uplink 23: ________________________________XXXX____
Data delay found: 13
10:53:28:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
10:53:28:setup_element:INFO: Eye window for uplink 25: ___________XXXXXX_______________________
Data delay found: 33
10:53:28:setup_element:INFO: Eye window for uplink 26: _____XXXXXX_____________________________
Data delay found: 27
10:53:28:setup_element:INFO: Eye window for uplink 27: _________XXXXXXX________________________
Data delay found: 32
10:53:28:setup_element:INFO: Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
10:53:28:setup_element:INFO: Eye window for uplink 29: ________________XXXXXX__________________
Data delay found: 38
10:53:28:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
10:53:28:setup_element:INFO: Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
10:53:28:setup_element:INFO: Setting the data phase to 18 for uplink 16
10:53:28:setup_element:INFO: Setting the data phase to 17 for uplink 17
10:53:28:setup_element:INFO: Setting the data phase to 17 for uplink 18
10:53:28:setup_element:INFO: Setting the data phase to 15 for uplink 19
10:53:28:setup_element:INFO: Setting the data phase to 15 for uplink 20
10:53:28:setup_element:INFO: Setting the data phase to 15 for uplink 21
10:53:28:setup_element:INFO: Setting the data phase to 18 for uplink 22
10:53:28:setup_element:INFO: Setting the data phase to 13 for uplink 23
10:53:28:setup_element:INFO: Setting the data phase to 30 for uplink 24
10:53:28:setup_element:INFO: Setting the data phase to 33 for uplink 25
10:53:28:setup_element:INFO: Setting the data phase to 27 for uplink 26
10:53:28:setup_element:INFO: Setting the data phase to 32 for uplink 27
10:53:28:setup_element:INFO: Setting the data phase to 36 for uplink 28
10:53:28:setup_element:INFO: Setting the data phase to 38 for uplink 29
10:53:28:setup_element:INFO: Setting the data phase to 37 for uplink 30
10:53:28:setup_element:INFO: Setting the data phase to 38 for uplink 31
10:53:28:setup_element:INFO: Beginning SMX ASICs map scan
10:53:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:53:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:53:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:53:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:53:28:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:53:28:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:53:28:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:53:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:53:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:53:28:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:53:28:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:53:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:53:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:53:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:53:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:53:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:53:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:53:29:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:53:29:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:53:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:53:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:53:31:setup_element:INFO: Performing Elink synchronization
10:53:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:53:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:53:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:53:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:53:31:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:53:31:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:53:31:febtest:INFO: Init all SMX (CSA): 30
10:53:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:53:45:febtest:INFO: 23-00 | XA-000-09-004-005-014-010-14 | 28.2 | 1195.1
10:53:46:febtest:INFO: 30-01 | XA-000-09-004-005-014-007-14 | 40.9 | 1159.7
10:53:46:febtest:INFO: 21-02 | XA-000-09-004-005-011-010-05 | 40.9 | 1147.8
10:53:46:febtest:INFO: 28-03 | XA-000-09-004-005-014-004-14 | 37.7 | 1171.5
10:53:46:febtest:INFO: 19-04 | XA-000-09-004-005-008-010-11 | 37.7 | 1165.6
10:53:46:febtest:INFO: 26-05 | XA-000-09-004-005-014-006-14 | 40.9 | 1159.7
10:53:47:febtest:INFO: 17-06 | XA-000-09-004-005-005-010-12 | 37.7 | 1165.6
10:53:47:febtest:INFO: 24-07 | XA-000-09-004-005-017-007-06 | 37.7 | 1171.5
10:53:48:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:53:50:ST3_smx:INFO: chip: 23-0 28.225000 C 1206.851500 mV
10:53:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:53:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:53:50:ST3_smx:INFO: Electrons
10:53:50:ST3_smx:INFO: # loops 0
10:53:51:ST3_smx:INFO: # loops 1
10:53:53:ST3_smx:INFO: # loops 2
10:53:55:ST3_smx:INFO: Total # of broken channels: 0
10:53:55:ST3_smx:INFO: List of broken channels: []
10:53:55:ST3_smx:INFO: Total # of broken channels: 0
10:53:55:ST3_smx:INFO: List of broken channels: []
10:53:56:ST3_smx:INFO: chip: 30-1 40.898880 C 1177.390875 mV
10:53:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:53:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:53:56:ST3_smx:INFO: Electrons
10:53:56:ST3_smx:INFO: # loops 0
10:53:58:ST3_smx:INFO: # loops 1
10:54:00:ST3_smx:INFO: # loops 2
10:54:01:ST3_smx:INFO: Total # of broken channels: 0
10:54:01:ST3_smx:INFO: List of broken channels: []
10:54:01:ST3_smx:INFO: Total # of broken channels: 0
10:54:01:ST3_smx:INFO: List of broken channels: []
10:54:03:ST3_smx:INFO: chip: 21-2 40.898880 C 1159.654860 mV
10:54:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:03:ST3_smx:INFO: Electrons
10:54:03:ST3_smx:INFO: # loops 0
10:54:04:ST3_smx:INFO: # loops 1
10:54:06:ST3_smx:INFO: # loops 2
10:54:08:ST3_smx:INFO: Total # of broken channels: 0
10:54:08:ST3_smx:INFO: List of broken channels: []
10:54:08:ST3_smx:INFO: Total # of broken channels: 0
10:54:08:ST3_smx:INFO: List of broken channels: []
10:54:09:ST3_smx:INFO: chip: 28-3 40.898880 C 1183.292940 mV
10:54:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:09:ST3_smx:INFO: Electrons
10:54:09:ST3_smx:INFO: # loops 0
10:54:11:ST3_smx:INFO: # loops 1
10:54:13:ST3_smx:INFO: # loops 2
10:54:14:ST3_smx:INFO: Total # of broken channels: 0
10:54:14:ST3_smx:INFO: List of broken channels: []
10:54:14:ST3_smx:INFO: Total # of broken channels: 0
10:54:14:ST3_smx:INFO: List of broken channels: []
10:54:16:ST3_smx:INFO: chip: 19-4 40.898880 C 1177.390875 mV
10:54:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:16:ST3_smx:INFO: Electrons
10:54:16:ST3_smx:INFO: # loops 0
10:54:17:ST3_smx:INFO: # loops 1
10:54:19:ST3_smx:INFO: # loops 2
10:54:20:ST3_smx:INFO: Total # of broken channels: 0
10:54:20:ST3_smx:INFO: List of broken channels: []
10:54:20:ST3_smx:INFO: Total # of broken channels: 0
10:54:20:ST3_smx:INFO: List of broken channels: []
10:54:22:ST3_smx:INFO: chip: 26-5 44.073563 C 1171.483840 mV
10:54:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:22:ST3_smx:INFO: Electrons
10:54:22:ST3_smx:INFO: # loops 0
10:54:24:ST3_smx:INFO: # loops 1
10:54:25:ST3_smx:INFO: # loops 2
10:54:27:ST3_smx:INFO: Total # of broken channels: 0
10:54:27:ST3_smx:INFO: List of broken channels: []
10:54:27:ST3_smx:INFO: Total # of broken channels: 1
10:54:27:ST3_smx:INFO: List of broken channels: [3]
10:54:28:ST3_smx:INFO: chip: 17-6 40.898880 C 1177.390875 mV
10:54:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:28:ST3_smx:INFO: Electrons
10:54:28:ST3_smx:INFO: # loops 0
10:54:30:ST3_smx:INFO: # loops 1
10:54:31:ST3_smx:INFO: # loops 2
10:54:33:ST3_smx:INFO: Total # of broken channels: 0
10:54:33:ST3_smx:INFO: List of broken channels: []
10:54:33:ST3_smx:INFO: Total # of broken channels: 0
10:54:33:ST3_smx:INFO: List of broken channels: []
10:54:35:ST3_smx:INFO: chip: 24-7 40.898880 C 1183.292940 mV
10:54:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:54:35:ST3_smx:INFO: Electrons
10:54:35:ST3_smx:INFO: # loops 0
10:54:36:ST3_smx:INFO: # loops 1
10:54:38:ST3_smx:INFO: # loops 2
10:54:39:ST3_smx:INFO: Total # of broken channels: 0
10:54:39:ST3_smx:INFO: List of broken channels: []
10:54:39:ST3_smx:INFO: Total # of broken channels: 0
10:54:39:ST3_smx:INFO: List of broken channels: []
10:54:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:54:40:febtest:INFO: 23-00 | XA-000-09-004-005-014-010-14 | 28.2 | 1230.3
10:54:40:febtest:INFO: 30-01 | XA-000-09-004-005-014-007-14 | 40.9 | 1195.1
10:54:40:febtest:INFO: 21-02 | XA-000-09-004-005-011-010-05 | 44.1 | 1183.3
10:54:40:febtest:INFO: 28-03 | XA-000-09-004-005-014-004-14 | 40.9 | 1201.0
10:54:41:febtest:INFO: 19-04 | XA-000-09-004-005-008-010-11 | 44.1 | 1206.9
10:54:41:febtest:INFO: 26-05 | XA-000-09-004-005-014-006-14 | 47.3 | 1195.1
10:54:41:febtest:INFO: 17-06 | XA-000-09-004-005-005-010-12 | 40.9 | 1195.1
10:54:41:febtest:INFO: 24-07 | XA-000-09-004-005-017-007-06 | 40.9 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_07-10_53_20
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4126| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.3700', '1.849', '2.2710']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9680', '1.850', '2.5530']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9470', '1.850', '0.5194']