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FEB_4128 19.03.25 14:23:56
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14:23:56:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:23:56:ST3_Shared:INFO: FEB-Microcable
14:23:56:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:23:56:febtest:INFO: Testing FEB with SN 4128
14:23:57:smx_tester:INFO: Scanning setup
14:23:57:elinks:INFO: Disabling clock on downlink 0
14:23:57:elinks:INFO: Disabling clock on downlink 1
14:23:57:elinks:INFO: Disabling clock on downlink 2
14:23:57:elinks:INFO: Disabling clock on downlink 3
14:23:57:elinks:INFO: Disabling clock on downlink 4
14:23:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:23:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:23:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:23:58:elinks:INFO: Disabling clock on downlink 0
14:23:58:elinks:INFO: Disabling clock on downlink 1
14:23:58:elinks:INFO: Disabling clock on downlink 2
14:23:58:elinks:INFO: Disabling clock on downlink 3
14:23:58:elinks:INFO: Disabling clock on downlink 4
14:23:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:23:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:23:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:23:58:elinks:INFO: Disabling clock on downlink 0
14:23:58:elinks:INFO: Disabling clock on downlink 1
14:23:58:elinks:INFO: Disabling clock on downlink 2
14:23:58:elinks:INFO: Disabling clock on downlink 3
14:23:58:elinks:INFO: Disabling clock on downlink 4
14:23:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:23:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:23:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:23:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:23:58:elinks:INFO: Disabling clock on downlink 0
14:23:58:elinks:INFO: Disabling clock on downlink 1
14:23:58:elinks:INFO: Disabling clock on downlink 2
14:23:58:elinks:INFO: Disabling clock on downlink 3
14:23:58:elinks:INFO: Disabling clock on downlink 4
14:23:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:23:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:23:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:23:58:elinks:INFO: Disabling clock on downlink 0
14:23:58:elinks:INFO: Disabling clock on downlink 1
14:23:58:elinks:INFO: Disabling clock on downlink 2
14:23:58:elinks:INFO: Disabling clock on downlink 3
14:23:58:elinks:INFO: Disabling clock on downlink 4
14:23:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:23:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:23:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:23:58:setup_element:INFO: Scanning clock phase
14:23:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:23:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:23:58:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:23:58:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:23:58:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:23:58:setup_element:INFO: Eye window for uplink 18: __________________________________________________________________________XXXX__
Clock Delay: 35
14:23:58:setup_element:INFO: Eye window for uplink 19: __________________________________________________________________________XXXX__
Clock Delay: 35
14:23:58:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:23:58:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:23:58:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:23:58:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:23:58:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:23:58:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:23:58:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:23:58:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:23:58:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:23:58:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:23:58:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:23:58:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:23:58:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
14:23:58:setup_element:INFO: Scanning data phases
14:23:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:23:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:24:04:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:24:04:setup_element:INFO: Eye window for uplink 16: XX_________________________________XXXXX
Data delay found: 18
14:24:04:setup_element:INFO: Eye window for uplink 17: __________________________________XXXX__
Data delay found: 15
14:24:04:setup_element:INFO: Eye window for uplink 18: XXXX___________________________________X
Data delay found: 21
14:24:04:setup_element:INFO: Eye window for uplink 19: XXX___________________________________XX
Data delay found: 20
14:24:04:setup_element:INFO: Eye window for uplink 20: __________________________________XXXXX_
Data delay found: 16
14:24:04:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
14:24:04:setup_element:INFO: Eye window for uplink 22: X_______________________________XXXXXXXX
Data delay found: 16
14:24:04:setup_element:INFO: Eye window for uplink 23: ________________________________XXXXXXXX
Data delay found: 15
14:24:04:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
14:24:04:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
14:24:04:setup_element:INFO: Eye window for uplink 26: _____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
14:24:04:setup_element:INFO: Eye window for uplink 27: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
14:24:04:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
14:24:04:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
14:24:04:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
14:24:04:setup_element:INFO: Eye window for uplink 31: _________________XXXXX__________________
Data delay found: 39
14:24:04:setup_element:INFO: Setting the data phase to 18 for uplink 16
14:24:04:setup_element:INFO: Setting the data phase to 15 for uplink 17
14:24:04:setup_element:INFO: Setting the data phase to 21 for uplink 18
14:24:04:setup_element:INFO: Setting the data phase to 20 for uplink 19
14:24:04:setup_element:INFO: Setting the data phase to 16 for uplink 20
14:24:04:setup_element:INFO: Setting the data phase to 15 for uplink 21
14:24:04:setup_element:INFO: Setting the data phase to 16 for uplink 22
14:24:04:setup_element:INFO: Setting the data phase to 15 for uplink 23
14:24:04:setup_element:INFO: Setting the data phase to 29 for uplink 24
14:24:04:setup_element:INFO: Setting the data phase to 32 for uplink 25
14:24:04:setup_element:INFO: Setting the data phase to 2 for uplink 26
14:24:04:setup_element:INFO: Setting the data phase to 2 for uplink 27
14:24:04:setup_element:INFO: Setting the data phase to 35 for uplink 28
14:24:04:setup_element:INFO: Setting the data phase to 37 for uplink 29
14:24:04:setup_element:INFO: Setting the data phase to 38 for uplink 30
14:24:04:setup_element:INFO: Setting the data phase to 39 for uplink 31
14:24:04:setup_element:INFO: Beginning SMX ASICs map scan
14:24:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:24:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:24:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:24:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:24:04:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:24:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:24:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:24:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:24:04:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:24:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:24:04:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:24:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:24:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:24:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:24:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:24:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:24:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:24:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:24:05:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:24:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:24:05:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:24:06:setup_element:INFO: Performing Elink synchronization
14:24:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:24:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:24:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:24:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:24:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:24:06:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:24:07:febtest:INFO: Init all SMX (CSA): 30
14:24:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:24:22:febtest:INFO: 23-00 | XA-000-09-004-005-002-018-03 | 34.6 | 1159.7
14:24:22:febtest:INFO: 30-01 | XA-000-09-004-005-011-017-02 | 37.7 | 1159.7
14:24:22:febtest:INFO: 21-02 | XA-000-09-004-005-017-018-01 | 18.7 | 1212.7
14:24:22:febtest:INFO: 28-03 | XA-000-09-004-005-014-017-09 | 37.7 | 1159.7
14:24:23:febtest:INFO: 19-04 | XA-000-09-004-005-017-019-01 | 25.1 | 1212.7
14:24:23:febtest:INFO: 26-05 | XA-000-09-004-005-005-018-11 | 34.6 | 1171.5
14:24:23:febtest:INFO: 17-06 | XA-000-09-004-005-014-018-09 | 25.1 | 1218.6
14:24:23:febtest:INFO: 24-07 | XA-000-09-004-005-004-007-01 | 40.9 | 1153.7
14:24:24:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:24:26:ST3_smx:INFO: chip: 23-0 37.726682 C 1171.483840 mV
14:24:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:26:ST3_smx:INFO: Electrons
14:24:26:ST3_smx:INFO: # loops 0
14:24:28:ST3_smx:INFO: # loops 1
14:24:30:ST3_smx:INFO: # loops 2
14:24:31:ST3_smx:INFO: Total # of broken channels: 0
14:24:31:ST3_smx:INFO: List of broken channels: []
14:24:31:ST3_smx:INFO: Total # of broken channels: 0
14:24:31:ST3_smx:INFO: List of broken channels: []
14:24:33:ST3_smx:INFO: chip: 30-1 37.726682 C 1171.483840 mV
14:24:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:33:ST3_smx:INFO: Electrons
14:24:33:ST3_smx:INFO: # loops 0
14:24:35:ST3_smx:INFO: # loops 1
14:24:36:ST3_smx:INFO: # loops 2
14:24:38:ST3_smx:INFO: Total # of broken channels: 0
14:24:38:ST3_smx:INFO: List of broken channels: []
14:24:38:ST3_smx:INFO: Total # of broken channels: 0
14:24:38:ST3_smx:INFO: List of broken channels: []
14:24:40:ST3_smx:INFO: chip: 21-2 18.745682 C 1224.468235 mV
14:24:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:40:ST3_smx:INFO: Electrons
14:24:40:ST3_smx:INFO: # loops 0
14:24:41:ST3_smx:INFO: # loops 1
14:24:43:ST3_smx:INFO: # loops 2
14:24:44:ST3_smx:INFO: Total # of broken channels: 0
14:24:44:ST3_smx:INFO: List of broken channels: []
14:24:44:ST3_smx:INFO: Total # of broken channels: 0
14:24:44:ST3_smx:INFO: List of broken channels: []
14:24:46:ST3_smx:INFO: chip: 28-3 40.898880 C 1177.390875 mV
14:24:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:46:ST3_smx:INFO: Electrons
14:24:46:ST3_smx:INFO: # loops 0
14:24:48:ST3_smx:INFO: # loops 1
14:24:49:ST3_smx:INFO: # loops 2
14:24:51:ST3_smx:INFO: Total # of broken channels: 0
14:24:51:ST3_smx:INFO: List of broken channels: []
14:24:51:ST3_smx:INFO: Total # of broken channels: 0
14:24:51:ST3_smx:INFO: List of broken channels: []
14:24:52:ST3_smx:INFO: chip: 19-4 25.062742 C 1224.468235 mV
14:24:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:53:ST3_smx:INFO: Electrons
14:24:53:ST3_smx:INFO: # loops 0
14:24:54:ST3_smx:INFO: # loops 1
14:24:56:ST3_smx:INFO: # loops 2
14:24:58:ST3_smx:INFO: Total # of broken channels: 0
14:24:58:ST3_smx:INFO: List of broken channels: []
14:24:58:ST3_smx:INFO: Total # of broken channels: 0
14:24:58:ST3_smx:INFO: List of broken channels: []
14:24:59:ST3_smx:INFO: chip: 26-5 37.726682 C 1183.292940 mV
14:24:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:59:ST3_smx:INFO: Electrons
14:24:59:ST3_smx:INFO: # loops 0
14:25:01:ST3_smx:INFO: # loops 1
14:25:03:ST3_smx:INFO: # loops 2
14:25:04:ST3_smx:INFO: Total # of broken channels: 0
14:25:04:ST3_smx:INFO: List of broken channels: []
14:25:04:ST3_smx:INFO: Total # of broken channels: 0
14:25:04:ST3_smx:INFO: List of broken channels: []
14:25:06:ST3_smx:INFO: chip: 17-6 25.062742 C 1253.730060 mV
14:25:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:06:ST3_smx:INFO: Electrons
14:25:06:ST3_smx:INFO: # loops 0
14:25:08:ST3_smx:INFO: # loops 1
14:25:09:ST3_smx:INFO: # loops 2
14:25:11:ST3_smx:INFO: Total # of broken channels: 0
14:25:11:ST3_smx:INFO: List of broken channels: []
14:25:11:ST3_smx:INFO: Total # of broken channels: 0
14:25:11:ST3_smx:INFO: List of broken channels: []
14:25:13:ST3_smx:INFO: chip: 24-7 40.898880 C 1171.483840 mV
14:25:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:13:ST3_smx:INFO: Electrons
14:25:13:ST3_smx:INFO: # loops 0
14:25:14:ST3_smx:INFO: # loops 1
14:25:16:ST3_smx:INFO: # loops 2
14:25:18:ST3_smx:INFO: Total # of broken channels: 0
14:25:18:ST3_smx:INFO: List of broken channels: []
14:25:18:ST3_smx:INFO: Total # of broken channels: 0
14:25:18:ST3_smx:INFO: List of broken channels: []
14:25:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:25:18:febtest:INFO: 23-00 | XA-000-09-004-005-002-018-03 | 37.7 | 1189.2
14:25:18:febtest:INFO: 30-01 | XA-000-09-004-005-011-017-02 | 40.9 | 1195.1
14:25:18:febtest:INFO: 21-02 | XA-000-09-004-005-017-018-01 | 21.9 | 1242.0
14:25:19:febtest:INFO: 28-03 | XA-000-09-004-005-014-017-09 | 40.9 | 1195.1
14:25:19:febtest:INFO: 19-04 | XA-000-09-004-005-017-019-01 | 25.1 | 1265.4
14:25:19:febtest:INFO: 26-05 | XA-000-09-004-005-005-018-11 | 37.7 | 1206.9
14:25:19:febtest:INFO: 17-06 | XA-000-09-004-005-014-018-09 | 21.9 | 1578.5
14:25:19:febtest:INFO: 24-07 | XA-000-09-004-005-004-007-01 | 44.1 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_19-14_23_56
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4128| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.9540', '1.849', '2.5380']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9830', '1.850', '2.6060']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9540', '1.850', '0.5171']