DTL-STS tests database

FEB_4129 24.03.25 14:23:05

Ladder: L6UR101135
Module: M6UR1B3011353B2
Sensor: 02274
link: XA-000-09-004-005-010-002-08
...SMX_0.root
link: XA-000-09-004-005-013-007-00
...SMX_2.root
link: XA-000-09-004-005-016-007-11
...SMX_4.root
link: XA-000-09-004-005-016-006-11
...SMX_6.root
link: XA-000-09-004-005-017-017-01
...SMX_1.root
link: XA-000-09-004-005-017-016-01
...SMX_3.root
link: XA-000-09-004-005-014-016-09
...SMX_5.root
link: XA-000-09-004-005-011-016-02
...SMX_7.root
link: XA-000-09-004-005-011-016-02
...VddmCSAstatus.root
Info
            14:23:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:23:05:ST3_Shared:INFO:	                         FEB-Sensor                         
14:23:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:23:27:ST3_ModuleSelector:INFO:	New Sensor ID: 
022
14:23:28:ST3_ModuleSelector:INFO:	New Sensor ID: 
0227
14:23:32:ST3_ModuleSelector:INFO:	New Sensor ID: 
022
14:23:35:ST3_ModuleSelector:INFO:	New Sensor ID: 2274
14:23:36:ST3_ModuleSelector:INFO:	New Sensor ID: 22744
14:23:38:ST3_ModuleSelector:INFO:	New Sensor ID: 2274
14:23:49:ST3_ModuleSelector:INFO:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M6UR1B3011353B2

14:23:49:ST3_ModuleSelector:INFO:	2274
14:23:49:febtest:INFO:	Testing FEB with SN 4129
14:23:50:smx_tester:INFO:	Scanning setup
14:23:50:elinks:INFO:	Disabling clock on downlink 0
14:23:50:elinks:INFO:	Disabling clock on downlink 1
14:23:50:elinks:INFO:	Disabling clock on downlink 2
14:23:50:elinks:INFO:	Disabling clock on downlink 3
14:23:50:elinks:INFO:	Disabling clock on downlink 4
14:23:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:23:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:23:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:23:50:elinks:INFO:	Disabling clock on downlink 0
14:23:50:elinks:INFO:	Disabling clock on downlink 1
14:23:50:elinks:INFO:	Disabling clock on downlink 2
14:23:50:elinks:INFO:	Disabling clock on downlink 3
14:23:50:elinks:INFO:	Disabling clock on downlink 4
14:23:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:23:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:23:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:23:50:elinks:INFO:	Disabling clock on downlink 0
14:23:50:elinks:INFO:	Disabling clock on downlink 1
14:23:50:elinks:INFO:	Disabling clock on downlink 2
14:23:50:elinks:INFO:	Disabling clock on downlink 3
14:23:50:elinks:INFO:	Disabling clock on downlink 4
14:23:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:23:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:23:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:23:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:23:51:elinks:INFO:	Disabling clock on downlink 0
14:23:51:elinks:INFO:	Disabling clock on downlink 1
14:23:51:elinks:INFO:	Disabling clock on downlink 2
14:23:51:elinks:INFO:	Disabling clock on downlink 3
14:23:51:elinks:INFO:	Disabling clock on downlink 4
14:23:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:23:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:23:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:23:51:elinks:INFO:	Disabling clock on downlink 0
14:23:51:elinks:INFO:	Disabling clock on downlink 1
14:23:51:elinks:INFO:	Disabling clock on downlink 2
14:23:51:elinks:INFO:	Disabling clock on downlink 3
14:23:51:elinks:INFO:	Disabling clock on downlink 4
14:23:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:23:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:23:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:23:51:setup_element:INFO:	Scanning clock phase
14:23:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:23:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:23:51:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:23:51:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:23:51:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:23:51:setup_element:INFO:	Eye window for uplink 18: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:23:51:setup_element:INFO:	Eye window for uplink 19: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:23:51:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
14:23:51:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
14:23:51:setup_element:INFO:	Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
14:23:51:setup_element:INFO:	Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
14:23:51:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:23:51:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:23:51:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:23:51:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:23:51:setup_element:INFO:	Eye window for uplink 28: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:23:51:setup_element:INFO:	Eye window for uplink 29: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:23:51:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________________XXXX_
Clock Delay: 36
14:23:51:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________________XXXX_
Clock Delay: 36
14:23:51:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
14:23:51:setup_element:INFO:	Scanning data phases
14:23:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:23:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:23:56:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:23:56:setup_element:INFO:	Eye window for uplink 16: __________________________________XXXXX_
Data delay found: 16
14:23:56:setup_element:INFO:	Eye window for uplink 17: ________________________________XXXXX___
Data delay found: 14
14:23:56:setup_element:INFO:	Eye window for uplink 18: XX___________________________________XXX
Data delay found: 19
14:23:56:setup_element:INFO:	Eye window for uplink 19: __________________________________XXXXX_
Data delay found: 16
14:23:56:setup_element:INFO:	Eye window for uplink 20: ________________________________XXXXX___
Data delay found: 14
14:23:56:setup_element:INFO:	Eye window for uplink 21: ________________________________XXXXX___
Data delay found: 14
14:23:56:setup_element:INFO:	Eye window for uplink 22: ___________________________________XXXX_
Data delay found: 16
14:23:56:setup_element:INFO:	Eye window for uplink 23: _______________________________XXXX_____
Data delay found: 12
14:23:56:setup_element:INFO:	Eye window for uplink 24: ____XXXXXX______________________________
Data delay found: 26
14:23:56:setup_element:INFO:	Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
14:23:56:setup_element:INFO:	Eye window for uplink 26: _____XXXXX______________________________
Data delay found: 27
14:23:56:setup_element:INFO:	Eye window for uplink 27: _________XXXXXX_________________________
Data delay found: 31
14:23:56:setup_element:INFO:	Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
14:23:56:setup_element:INFO:	Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
14:23:56:setup_element:INFO:	Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
14:23:56:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
14:23:56:setup_element:INFO:	Setting the data phase to 16 for uplink 16
14:23:56:setup_element:INFO:	Setting the data phase to 14 for uplink 17
14:23:56:setup_element:INFO:	Setting the data phase to 19 for uplink 18
14:23:56:setup_element:INFO:	Setting the data phase to 16 for uplink 19
14:23:56:setup_element:INFO:	Setting the data phase to 14 for uplink 20
14:23:56:setup_element:INFO:	Setting the data phase to 14 for uplink 21
14:23:56:setup_element:INFO:	Setting the data phase to 16 for uplink 22
14:23:56:setup_element:INFO:	Setting the data phase to 12 for uplink 23
14:23:56:setup_element:INFO:	Setting the data phase to 26 for uplink 24
14:23:56:setup_element:INFO:	Setting the data phase to 29 for uplink 25
14:23:56:setup_element:INFO:	Setting the data phase to 27 for uplink 26
14:23:56:setup_element:INFO:	Setting the data phase to 31 for uplink 27
14:23:56:setup_element:INFO:	Setting the data phase to 35 for uplink 28
14:23:56:setup_element:INFO:	Setting the data phase to 37 for uplink 29
14:23:56:setup_element:INFO:	Setting the data phase to 37 for uplink 30
14:23:56:setup_element:INFO:	Setting the data phase to 38 for uplink 31
14:23:56:setup_element:INFO:	Beginning SMX ASICs map scan
14:23:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:23:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:23:56:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:23:56:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:23:56:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:23:56:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:23:57:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:23:57:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:23:57:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:23:57:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:23:57:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:23:57:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:23:57:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:23:57:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:23:57:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:23:57:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:23:57:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:23:58:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:23:58:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:23:58:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:23:58:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:23:59:setup_element:INFO:	Performing Elink synchronization
14:23:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:23:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:23:59:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:23:59:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:23:59:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:23:59:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:24:00:febtest:INFO:	Init all SMX (CSA): 30
14:24:14:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:24:14:febtest:INFO:	23-00 | XA-000-09-004-005-010-002-08 |  31.4 | 1165.6
14:24:14:febtest:INFO:	30-01 | XA-000-09-004-005-017-017-01 |  21.9 | 1224.5
14:24:14:febtest:INFO:	21-02 | XA-000-09-004-005-013-007-00 |  44.1 | 1141.9
14:24:14:febtest:INFO:	28-03 | XA-000-09-004-005-017-016-01 |  25.1 | 1206.9
14:24:15:febtest:INFO:	19-04 | XA-000-09-004-005-016-007-11 |  40.9 | 1147.8
14:24:15:febtest:INFO:	26-05 | XA-000-09-004-005-014-016-09 |  37.7 | 1159.7
14:24:15:febtest:INFO:	17-06 | XA-000-09-004-005-016-006-11 |  34.6 | 1171.5
14:24:15:febtest:INFO:	24-07 | XA-000-09-004-005-011-016-02 |  28.2 | 1212.7
14:24:16:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:24:18:ST3_smx:INFO:	chip: 23-0 	 34.556970 C 	 1177.390875 mV
14:24:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:18:ST3_smx:INFO:		Electrons
14:24:18:ST3_smx:INFO:	# loops 0
14:24:20:ST3_smx:INFO:	# loops 1
14:24:21:ST3_smx:INFO:	# loops 2
14:24:23:ST3_smx:INFO:	Total # of broken channels: 0
14:24:23:ST3_smx:INFO:	List of broken channels: []
14:24:23:ST3_smx:INFO:	Total # of broken channels: 0
14:24:23:ST3_smx:INFO:	List of broken channels: []
14:24:25:ST3_smx:INFO:	chip: 30-1 	 21.902970 C 	 1236.187875 mV
14:24:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:25:ST3_smx:INFO:		Electrons
14:24:25:ST3_smx:INFO:	# loops 0
14:24:27:ST3_smx:INFO:	# loops 1
14:24:29:ST3_smx:INFO:	# loops 2
14:24:31:ST3_smx:INFO:	Total # of broken channels: 0
14:24:31:ST3_smx:INFO:	List of broken channels: []
14:24:31:ST3_smx:INFO:	Total # of broken channels: 0
14:24:31:ST3_smx:INFO:	List of broken channels: []
14:24:32:ST3_smx:INFO:	chip: 21-2 	 40.898880 C 	 1159.654860 mV
14:24:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:32:ST3_smx:INFO:		Electrons
14:24:32:ST3_smx:INFO:	# loops 0
14:24:34:ST3_smx:INFO:	# loops 1
14:24:35:ST3_smx:INFO:	# loops 2
14:24:37:ST3_smx:INFO:	Total # of broken channels: 0
14:24:37:ST3_smx:INFO:	List of broken channels: []
14:24:37:ST3_smx:INFO:	Total # of broken channels: 0
14:24:37:ST3_smx:INFO:	List of broken channels: []
14:24:38:ST3_smx:INFO:	chip: 28-3 	 25.062742 C 	 1218.600960 mV
14:24:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:39:ST3_smx:INFO:		Electrons
14:24:39:ST3_smx:INFO:	# loops 0
14:24:40:ST3_smx:INFO:	# loops 1
14:24:42:ST3_smx:INFO:	# loops 2
14:24:43:ST3_smx:INFO:	Total # of broken channels: 0
14:24:43:ST3_smx:INFO:	List of broken channels: []
14:24:43:ST3_smx:INFO:	Total # of broken channels: 0
14:24:43:ST3_smx:INFO:	List of broken channels: []
14:24:45:ST3_smx:INFO:	chip: 19-4 	 44.073563 C 	 1153.732915 mV
14:24:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:45:ST3_smx:INFO:		Electrons
14:24:45:ST3_smx:INFO:	# loops 0
14:24:46:ST3_smx:INFO:	# loops 1
14:24:48:ST3_smx:INFO:	# loops 2
14:24:49:ST3_smx:INFO:	Total # of broken channels: 0
14:24:49:ST3_smx:INFO:	List of broken channels: []
14:24:49:ST3_smx:INFO:	Total # of broken channels: 0
14:24:49:ST3_smx:INFO:	List of broken channels: []
14:24:51:ST3_smx:INFO:	chip: 26-5 	 40.898880 C 	 1171.483840 mV
14:24:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:51:ST3_smx:INFO:		Electrons
14:24:51:ST3_smx:INFO:	# loops 0
14:24:53:ST3_smx:INFO:	# loops 1
14:24:54:ST3_smx:INFO:	# loops 2
14:24:56:ST3_smx:INFO:	Total # of broken channels: 0
14:24:56:ST3_smx:INFO:	List of broken channels: []
14:24:56:ST3_smx:INFO:	Total # of broken channels: 0
14:24:56:ST3_smx:INFO:	List of broken channels: []
14:24:57:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1177.390875 mV
14:24:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:24:58:ST3_smx:INFO:		Electrons
14:24:58:ST3_smx:INFO:	# loops 0
14:24:59:ST3_smx:INFO:	# loops 1
14:25:01:ST3_smx:INFO:	# loops 2
14:25:02:ST3_smx:INFO:	Total # of broken channels: 0
14:25:02:ST3_smx:INFO:	List of broken channels: []
14:25:02:ST3_smx:INFO:	Total # of broken channels: 0
14:25:02:ST3_smx:INFO:	List of broken channels: []
14:25:04:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1247.887635 mV
14:25:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:25:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:25:04:ST3_smx:INFO:		Electrons
14:25:04:ST3_smx:INFO:	# loops 0
14:25:05:ST3_smx:INFO:	# loops 1
14:25:07:ST3_smx:INFO:	# loops 2
14:25:08:ST3_smx:INFO:	Total # of broken channels: 0
14:25:08:ST3_smx:INFO:	List of broken channels: []
14:25:08:ST3_smx:INFO:	Total # of broken channels: 1
14:25:08:ST3_smx:INFO:	List of broken channels: [43]
14:25:09:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:25:09:febtest:INFO:	23-00 | XA-000-09-004-005-010-002-08 |  34.6 | 1201.0
14:25:09:febtest:INFO:	30-01 | XA-000-09-004-005-017-017-01 |  25.1 | 1259.6
14:25:09:febtest:INFO:	21-02 | XA-000-09-004-005-013-007-00 |  44.1 | 1177.4
14:25:09:febtest:INFO:	28-03 | XA-000-09-004-005-017-016-01 |  25.1 | 1242.0
14:25:10:febtest:INFO:	19-04 | XA-000-09-004-005-016-007-11 |  47.3 | 1171.5
14:25:10:febtest:INFO:	26-05 | XA-000-09-004-005-014-016-09 |  40.9 | 1195.1
14:25:10:febtest:INFO:	17-06 | XA-000-09-004-005-016-006-11 |  37.7 | 1201.0
14:25:10:febtest:INFO:	24-07 | XA-000-09-004-005-011-016-02 |  31.4 | 1403.9
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#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_03_24-14_23_05
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4129| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	2274
MODULE_NAME:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M6UR1B3011353B2

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '1.4930', '1.850', '2.5520']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9820', '1.850', '2.5630']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9230', '1.850', '0.5080']
Comment