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FEB_4129 20.03.25 09:45:12
Info
09:45:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:45:12:ST3_Shared:INFO: FEB-Microcable
09:45:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:45:12:febtest:INFO: Testing FEB with SN 4129
09:45:14:smx_tester:INFO: Scanning setup
09:45:14:elinks:INFO: Disabling clock on downlink 0
09:45:14:elinks:INFO: Disabling clock on downlink 1
09:45:14:elinks:INFO: Disabling clock on downlink 2
09:45:14:elinks:INFO: Disabling clock on downlink 3
09:45:14:elinks:INFO: Disabling clock on downlink 4
09:45:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:45:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:45:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:45:14:elinks:INFO: Disabling clock on downlink 0
09:45:14:elinks:INFO: Disabling clock on downlink 1
09:45:14:elinks:INFO: Disabling clock on downlink 2
09:45:14:elinks:INFO: Disabling clock on downlink 3
09:45:14:elinks:INFO: Disabling clock on downlink 4
09:45:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:45:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:45:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:45:14:elinks:INFO: Disabling clock on downlink 0
09:45:14:elinks:INFO: Disabling clock on downlink 1
09:45:14:elinks:INFO: Disabling clock on downlink 2
09:45:14:elinks:INFO: Disabling clock on downlink 3
09:45:14:elinks:INFO: Disabling clock on downlink 4
09:45:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:45:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:45:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:45:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:45:14:elinks:INFO: Disabling clock on downlink 0
09:45:14:elinks:INFO: Disabling clock on downlink 1
09:45:14:elinks:INFO: Disabling clock on downlink 2
09:45:14:elinks:INFO: Disabling clock on downlink 3
09:45:14:elinks:INFO: Disabling clock on downlink 4
09:45:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:45:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:45:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:45:14:elinks:INFO: Disabling clock on downlink 0
09:45:14:elinks:INFO: Disabling clock on downlink 1
09:45:14:elinks:INFO: Disabling clock on downlink 2
09:45:14:elinks:INFO: Disabling clock on downlink 3
09:45:14:elinks:INFO: Disabling clock on downlink 4
09:45:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:45:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:45:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:45:14:setup_element:INFO: Scanning clock phase
09:45:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:45:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:45:15:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:45:15:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:45:15:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:45:15:setup_element:INFO: Eye window for uplink 18: _________________________________________________________________________XXXXXX_
Clock Delay: 35
09:45:15:setup_element:INFO: Eye window for uplink 19: _________________________________________________________________________XXXXXX_
Clock Delay: 35
09:45:15:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXXX___
Clock Delay: 34
09:45:15:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXXX___
Clock Delay: 34
09:45:15:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:45:15:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:45:15:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
09:45:15:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
09:45:15:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
09:45:15:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
09:45:15:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________________XXXXX__
Clock Delay: 35
09:45:15:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________________XXXXX__
Clock Delay: 35
09:45:15:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________________XXXXX_
Clock Delay: 36
09:45:15:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________________XXXXX_
Clock Delay: 36
09:45:15:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
09:45:15:setup_element:INFO: Scanning data phases
09:45:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:45:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:45:20:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:45:20:setup_element:INFO: Eye window for uplink 16: XX__________________________________XXXX
Data delay found: 18
09:45:20:setup_element:INFO: Eye window for uplink 17: __________________________________XXXX__
Data delay found: 15
09:45:20:setup_element:INFO: Eye window for uplink 18: XXX___________________________________XX
Data delay found: 20
09:45:20:setup_element:INFO: Eye window for uplink 19: XX__________________________________XXXX
Data delay found: 18
09:45:20:setup_element:INFO: Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
09:45:20:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
09:45:20:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
09:45:20:setup_element:INFO: Eye window for uplink 23: ________________________________XXXXX___
Data delay found: 14
09:45:20:setup_element:INFO: Eye window for uplink 24: _____XXXXXX_____________________________
Data delay found: 27
09:45:20:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
09:45:20:setup_element:INFO: Eye window for uplink 26: ______XXXXXX____________________________
Data delay found: 28
09:45:20:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
09:45:20:setup_element:INFO: Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
09:45:20:setup_element:INFO: Eye window for uplink 29: ________________XXXXX___________________
Data delay found: 38
09:45:20:setup_element:INFO: Eye window for uplink 30: ________________XXXXXXX_________________
Data delay found: 39
09:45:20:setup_element:INFO: Eye window for uplink 31: _________________XXXXXX_________________
Data delay found: 39
09:45:20:setup_element:INFO: Setting the data phase to 18 for uplink 16
09:45:20:setup_element:INFO: Setting the data phase to 15 for uplink 17
09:45:20:setup_element:INFO: Setting the data phase to 20 for uplink 18
09:45:20:setup_element:INFO: Setting the data phase to 18 for uplink 19
09:45:20:setup_element:INFO: Setting the data phase to 15 for uplink 20
09:45:20:setup_element:INFO: Setting the data phase to 15 for uplink 21
09:45:20:setup_element:INFO: Setting the data phase to 18 for uplink 22
09:45:20:setup_element:INFO: Setting the data phase to 14 for uplink 23
09:45:20:setup_element:INFO: Setting the data phase to 27 for uplink 24
09:45:20:setup_element:INFO: Setting the data phase to 30 for uplink 25
09:45:20:setup_element:INFO: Setting the data phase to 28 for uplink 26
09:45:20:setup_element:INFO: Setting the data phase to 32 for uplink 27
09:45:20:setup_element:INFO: Setting the data phase to 36 for uplink 28
09:45:20:setup_element:INFO: Setting the data phase to 38 for uplink 29
09:45:20:setup_element:INFO: Setting the data phase to 39 for uplink 30
09:45:20:setup_element:INFO: Setting the data phase to 39 for uplink 31
09:45:20:setup_element:INFO: Beginning SMX ASICs map scan
09:45:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:45:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:45:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:45:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:45:20:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:45:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:45:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:45:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:45:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:45:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:45:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:45:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:45:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:45:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:45:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:45:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:45:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:45:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:45:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:45:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:45:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:45:22:setup_element:INFO: Performing Elink synchronization
09:45:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:45:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:45:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:45:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:45:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:45:23:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:45:23:febtest:INFO: Init all SMX (CSA): 30
09:45:39:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:45:39:febtest:INFO: 23-00 | XA-000-09-004-005-010-002-08 | 34.6 | 1165.6
09:45:39:febtest:INFO: 30-01 | XA-000-09-004-005-017-017-01 | 25.1 | 1224.5
09:45:39:febtest:INFO: 21-02 | XA-000-09-004-005-013-007-00 | 44.1 | 1141.9
09:45:39:febtest:INFO: 28-03 | XA-000-09-004-005-017-016-01 | 28.2 | 1201.0
09:45:40:febtest:INFO: 19-04 | XA-000-09-004-005-016-007-11 | 44.1 | 1141.9
09:45:40:febtest:INFO: 26-05 | XA-000-09-004-005-014-016-09 | 40.9 | 1159.7
09:45:40:febtest:INFO: 17-06 | XA-000-09-004-005-016-006-11 | 37.7 | 1165.6
09:45:40:febtest:INFO: 24-07 | XA-000-09-004-005-011-016-02 | 31.4 | 1224.5
09:45:41:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:45:43:ST3_smx:INFO: chip: 23-0 34.556970 C 1177.390875 mV
09:45:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:43:ST3_smx:INFO: Electrons
09:45:43:ST3_smx:INFO: # loops 0
09:45:45:ST3_smx:INFO: # loops 1
09:45:46:ST3_smx:INFO: # loops 2
09:45:48:ST3_smx:INFO: Total # of broken channels: 0
09:45:48:ST3_smx:INFO: List of broken channels: []
09:45:48:ST3_smx:INFO: Total # of broken channels: 0
09:45:48:ST3_smx:INFO: List of broken channels: []
09:45:49:ST3_smx:INFO: chip: 30-1 25.062742 C 1236.187875 mV
09:45:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:49:ST3_smx:INFO: Electrons
09:45:49:ST3_smx:INFO: # loops 0
09:45:51:ST3_smx:INFO: # loops 1
09:45:52:ST3_smx:INFO: # loops 2
09:45:54:ST3_smx:INFO: Total # of broken channels: 0
09:45:54:ST3_smx:INFO: List of broken channels: []
09:45:54:ST3_smx:INFO: Total # of broken channels: 0
09:45:54:ST3_smx:INFO: List of broken channels: []
09:45:56:ST3_smx:INFO: chip: 21-2 44.073563 C 1153.732915 mV
09:45:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:45:56:ST3_smx:INFO: Electrons
09:45:56:ST3_smx:INFO: # loops 0
09:45:57:ST3_smx:INFO: # loops 1
09:45:59:ST3_smx:INFO: # loops 2
09:46:00:ST3_smx:INFO: Total # of broken channels: 0
09:46:00:ST3_smx:INFO: List of broken channels: []
09:46:00:ST3_smx:INFO: Total # of broken channels: 0
09:46:00:ST3_smx:INFO: List of broken channels: []
09:46:02:ST3_smx:INFO: chip: 28-3 28.225000 C 1212.728715 mV
09:46:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:02:ST3_smx:INFO: Electrons
09:46:02:ST3_smx:INFO: # loops 0
09:46:04:ST3_smx:INFO: # loops 1
09:46:05:ST3_smx:INFO: # loops 2
09:46:07:ST3_smx:INFO: Total # of broken channels: 0
09:46:07:ST3_smx:INFO: List of broken channels: []
09:46:07:ST3_smx:INFO: Total # of broken channels: 0
09:46:07:ST3_smx:INFO: List of broken channels: []
09:46:08:ST3_smx:INFO: chip: 19-4 47.250730 C 1153.732915 mV
09:46:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:08:ST3_smx:INFO: Electrons
09:46:08:ST3_smx:INFO: # loops 0
09:46:10:ST3_smx:INFO: # loops 1
09:46:12:ST3_smx:INFO: # loops 2
09:46:13:ST3_smx:INFO: Total # of broken channels: 0
09:46:13:ST3_smx:INFO: List of broken channels: []
09:46:13:ST3_smx:INFO: Total # of broken channels: 0
09:46:13:ST3_smx:INFO: List of broken channels: []
09:46:15:ST3_smx:INFO: chip: 26-5 44.073563 C 1171.483840 mV
09:46:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:15:ST3_smx:INFO: Electrons
09:46:15:ST3_smx:INFO: # loops 0
09:46:16:ST3_smx:INFO: # loops 1
09:46:18:ST3_smx:INFO: # loops 2
09:46:19:ST3_smx:INFO: Total # of broken channels: 0
09:46:19:ST3_smx:INFO: List of broken channels: []
09:46:19:ST3_smx:INFO: Total # of broken channels: 0
09:46:19:ST3_smx:INFO: List of broken channels: []
09:46:21:ST3_smx:INFO: chip: 17-6 37.726682 C 1177.390875 mV
09:46:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:21:ST3_smx:INFO: Electrons
09:46:21:ST3_smx:INFO: # loops 0
09:46:23:ST3_smx:INFO: # loops 1
09:46:25:ST3_smx:INFO: # loops 2
09:46:26:ST3_smx:INFO: Total # of broken channels: 0
09:46:26:ST3_smx:INFO: List of broken channels: []
09:46:26:ST3_smx:INFO: Total # of broken channels: 0
09:46:26:ST3_smx:INFO: List of broken channels: []
09:46:28:ST3_smx:INFO: chip: 24-7 34.556970 C 1265.400000 mV
09:46:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:46:28:ST3_smx:INFO: Electrons
09:46:28:ST3_smx:INFO: # loops 0
09:46:29:ST3_smx:INFO: # loops 1
09:46:31:ST3_smx:INFO: # loops 2
09:46:32:ST3_smx:INFO: Total # of broken channels: 0
09:46:32:ST3_smx:INFO: List of broken channels: []
09:46:32:ST3_smx:INFO: Total # of broken channels: 7
09:46:32:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 43]
09:46:33:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:46:33:febtest:INFO: 23-00 | XA-000-09-004-005-010-002-08 | 37.7 | 1201.0
09:46:33:febtest:INFO: 30-01 | XA-000-09-004-005-017-017-01 | 25.1 | 1259.6
09:46:33:febtest:INFO: 21-02 | XA-000-09-004-005-013-007-00 | 47.3 | 1171.5
09:46:33:febtest:INFO: 28-03 | XA-000-09-004-005-017-016-01 | 28.2 | 1236.2
09:46:34:febtest:INFO: 19-04 | XA-000-09-004-005-016-007-11 | 47.3 | 1171.5
09:46:34:febtest:INFO: 26-05 | XA-000-09-004-005-014-016-09 | 44.1 | 1195.1
09:46:34:febtest:INFO: 17-06 | XA-000-09-004-005-016-006-11 | 40.9 | 1195.1
09:46:34:febtest:INFO: 24-07 | XA-000-09-004-005-011-016-02 | 31.4 | 1578.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_20-09_45_12
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4129| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '1.4580', '1.850', '2.5910']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9470', '1.850', '2.5450']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9240', '1.850', '0.5083']