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FEB_4130 25.03.25 10:21:35
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10:21:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:21:35:ST3_Shared:INFO: FEB-Microcable
10:21:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:21:35:febtest:INFO: Testing FEB with SN 4130
10:21:37:smx_tester:INFO: Scanning setup
10:21:37:elinks:INFO: Disabling clock on downlink 0
10:21:37:elinks:INFO: Disabling clock on downlink 1
10:21:37:elinks:INFO: Disabling clock on downlink 2
10:21:37:elinks:INFO: Disabling clock on downlink 3
10:21:37:elinks:INFO: Disabling clock on downlink 4
10:21:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:21:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:21:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:21:37:elinks:INFO: Disabling clock on downlink 0
10:21:37:elinks:INFO: Disabling clock on downlink 1
10:21:37:elinks:INFO: Disabling clock on downlink 2
10:21:37:elinks:INFO: Disabling clock on downlink 3
10:21:37:elinks:INFO: Disabling clock on downlink 4
10:21:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:21:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:21:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:21:37:elinks:INFO: Disabling clock on downlink 0
10:21:37:elinks:INFO: Disabling clock on downlink 1
10:21:37:elinks:INFO: Disabling clock on downlink 2
10:21:37:elinks:INFO: Disabling clock on downlink 3
10:21:37:elinks:INFO: Disabling clock on downlink 4
10:21:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:21:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:21:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:21:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:21:37:elinks:INFO: Disabling clock on downlink 0
10:21:37:elinks:INFO: Disabling clock on downlink 1
10:21:37:elinks:INFO: Disabling clock on downlink 2
10:21:37:elinks:INFO: Disabling clock on downlink 3
10:21:37:elinks:INFO: Disabling clock on downlink 4
10:21:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:21:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:21:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:21:38:elinks:INFO: Disabling clock on downlink 0
10:21:38:elinks:INFO: Disabling clock on downlink 1
10:21:38:elinks:INFO: Disabling clock on downlink 2
10:21:38:elinks:INFO: Disabling clock on downlink 3
10:21:38:elinks:INFO: Disabling clock on downlink 4
10:21:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:21:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:21:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:21:38:setup_element:INFO: Scanning clock phase
10:21:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:21:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:21:38:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:21:38:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:21:38:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:21:38:setup_element:INFO: Eye window for uplink 18: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:21:38:setup_element:INFO: Eye window for uplink 19: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:21:38:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:21:38:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:21:38:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:21:38:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:21:38:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:21:38:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:21:38:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:21:38:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:21:38:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:21:38:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:21:38:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:21:38:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:21:38:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
10:21:38:setup_element:INFO: Scanning data phases
10:21:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:21:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:21:43:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:21:43:setup_element:INFO: Eye window for uplink 16: X___________________________________XXXX
Data delay found: 18
10:21:43:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
10:21:43:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX
Data delay found: 19
10:21:43:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXXX
Data delay found: 17
10:21:43:setup_element:INFO: Eye window for uplink 20: ___________________________________XXXX_
Data delay found: 16
10:21:43:setup_element:INFO: Eye window for uplink 21: __________________________________XXXX__
Data delay found: 15
10:21:43:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
10:21:43:setup_element:INFO: Eye window for uplink 23: _______________________________XXXXXX___
Data delay found: 13
10:21:43:setup_element:INFO: Eye window for uplink 24: ____XXXXX_______________________________
Data delay found: 26
10:21:43:setup_element:INFO: Eye window for uplink 25: ______XXXXX_____________________________
Data delay found: 28
10:21:43:setup_element:INFO: Eye window for uplink 26: ____XXXXXX______________________________
Data delay found: 26
10:21:43:setup_element:INFO: Eye window for uplink 27: ________XXXXXX__________________________
Data delay found: 30
10:21:43:setup_element:INFO: Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
10:21:43:setup_element:INFO: Eye window for uplink 29: ________________XXXXX___________________
Data delay found: 38
10:21:43:setup_element:INFO: Eye window for uplink 30: _____________XXXXX______________________
Data delay found: 35
10:21:43:setup_element:INFO: Eye window for uplink 31: ______________XXXX______________________
Data delay found: 35
10:21:43:setup_element:INFO: Setting the data phase to 18 for uplink 16
10:21:43:setup_element:INFO: Setting the data phase to 16 for uplink 17
10:21:43:setup_element:INFO: Setting the data phase to 19 for uplink 18
10:21:43:setup_element:INFO: Setting the data phase to 17 for uplink 19
10:21:43:setup_element:INFO: Setting the data phase to 16 for uplink 20
10:21:43:setup_element:INFO: Setting the data phase to 15 for uplink 21
10:21:43:setup_element:INFO: Setting the data phase to 18 for uplink 22
10:21:43:setup_element:INFO: Setting the data phase to 13 for uplink 23
10:21:43:setup_element:INFO: Setting the data phase to 26 for uplink 24
10:21:43:setup_element:INFO: Setting the data phase to 28 for uplink 25
10:21:43:setup_element:INFO: Setting the data phase to 26 for uplink 26
10:21:43:setup_element:INFO: Setting the data phase to 30 for uplink 27
10:21:43:setup_element:INFO: Setting the data phase to 36 for uplink 28
10:21:43:setup_element:INFO: Setting the data phase to 38 for uplink 29
10:21:43:setup_element:INFO: Setting the data phase to 35 for uplink 30
10:21:43:setup_element:INFO: Setting the data phase to 35 for uplink 31
10:21:43:setup_element:INFO: Beginning SMX ASICs map scan
10:21:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:21:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:21:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:21:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:21:44:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:21:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:21:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:21:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:21:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:21:44:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:21:44:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:21:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:21:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:21:44:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:21:44:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:21:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:21:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:21:45:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:21:45:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:21:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:21:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:21:46:setup_element:INFO: Performing Elink synchronization
10:21:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:21:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:21:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:21:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:21:46:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:21:46:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:21:47:febtest:INFO: Init all SMX (CSA): 30
10:22:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:22:04:febtest:INFO: 23-00 | XA-000-09-004-005-015-022-04 | 18.7 | 1253.7
10:22:04:febtest:INFO: 30-01 | XA-000-09-004-005-009-021-01 | 25.1 | 1206.9
10:22:04:febtest:INFO: 21-02 | XA-000-09-004-005-015-020-04 | 34.6 | 1171.5
10:22:04:febtest:INFO: 28-03 | XA-000-09-004-005-015-023-04 | 28.2 | 1201.0
10:22:04:febtest:INFO: 19-04 | XA-000-09-004-005-003-022-14 | 50.4 | 1112.1
10:22:05:febtest:INFO: 26-05 | XA-000-09-004-005-015-021-04 | 18.7 | 1224.5
10:22:05:febtest:INFO: 17-06 | XA-000-09-004-005-012-022-10 | 40.9 | 1159.7
10:22:05:febtest:INFO: 24-07 | XA-000-09-004-005-006-021-05 | 47.3 | 1141.9
10:22:06:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:22:08:ST3_smx:INFO: chip: 23-0 18.745682 C 1288.680240 mV
10:22:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:08:ST3_smx:INFO: Electrons
10:22:08:ST3_smx:INFO: # loops 0
10:22:10:ST3_smx:INFO: # loops 1
10:22:12:ST3_smx:INFO: # loops 2
10:22:14:ST3_smx:INFO: Total # of broken channels: 0
10:22:14:ST3_smx:INFO: List of broken channels: []
10:22:14:ST3_smx:INFO: Total # of broken channels: 0
10:22:14:ST3_smx:INFO: List of broken channels: []
10:22:16:ST3_smx:INFO: chip: 30-1 25.062742 C 1218.600960 mV
10:22:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:16:ST3_smx:INFO: Electrons
10:22:16:ST3_smx:INFO: # loops 0
10:22:18:ST3_smx:INFO: # loops 1
10:22:20:ST3_smx:INFO: # loops 2
10:22:22:ST3_smx:INFO: Total # of broken channels: 0
10:22:22:ST3_smx:INFO: List of broken channels: []
10:22:22:ST3_smx:INFO: Total # of broken channels: 0
10:22:22:ST3_smx:INFO: List of broken channels: []
10:22:23:ST3_smx:INFO: chip: 21-2 34.556970 C 1183.292940 mV
10:22:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:23:ST3_smx:INFO: Electrons
10:22:24:ST3_smx:INFO: # loops 0
10:22:26:ST3_smx:INFO: # loops 1
10:22:28:ST3_smx:INFO: # loops 2
10:22:30:ST3_smx:INFO: Total # of broken channels: 0
10:22:30:ST3_smx:INFO: List of broken channels: []
10:22:30:ST3_smx:INFO: Total # of broken channels: 0
10:22:30:ST3_smx:INFO: List of broken channels: []
10:22:32:ST3_smx:INFO: chip: 28-3 28.225000 C 1212.728715 mV
10:22:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:32:ST3_smx:INFO: Electrons
10:22:32:ST3_smx:INFO: # loops 0
10:22:34:ST3_smx:INFO: # loops 1
10:22:36:ST3_smx:INFO: # loops 2
10:22:38:ST3_smx:INFO: Total # of broken channels: 0
10:22:38:ST3_smx:INFO: List of broken channels: []
10:22:38:ST3_smx:INFO: Total # of broken channels: 0
10:22:38:ST3_smx:INFO: List of broken channels: []
10:22:39:ST3_smx:INFO: chip: 19-4 50.430383 C 1124.048640 mV
10:22:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:39:ST3_smx:INFO: Electrons
10:22:39:ST3_smx:INFO: # loops 0
10:22:41:ST3_smx:INFO: # loops 1
10:22:43:ST3_smx:INFO: # loops 2
10:22:45:ST3_smx:INFO: Total # of broken channels: 0
10:22:45:ST3_smx:INFO: List of broken channels: []
10:22:45:ST3_smx:INFO: Total # of broken channels: 0
10:22:45:ST3_smx:INFO: List of broken channels: []
10:22:47:ST3_smx:INFO: chip: 26-5 21.902970 C 1242.040240 mV
10:22:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:47:ST3_smx:INFO: Electrons
10:22:47:ST3_smx:INFO: # loops 0
10:22:49:ST3_smx:INFO: # loops 1
10:22:50:ST3_smx:INFO: # loops 2
10:22:52:ST3_smx:INFO: Total # of broken channels: 0
10:22:52:ST3_smx:INFO: List of broken channels: []
10:22:52:ST3_smx:INFO: Total # of broken channels: 0
10:22:52:ST3_smx:INFO: List of broken channels: []
10:22:54:ST3_smx:INFO: chip: 17-6 44.073563 C 1171.483840 mV
10:22:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:54:ST3_smx:INFO: Electrons
10:22:54:ST3_smx:INFO: # loops 0
10:22:56:ST3_smx:INFO: # loops 1
10:22:58:ST3_smx:INFO: # loops 2
10:23:00:ST3_smx:INFO: Total # of broken channels: 0
10:23:00:ST3_smx:INFO: List of broken channels: []
10:23:00:ST3_smx:INFO: Total # of broken channels: 0
10:23:00:ST3_smx:INFO: List of broken channels: []
10:23:02:ST3_smx:INFO: chip: 24-7 47.250730 C 1153.732915 mV
10:23:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:23:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:23:02:ST3_smx:INFO: Electrons
10:23:02:ST3_smx:INFO: # loops 0
10:23:04:ST3_smx:INFO: # loops 1
10:23:06:ST3_smx:INFO: # loops 2
10:23:08:ST3_smx:INFO: Total # of broken channels: 0
10:23:08:ST3_smx:INFO: List of broken channels: []
10:23:08:ST3_smx:INFO: Total # of broken channels: 0
10:23:08:ST3_smx:INFO: List of broken channels: []
10:23:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:23:08:febtest:INFO: 23-00 | XA-000-09-004-005-015-022-04 | 12.4 | 1578.5
10:23:09:febtest:INFO: 30-01 | XA-000-09-004-005-009-021-01 | 28.2 | 1242.0
10:23:09:febtest:INFO: 21-02 | XA-000-09-004-005-015-020-04 | 34.6 | 1201.0
10:23:09:febtest:INFO: 28-03 | XA-000-09-004-005-015-023-04 | 28.2 | 1236.2
10:23:09:febtest:INFO: 19-04 | XA-000-09-004-005-003-022-14 | 53.6 | 1141.9
10:23:09:febtest:INFO: 26-05 | XA-000-09-004-005-015-021-04 | 25.1 | 1259.6
10:23:10:febtest:INFO: 17-06 | XA-000-09-004-005-012-022-10 | 44.1 | 1195.1
10:23:10:febtest:INFO: 24-07 | XA-000-09-004-005-006-021-05 | 50.4 | 1171.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_03_25-10_21_35
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4130| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4280', '1.849', '2.2930']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9720', '1.850', '2.5480']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9510', '1.850', '0.5197']