FEB_4131 25.04.25 14:40:12
Info
14:40:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:40:12:ST3_Shared:INFO: FEB-Microcable
14:40:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:40:12:febtest:INFO: Testing FEB with SN 4131
14:40:13:smx_tester:INFO: Scanning setup
14:40:13:elinks:INFO: Disabling clock on downlink 0
14:40:13:elinks:INFO: Disabling clock on downlink 1
14:40:13:elinks:INFO: Disabling clock on downlink 2
14:40:13:elinks:INFO: Disabling clock on downlink 3
14:40:13:elinks:INFO: Disabling clock on downlink 4
14:40:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:40:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:40:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:40:14:elinks:INFO: Disabling clock on downlink 0
14:40:14:elinks:INFO: Disabling clock on downlink 1
14:40:14:elinks:INFO: Disabling clock on downlink 2
14:40:14:elinks:INFO: Disabling clock on downlink 3
14:40:14:elinks:INFO: Disabling clock on downlink 4
14:40:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:40:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:40:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:40:14:elinks:INFO: Disabling clock on downlink 0
14:40:14:elinks:INFO: Disabling clock on downlink 1
14:40:14:elinks:INFO: Disabling clock on downlink 2
14:40:14:elinks:INFO: Disabling clock on downlink 3
14:40:14:elinks:INFO: Disabling clock on downlink 4
14:40:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:40:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:40:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:40:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:40:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:40:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:40:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:40:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:40:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:40:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:40:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:40:14:elinks:INFO: Disabling clock on downlink 0
14:40:14:elinks:INFO: Disabling clock on downlink 1
14:40:14:elinks:INFO: Disabling clock on downlink 2
14:40:14:elinks:INFO: Disabling clock on downlink 3
14:40:14:elinks:INFO: Disabling clock on downlink 4
14:40:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:40:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:40:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:40:14:elinks:INFO: Disabling clock on downlink 0
14:40:14:elinks:INFO: Disabling clock on downlink 1
14:40:14:elinks:INFO: Disabling clock on downlink 2
14:40:14:elinks:INFO: Disabling clock on downlink 3
14:40:14:elinks:INFO: Disabling clock on downlink 4
14:40:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:40:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:40:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:40:14:setup_element:INFO: Scanning clock phase
14:40:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:40:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:40:14:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:40:14:setup_element:INFO: Eye window for uplink 24: XXX_____________________________________________________________________________
Clock Delay: 41
14:40:14:setup_element:INFO: Eye window for uplink 25: XXX_____________________________________________________________________________
Clock Delay: 41
14:40:14:setup_element:INFO: Eye window for uplink 26: XXX________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 34
14:40:14:setup_element:INFO: Eye window for uplink 27: XXX________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 34
14:40:14:setup_element:INFO: Eye window for uplink 28: XX_______________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 33
14:40:14:setup_element:INFO: Eye window for uplink 29: XX_______________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 33
14:40:14:setup_element:INFO: Eye window for uplink 30: XXX________________________________________________________________________XXXXX
Clock Delay: 38
14:40:14:setup_element:INFO: Eye window for uplink 31: XXX________________________________________________________________________XXXXX
Clock Delay: 38
14:40:14:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
14:40:14:setup_element:INFO: Scanning data phases
14:40:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:40:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:40:20:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:40:20:setup_element:INFO: Eye window for uplink 24: XXXXXXXXX_____________________________XX
Data delay found: 23
14:40:20:setup_element:INFO: Eye window for uplink 25: __XXXXXXXXXX____________________________
Data delay found: 26
14:40:20:setup_element:INFO: Eye window for uplink 26: XXXXXXXXX______________________________X
Data delay found: 23
14:40:20:setup_element:INFO: Eye window for uplink 27: ____XXXXXXXXXX__________________________
Data delay found: 28
14:40:20:setup_element:INFO: Eye window for uplink 28: _____XXXXXXXXX__________________________
Data delay found: 29
14:40:20:setup_element:INFO: Eye window for uplink 29: _______XXXXXXXXX________________________
Data delay found: 31
14:40:20:setup_element:INFO: Eye window for uplink 30: ___XXXXXXXXXXXX_________________________
Data delay found: 28
14:40:20:setup_element:INFO: Eye window for uplink 31: ____XXXXXXXXXX__________________________
Data delay found: 28
14:40:20:setup_element:INFO: Setting the data phase to 23 for uplink 24
14:40:20:setup_element:INFO: Setting the data phase to 26 for uplink 25
14:40:20:setup_element:INFO: Setting the data phase to 23 for uplink 26
14:40:20:setup_element:INFO: Setting the data phase to 28 for uplink 27
14:40:20:setup_element:INFO: Setting the data phase to 29 for uplink 28
14:40:20:setup_element:INFO: Setting the data phase to 31 for uplink 29
14:40:20:setup_element:INFO: Setting the data phase to 28 for uplink 30
14:40:20:setup_element:INFO: Setting the data phase to 28 for uplink 31
14:40:20:setup_element:INFO: Beginning SMX ASICs map scan
14:40:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:40:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:40:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:40:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:40:20:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
14:40:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:40:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:40:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:40:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:40:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:40:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:40:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:40:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:40:22:setup_element:INFO: Performing Elink synchronization
14:40:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:40:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:40:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:40:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:40:22:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:40:22:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:40:23:febtest:INFO: Init all SMX (CSA): 30
14:40:33:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:40:33:febtest:INFO: 30-01 | XA-000-09-004-020-015-015-04 | 25.1 | 1195.1
14:40:33:febtest:INFO: 28-03 | XA-000-09-004-020-009-013-01 | 47.3 | 1130.0
14:40:33:febtest:INFO: 26-05 | XA-000-09-004-020-009-014-01 | 44.1 | 1147.8
14:40:33:febtest:INFO: 24-07 | XA-000-09-004-020-018-015-15 | 28.2 | 1195.1
14:40:34:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:40:36:ST3_smx:INFO: chip: 30-1 25.062742 C 1206.851500 mV
14:40:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:40:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:40:36:ST3_smx:INFO: Electrons
14:40:36:ST3_smx:INFO: # loops 0
14:40:39:ST3_smx:INFO: # loops 1
14:40:41:ST3_smx:INFO: # loops 2
14:40:43:ST3_smx:INFO: Total # of broken channels: 0
14:40:43:ST3_smx:INFO: List of broken channels: []
14:40:43:ST3_smx:INFO: Total # of broken channels: 0
14:40:43:ST3_smx:INFO: List of broken channels: []
14:40:45:ST3_smx:INFO: chip: 28-3 47.250730 C 1135.937260 mV
14:40:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:40:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:40:45:ST3_smx:INFO: Electrons
14:40:45:ST3_smx:INFO: # loops 0
14:40:47:ST3_smx:INFO: # loops 1
14:40:49:ST3_smx:INFO: # loops 2
14:40:52:ST3_smx:INFO: Total # of broken channels: 0
14:40:52:ST3_smx:INFO: List of broken channels: []
14:40:52:ST3_smx:INFO: Total # of broken channels: 0
14:40:52:ST3_smx:INFO: List of broken channels: []
14:40:53:ST3_smx:INFO: chip: 26-5 44.073563 C 1159.654860 mV
14:40:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:40:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:40:53:ST3_smx:INFO: Electrons
14:40:53:ST3_smx:INFO: # loops 0
14:40:55:ST3_smx:INFO: # loops 1
14:40:57:ST3_smx:INFO: # loops 2
14:40:59:ST3_smx:INFO: Total # of broken channels: 0
14:40:59:ST3_smx:INFO: List of broken channels: []
14:40:59:ST3_smx:INFO: Total # of broken channels: 0
14:40:59:ST3_smx:INFO: List of broken channels: []
14:41:01:ST3_smx:INFO: chip: 24-7 28.225000 C 1200.969315 mV
14:41:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:41:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:41:01:ST3_smx:INFO: Electrons
14:41:01:ST3_smx:INFO: # loops 0
14:41:03:ST3_smx:INFO: # loops 1
14:41:05:ST3_smx:INFO: # loops 2
14:41:07:ST3_smx:INFO: Total # of broken channels: 0
14:41:07:ST3_smx:INFO: List of broken channels: []
14:41:07:ST3_smx:INFO: Total # of broken channels: 0
14:41:07:ST3_smx:INFO: List of broken channels: []
14:41:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:41:08:febtest:INFO: 30-01 | XA-000-09-004-020-015-015-04 | 28.2 | 1230.3
14:41:08:febtest:INFO: 28-03 | XA-000-09-004-020-009-013-01 | 47.3 | 1159.7
14:41:08:febtest:INFO: 26-05 | XA-000-09-004-020-009-014-01 | 44.1 | 1189.2
14:41:08:febtest:INFO: 24-07 | XA-000-09-004-020-018-015-15 | 31.4 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_04_25-14_40_12
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4131| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7071', '1.850', '1.3670']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0110', '1.850', '1.3040']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9912', '1.850', '0.2691']