
FEB_4132 25.03.25 13:54:37
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13:54:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:54:37:ST3_Shared:INFO: FEB-Microcable 13:54:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:54:37:febtest:INFO: Testing FEB with SN 4132 13:54:39:smx_tester:INFO: Scanning setup 13:54:39:elinks:INFO: Disabling clock on downlink 0 13:54:39:elinks:INFO: Disabling clock on downlink 1 13:54:39:elinks:INFO: Disabling clock on downlink 2 13:54:39:elinks:INFO: Disabling clock on downlink 3 13:54:39:elinks:INFO: Disabling clock on downlink 4 13:54:39:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:54:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:54:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:54:39:elinks:INFO: Disabling clock on downlink 0 13:54:39:elinks:INFO: Disabling clock on downlink 1 13:54:39:elinks:INFO: Disabling clock on downlink 2 13:54:39:elinks:INFO: Disabling clock on downlink 3 13:54:39:elinks:INFO: Disabling clock on downlink 4 13:54:39:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:54:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:54:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:54:39:elinks:INFO: Disabling clock on downlink 0 13:54:39:elinks:INFO: Disabling clock on downlink 1 13:54:39:elinks:INFO: Disabling clock on downlink 2 13:54:39:elinks:INFO: Disabling clock on downlink 3 13:54:39:elinks:INFO: Disabling clock on downlink 4 13:54:39:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:54:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:54:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 13:54:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 13:54:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 13:54:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 13:54:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 13:54:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 13:54:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 13:54:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 13:54:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:54:39:elinks:INFO: Disabling clock on downlink 0 13:54:39:elinks:INFO: Disabling clock on downlink 1 13:54:39:elinks:INFO: Disabling clock on downlink 2 13:54:39:elinks:INFO: Disabling clock on downlink 3 13:54:39:elinks:INFO: Disabling clock on downlink 4 13:54:39:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:54:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:54:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:54:39:elinks:INFO: Disabling clock on downlink 0 13:54:39:elinks:INFO: Disabling clock on downlink 1 13:54:39:elinks:INFO: Disabling clock on downlink 2 13:54:39:elinks:INFO: Disabling clock on downlink 3 13:54:39:elinks:INFO: Disabling clock on downlink 4 13:54:39:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:54:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:54:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:54:40:setup_element:INFO: Scanning clock phase 13:54:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:54:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:54:40:setup_element:INFO: Clock phase scan results for group 0, downlink 2 13:54:40:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXX___ Clock Delay: 33 13:54:40:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXX___ Clock Delay: 33 13:54:40:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXX___ Clock Delay: 33 13:54:40:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXX___ Clock Delay: 33 13:54:40:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXX_____ Clock Delay: 31 13:54:40:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXX_____ Clock Delay: 31 13:54:40:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXX____ Clock Delay: 33 13:54:40:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXX____ Clock Delay: 33 13:54:40:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 13:54:40:setup_element:INFO: Scanning data phases 13:54:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:54:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:54:45:setup_element:INFO: Data phase scan results for group 0, downlink 2 13:54:45:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________ Data delay found: 29 13:54:45:setup_element:INFO: Eye window for uplink 25: __________XXXXXX________________________ Data delay found: 32 13:54:45:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________ Data delay found: 29 13:54:45:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXX______________________ Data delay found: 33 13:54:45:setup_element:INFO: Eye window for uplink 28: _________XXXXX__________________________ Data delay found: 31 13:54:45:setup_element:INFO: Eye window for uplink 29: ___________XXXXX________________________ Data delay found: 33 13:54:45:setup_element:INFO: Eye window for uplink 30: _____________XXXXXX_____________________ Data delay found: 35 13:54:45:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_____________________ Data delay found: 36 13:54:45:setup_element:INFO: Setting the data phase to 29 for uplink 24 13:54:45:setup_element:INFO: Setting the data phase to 32 for uplink 25 13:54:45:setup_element:INFO: Setting the data phase to 29 for uplink 26 13:54:45:setup_element:INFO: Setting the data phase to 33 for uplink 27 13:54:45:setup_element:INFO: Setting the data phase to 31 for uplink 28 13:54:45:setup_element:INFO: Setting the data phase to 33 for uplink 29 13:54:45:setup_element:INFO: Setting the data phase to 35 for uplink 30 13:54:45:setup_element:INFO: Setting the data phase to 36 for uplink 31 13:54:45:setup_element:INFO: Beginning SMX ASICs map scan 13:54:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:54:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:54:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:54:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:54:45:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 13:54:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 13:54:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 13:54:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 13:54:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 13:54:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 13:54:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 13:54:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 13:54:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 13:54:48:setup_element:INFO: Performing Elink synchronization 13:54:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:54:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:54:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:54:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:54:48:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 13:54:48:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 13:54:48:febtest:INFO: Init all SMX (CSA): 30 13:54:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:54:56:febtest:INFO: 30-01 | XA-000-09-004-005-013-017-07 | 34.6 | 1171.5 13:54:56:febtest:INFO: 28-03 | XA-000-09-004-005-010-015-08 | 31.4 | 1189.2 13:54:56:febtest:INFO: 26-05 | XA-000-09-004-005-004-016-06 | 47.3 | 1130.0 13:54:57:febtest:INFO: 24-07 | XA-000-09-004-005-016-017-12 | 28.2 | 1189.2 13:54:58:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 13:55:00:ST3_smx:INFO: chip: 30-1 34.556970 C 1183.292940 mV 13:55:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:55:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:55:00:ST3_smx:INFO: Electrons 13:55:00:ST3_smx:INFO: # loops 0 13:55:01:ST3_smx:INFO: # loops 1 13:55:03:ST3_smx:INFO: # loops 2 13:55:04:ST3_smx:INFO: Total # of broken channels: 0 13:55:04:ST3_smx:INFO: List of broken channels: [] 13:55:04:ST3_smx:INFO: Total # of broken channels: 0 13:55:04:ST3_smx:INFO: List of broken channels: [] 13:55:06:ST3_smx:INFO: chip: 28-3 31.389742 C 1200.969315 mV 13:55:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:55:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:55:06:ST3_smx:INFO: Electrons 13:55:06:ST3_smx:INFO: # loops 0 13:55:08:ST3_smx:INFO: # loops 1 13:55:09:ST3_smx:INFO: # loops 2 13:55:11:ST3_smx:INFO: Total # of broken channels: 0 13:55:11:ST3_smx:INFO: List of broken channels: [] 13:55:11:ST3_smx:INFO: Total # of broken channels: 0 13:55:11:ST3_smx:INFO: List of broken channels: [] 13:55:13:ST3_smx:INFO: chip: 26-5 47.250730 C 1141.874115 mV 13:55:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:55:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:55:13:ST3_smx:INFO: Electrons 13:55:13:ST3_smx:INFO: # loops 0 13:55:14:ST3_smx:INFO: # loops 1 13:55:16:ST3_smx:INFO: # loops 2 13:55:17:ST3_smx:INFO: Total # of broken channels: 0 13:55:17:ST3_smx:INFO: List of broken channels: [] 13:55:17:ST3_smx:INFO: Total # of broken channels: 0 13:55:17:ST3_smx:INFO: List of broken channels: [] 13:55:19:ST3_smx:INFO: chip: 24-7 31.389742 C 1195.082160 mV 13:55:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:55:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:55:19:ST3_smx:INFO: Electrons 13:55:19:ST3_smx:INFO: # loops 0 13:55:21:ST3_smx:INFO: # loops 1 13:55:22:ST3_smx:INFO: # loops 2 13:55:24:ST3_smx:INFO: Total # of broken channels: 0 13:55:24:ST3_smx:INFO: List of broken channels: [] 13:55:24:ST3_smx:INFO: Total # of broken channels: 0 13:55:24:ST3_smx:INFO: List of broken channels: [] 13:55:24:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:55:24:febtest:INFO: 30-01 | XA-000-09-004-005-013-017-07 | 31.4 | 1206.9 13:55:25:febtest:INFO: 28-03 | XA-000-09-004-005-010-015-08 | 31.4 | 1224.5 13:55:25:febtest:INFO: 26-05 | XA-000-09-004-005-004-016-06 | 47.3 | 1159.7 13:55:25:febtest:INFO: 24-07 | XA-000-09-004-005-016-017-12 | 31.4 | 1218.6 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_03_25-13_54_37 OPERATOR : Henrik; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4132| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8135', '1.850', '1.3330'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9865', '1.850', '1.2040'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9788', '1.850', '0.2657']