
FEB_4135 08.04.25 12:15:40
TextEdit.txt
12:15:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:15:40:ST3_Shared:INFO: FEB-Microcable 12:15:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:15:40:febtest:INFO: Testing FEB with SN 4135 12:15:41:smx_tester:INFO: Scanning setup 12:15:41:elinks:INFO: Disabling clock on downlink 0 12:15:41:elinks:INFO: Disabling clock on downlink 1 12:15:41:elinks:INFO: Disabling clock on downlink 2 12:15:41:elinks:INFO: Disabling clock on downlink 3 12:15:41:elinks:INFO: Disabling clock on downlink 4 12:15:41:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:15:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:15:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:15:41:elinks:INFO: Disabling clock on downlink 0 12:15:41:elinks:INFO: Disabling clock on downlink 1 12:15:41:elinks:INFO: Disabling clock on downlink 2 12:15:41:elinks:INFO: Disabling clock on downlink 3 12:15:41:elinks:INFO: Disabling clock on downlink 4 12:15:41:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:15:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:15:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:15:42:elinks:INFO: Disabling clock on downlink 0 12:15:42:elinks:INFO: Disabling clock on downlink 1 12:15:42:elinks:INFO: Disabling clock on downlink 2 12:15:42:elinks:INFO: Disabling clock on downlink 3 12:15:42:elinks:INFO: Disabling clock on downlink 4 12:15:42:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:15:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 12:15:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 12:15:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:15:42:elinks:INFO: Disabling clock on downlink 0 12:15:42:elinks:INFO: Disabling clock on downlink 1 12:15:42:elinks:INFO: Disabling clock on downlink 2 12:15:42:elinks:INFO: Disabling clock on downlink 3 12:15:42:elinks:INFO: Disabling clock on downlink 4 12:15:42:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:15:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 12:15:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:15:42:elinks:INFO: Disabling clock on downlink 0 12:15:42:elinks:INFO: Disabling clock on downlink 1 12:15:42:elinks:INFO: Disabling clock on downlink 2 12:15:42:elinks:INFO: Disabling clock on downlink 3 12:15:42:elinks:INFO: Disabling clock on downlink 4 12:15:42:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:15:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 12:15:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:15:42:setup_element:INFO: Scanning clock phase 12:15:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:15:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:15:42:setup_element:INFO: Clock phase scan results for group 0, downlink 2 12:15:42:setup_element:INFO: Eye window for uplink 16: _________________________________________________________________________XXXXX__ Clock Delay: 35 12:15:42:setup_element:INFO: Eye window for uplink 17: _________________________________________________________________________XXXXX__ Clock Delay: 35 12:15:42:setup_element:INFO: Eye window for uplink 18: _________________________________________________________________________XXXXX__ Clock Delay: 35 12:15:42:setup_element:INFO: Eye window for uplink 19: _________________________________________________________________________XXXXX__ Clock Delay: 35 12:15:42:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXX____ Clock Delay: 33 12:15:42:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXX____ Clock Delay: 33 12:15:42:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXX____ Clock Delay: 33 12:15:42:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXX____ Clock Delay: 33 12:15:42:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXX___ Clock Delay: 33 12:15:42:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXX___ Clock Delay: 33 12:15:42:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____ Clock Delay: 33 12:15:42:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____ Clock Delay: 33 12:15:42:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___ Clock Delay: 34 12:15:42:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___ Clock Delay: 34 12:15:42:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________________XXXXX_ Clock Delay: 36 12:15:42:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________________XXXXX_ Clock Delay: 36 12:15:42:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 12:15:42:setup_element:INFO: Scanning data phases 12:15:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:15:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:15:47:setup_element:INFO: Data phase scan results for group 0, downlink 2 12:15:47:setup_element:INFO: Eye window for uplink 16: XXX___________________________________XX Data delay found: 20 12:15:47:setup_element:INFO: Eye window for uplink 17: XX__________________________________XXXX Data delay found: 18 12:15:47:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX Data delay found: 19 12:15:47:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXXX Data delay found: 17 12:15:47:setup_element:INFO: Eye window for uplink 20: ________________________________XXXXX___ Data delay found: 14 12:15:47:setup_element:INFO: Eye window for uplink 21: ________________________________XXXX____ Data delay found: 13 12:15:48:setup_element:INFO: Eye window for uplink 22: _________________________________XXXXX__ Data delay found: 15 12:15:48:setup_element:INFO: Eye window for uplink 23: _____________________________XXXXX______ Data delay found: 11 12:15:48:setup_element:INFO: Eye window for uplink 24: _____XXXX_______________________________ Data delay found: 26 12:15:48:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________ Data delay found: 29 12:15:48:setup_element:INFO: Eye window for uplink 26: _____XXXXXX_____________________________ Data delay found: 27 12:15:48:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________ Data delay found: 32 12:15:48:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX_______________________ Data delay found: 33 12:15:48:setup_element:INFO: Eye window for uplink 29: _____________XXXXXX_____________________ Data delay found: 35 12:15:48:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________ Data delay found: 39 12:15:48:setup_element:INFO: Eye window for uplink 31: __________________XXXXX_________________ Data delay found: 0 12:15:48:setup_element:INFO: Setting the data phase to 20 for uplink 16 12:15:48:setup_element:INFO: Setting the data phase to 18 for uplink 17 12:15:48:setup_element:INFO: Setting the data phase to 19 for uplink 18 12:15:48:setup_element:INFO: Setting the data phase to 17 for uplink 19 12:15:48:setup_element:INFO: Setting the data phase to 14 for uplink 20 12:15:48:setup_element:INFO: Setting the data phase to 13 for uplink 21 12:15:48:setup_element:INFO: Setting the data phase to 15 for uplink 22 12:15:48:setup_element:INFO: Setting the data phase to 11 for uplink 23 12:15:48:setup_element:INFO: Setting the data phase to 26 for uplink 24 12:15:48:setup_element:INFO: Setting the data phase to 29 for uplink 25 12:15:48:setup_element:INFO: Setting the data phase to 27 for uplink 26 12:15:48:setup_element:INFO: Setting the data phase to 32 for uplink 27 12:15:48:setup_element:INFO: Setting the data phase to 33 for uplink 28 12:15:48:setup_element:INFO: Setting the data phase to 35 for uplink 29 12:15:48:setup_element:INFO: Setting the data phase to 39 for uplink 30 12:15:48:setup_element:INFO: Setting the data phase to 0 for uplink 31 12:15:48:setup_element:INFO: Beginning SMX ASICs map scan 12:15:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:15:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:15:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:15:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:15:48:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 12:15:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 12:15:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 12:15:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 12:15:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 12:15:48:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 12:15:48:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 12:15:48:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 12:15:48:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 12:15:48:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 12:15:48:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 12:15:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 12:15:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 12:15:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 12:15:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 12:15:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 12:15:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 12:15:50:setup_element:INFO: Performing Elink synchronization 12:15:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:15:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:15:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:15:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:15:50:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 12:15:50:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 12:15:51:febtest:INFO: Init all SMX (CSA): 30 12:16:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:16:07:febtest:INFO: 23-00 | XA-000-09-004-020-010-015-15 | 47.3 | 1141.9 12:16:07:febtest:INFO: 30-01 | XA-000-09-004-020-016-014-12 | 40.9 | 1147.8 12:16:07:febtest:INFO: 21-02 | XA-000-09-004-020-013-015-07 | 40.9 | 1147.8 12:16:07:febtest:INFO: 28-03 | XA-000-09-004-020-016-015-12 | 37.7 | 1153.7 12:16:07:febtest:INFO: 19-04 | XA-000-09-004-020-016-016-11 | 34.6 | 1189.2 12:16:08:febtest:INFO: 26-05 | XA-000-09-004-020-004-015-06 | 34.6 | 1171.5 12:16:08:febtest:INFO: 17-06 | XA-000-09-004-020-016-017-11 | 34.6 | 1177.4 12:16:08:febtest:INFO: 24-07 | XA-000-09-004-020-007-015-08 | 34.6 | 1183.3 12:16:09:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 12:16:11:ST3_smx:INFO: chip: 23-0 47.250730 C 1153.732915 mV 12:16:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:11:ST3_smx:INFO: Electrons 12:16:11:ST3_smx:INFO: # loops 0 12:16:13:ST3_smx:INFO: # loops 1 12:16:15:ST3_smx:INFO: # loops 2 12:16:16:ST3_smx:INFO: Total # of broken channels: 0 12:16:16:ST3_smx:INFO: List of broken channels: [] 12:16:16:ST3_smx:INFO: Total # of broken channels: 0 12:16:16:ST3_smx:INFO: List of broken channels: [] 12:16:18:ST3_smx:INFO: chip: 30-1 40.898880 C 1159.654860 mV 12:16:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:18:ST3_smx:INFO: Electrons 12:16:18:ST3_smx:INFO: # loops 0 12:16:19:ST3_smx:INFO: # loops 1 12:16:21:ST3_smx:INFO: # loops 2 12:16:22:ST3_smx:INFO: Total # of broken channels: 0 12:16:22:ST3_smx:INFO: List of broken channels: [] 12:16:22:ST3_smx:INFO: Total # of broken channels: 0 12:16:22:ST3_smx:INFO: List of broken channels: [] 12:16:24:ST3_smx:INFO: chip: 21-2 44.073563 C 1159.654860 mV 12:16:24:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:24:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:24:ST3_smx:INFO: Electrons 12:16:24:ST3_smx:INFO: # loops 0 12:16:26:ST3_smx:INFO: # loops 1 12:16:27:ST3_smx:INFO: # loops 2 12:16:29:ST3_smx:INFO: Total # of broken channels: 0 12:16:29:ST3_smx:INFO: List of broken channels: [] 12:16:29:ST3_smx:INFO: Total # of broken channels: 0 12:16:29:ST3_smx:INFO: List of broken channels: [] 12:16:30:ST3_smx:INFO: chip: 28-3 37.726682 C 1165.571835 mV 12:16:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:30:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:30:ST3_smx:INFO: Electrons 12:16:30:ST3_smx:INFO: # loops 0 12:16:32:ST3_smx:INFO: # loops 1 12:16:34:ST3_smx:INFO: # loops 2 12:16:35:ST3_smx:INFO: Total # of broken channels: 0 12:16:35:ST3_smx:INFO: List of broken channels: [] 12:16:35:ST3_smx:INFO: Total # of broken channels: 0 12:16:35:ST3_smx:INFO: List of broken channels: [] 12:16:37:ST3_smx:INFO: chip: 19-4 34.556970 C 1206.851500 mV 12:16:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:37:ST3_smx:INFO: Electrons 12:16:37:ST3_smx:INFO: # loops 0 12:16:38:ST3_smx:INFO: # loops 1 12:16:40:ST3_smx:INFO: # loops 2 12:16:42:ST3_smx:INFO: Total # of broken channels: 0 12:16:42:ST3_smx:INFO: List of broken channels: [] 12:16:42:ST3_smx:INFO: Total # of broken channels: 0 12:16:42:ST3_smx:INFO: List of broken channels: [] 12:16:43:ST3_smx:INFO: chip: 26-5 34.556970 C 1183.292940 mV 12:16:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:43:ST3_smx:INFO: Electrons 12:16:43:ST3_smx:INFO: # loops 0 12:16:45:ST3_smx:INFO: # loops 1 12:16:47:ST3_smx:INFO: # loops 2 12:16:48:ST3_smx:INFO: Total # of broken channels: 0 12:16:48:ST3_smx:INFO: List of broken channels: [] 12:16:48:ST3_smx:INFO: Total # of broken channels: 0 12:16:48:ST3_smx:INFO: List of broken channels: [] 12:16:50:ST3_smx:INFO: chip: 17-6 34.556970 C 1189.190035 mV 12:16:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:50:ST3_smx:INFO: Electrons 12:16:50:ST3_smx:INFO: # loops 0 12:16:51:ST3_smx:INFO: # loops 1 12:16:53:ST3_smx:INFO: # loops 2 12:16:55:ST3_smx:INFO: Total # of broken channels: 0 12:16:55:ST3_smx:INFO: List of broken channels: [] 12:16:55:ST3_smx:INFO: Total # of broken channels: 0 12:16:55:ST3_smx:INFO: List of broken channels: [] 12:16:56:ST3_smx:INFO: chip: 24-7 34.556970 C 1195.082160 mV 12:16:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:16:56:ST3_smx:INFO: Electrons 12:16:56:ST3_smx:INFO: # loops 0 12:16:58:ST3_smx:INFO: # loops 1 12:17:00:ST3_smx:INFO: # loops 2 12:17:01:ST3_smx:INFO: Total # of broken channels: 0 12:17:01:ST3_smx:INFO: List of broken channels: [] 12:17:01:ST3_smx:INFO: Total # of broken channels: 0 12:17:01:ST3_smx:INFO: List of broken channels: [] 12:17:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:17:02:febtest:INFO: 23-00 | XA-000-09-004-020-010-015-15 | 47.3 | 1171.5 12:17:02:febtest:INFO: 30-01 | XA-000-09-004-020-016-014-12 | 40.9 | 1189.2 12:17:02:febtest:INFO: 21-02 | XA-000-09-004-020-013-015-07 | 44.1 | 1183.3 12:17:02:febtest:INFO: 28-03 | XA-000-09-004-020-016-015-12 | 40.9 | 1189.2 12:17:02:febtest:INFO: 19-04 | XA-000-09-004-020-016-016-11 | 34.6 | 1300.3 12:17:03:febtest:INFO: 26-05 | XA-000-09-004-020-004-015-06 | 37.7 | 1201.0 12:17:03:febtest:INFO: 17-06 | XA-000-09-004-020-016-017-11 | 37.7 | 1206.9 12:17:03:febtest:INFO: 24-07 | XA-000-09-004-020-007-015-08 | 34.6 | 1212.7 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_04_08-12_15_40 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4135| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5130', '1.849', '2.3300'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9930', '1.850', '2.6100'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9810', '1.850', '0.5282']