FEB_4141 11.04.25 10:20:07
Info
10:20:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:20:07:ST3_Shared:INFO: FEB-Microcable
10:20:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:20:07:febtest:INFO: Testing FEB with SN 4141
10:20:08:smx_tester:INFO: Scanning setup
10:20:08:elinks:INFO: Disabling clock on downlink 0
10:20:08:elinks:INFO: Disabling clock on downlink 1
10:20:08:elinks:INFO: Disabling clock on downlink 2
10:20:08:elinks:INFO: Disabling clock on downlink 3
10:20:08:elinks:INFO: Disabling clock on downlink 4
10:20:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:20:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:20:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:20:09:elinks:INFO: Disabling clock on downlink 0
10:20:09:elinks:INFO: Disabling clock on downlink 1
10:20:09:elinks:INFO: Disabling clock on downlink 2
10:20:09:elinks:INFO: Disabling clock on downlink 3
10:20:09:elinks:INFO: Disabling clock on downlink 4
10:20:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:20:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:20:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:20:09:elinks:INFO: Disabling clock on downlink 0
10:20:09:elinks:INFO: Disabling clock on downlink 1
10:20:09:elinks:INFO: Disabling clock on downlink 2
10:20:09:elinks:INFO: Disabling clock on downlink 3
10:20:09:elinks:INFO: Disabling clock on downlink 4
10:20:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:20:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:20:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:20:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:20:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:20:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:20:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:20:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:20:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:20:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:20:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:20:09:elinks:INFO: Disabling clock on downlink 0
10:20:09:elinks:INFO: Disabling clock on downlink 1
10:20:09:elinks:INFO: Disabling clock on downlink 2
10:20:09:elinks:INFO: Disabling clock on downlink 3
10:20:09:elinks:INFO: Disabling clock on downlink 4
10:20:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:20:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:20:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:20:09:elinks:INFO: Disabling clock on downlink 0
10:20:09:elinks:INFO: Disabling clock on downlink 1
10:20:09:elinks:INFO: Disabling clock on downlink 2
10:20:09:elinks:INFO: Disabling clock on downlink 3
10:20:09:elinks:INFO: Disabling clock on downlink 4
10:20:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:20:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:20:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:20:09:setup_element:INFO: Scanning clock phase
10:20:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:20:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:20:09:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:20:09:setup_element:INFO: Eye window for uplink 24: XXX_________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
10:20:09:setup_element:INFO: Eye window for uplink 25: XXX_________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
10:20:09:setup_element:INFO: Eye window for uplink 26: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
10:20:09:setup_element:INFO: Eye window for uplink 27: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
10:20:09:setup_element:INFO: Eye window for uplink 28: XXXX______________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 34
10:20:09:setup_element:INFO: Eye window for uplink 29: XXXX______________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 34
10:20:09:setup_element:INFO: Eye window for uplink 30: XXXX_____________________________________________________________XXXXXX_______XX
Clock Delay: 34
10:20:09:setup_element:INFO: Eye window for uplink 31: XXXX_____________________________________________________________XXXXXX_______XX
Clock Delay: 34
10:20:09:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
10:20:09:setup_element:INFO: Scanning data phases
10:20:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:20:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:20:14:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:20:14:setup_element:INFO: Eye window for uplink 24: _XXXXXXXX________XXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 12
10:20:14:setup_element:INFO: Eye window for uplink 25: ___XXXXXXXXX_____XXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 14
10:20:14:setup_element:INFO: Eye window for uplink 26: _XXXXXXXXX______________________________
Data delay found: 25
10:20:14:setup_element:INFO: Eye window for uplink 27: _____XXXXXXXXXX_________________________
Data delay found: 29
10:20:14:setup_element:INFO: Eye window for uplink 28: _______XXXXXXXX_________________________
Data delay found: 30
10:20:14:setup_element:INFO: Eye window for uplink 29: _________XXXXXXXXX______________________
Data delay found: 33
10:20:14:setup_element:INFO: Eye window for uplink 30: _____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX__
Data delay found: 1
10:20:14:setup_element:INFO: Eye window for uplink 31: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX__
Data delay found: 1
10:20:14:setup_element:INFO: Setting the data phase to 12 for uplink 24
10:20:14:setup_element:INFO: Setting the data phase to 14 for uplink 25
10:20:14:setup_element:INFO: Setting the data phase to 25 for uplink 26
10:20:14:setup_element:INFO: Setting the data phase to 29 for uplink 27
10:20:14:setup_element:INFO: Setting the data phase to 30 for uplink 28
10:20:14:setup_element:INFO: Setting the data phase to 33 for uplink 29
10:20:14:setup_element:INFO: Setting the data phase to 1 for uplink 30
10:20:14:setup_element:INFO: Setting the data phase to 1 for uplink 31
10:20:14:setup_element:INFO: Beginning SMX ASICs map scan
10:20:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:20:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:20:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:20:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:20:14:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:20:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:20:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:20:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:20:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:20:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:20:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:20:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:20:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:20:17:setup_element:INFO: Performing Elink synchronization
10:20:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:20:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:20:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:20:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:20:17:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:20:17:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:20:18:febtest:INFO: Init all SMX (CSA): 30
10:20:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:20:25:febtest:INFO: 30-01 | XA-000-09-004-020-005-021-12 | 28.2 | 1189.2
10:20:26:febtest:INFO: 28-03 | XA-000-09-004-020-005-022-12 | 40.9 | 1153.7
10:20:26:febtest:INFO: 26-05 | XA-000-09-004-020-014-023-14 | 40.9 | 1147.8
10:20:26:febtest:INFO: 24-07 | XA-000-09-004-020-008-023-11 | 34.6 | 1177.4
10:20:27:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:20:29:ST3_smx:INFO: chip: 30-1 28.225000 C 1200.969315 mV
10:20:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:29:ST3_smx:INFO: Electrons
10:20:29:ST3_smx:INFO: # loops 0
10:20:31:ST3_smx:INFO: # loops 1
10:20:32:ST3_smx:INFO: # loops 2
10:20:34:ST3_smx:INFO: Total # of broken channels: 0
10:20:34:ST3_smx:INFO: List of broken channels: []
10:20:34:ST3_smx:INFO: Total # of broken channels: 0
10:20:34:ST3_smx:INFO: List of broken channels: []
10:20:36:ST3_smx:INFO: chip: 28-3 40.898880 C 1165.571835 mV
10:20:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:36:ST3_smx:INFO: Electrons
10:20:36:ST3_smx:INFO: # loops 0
10:20:37:ST3_smx:INFO: # loops 1
10:20:39:ST3_smx:INFO: # loops 2
10:20:40:ST3_smx:INFO: Total # of broken channels: 0
10:20:40:ST3_smx:INFO: List of broken channels: []
10:20:40:ST3_smx:INFO: Total # of broken channels: 0
10:20:40:ST3_smx:INFO: List of broken channels: []
10:20:42:ST3_smx:INFO: chip: 26-5 40.898880 C 1153.732915 mV
10:20:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:42:ST3_smx:INFO: Electrons
10:20:42:ST3_smx:INFO: # loops 0
10:20:43:ST3_smx:INFO: # loops 1
10:20:45:ST3_smx:INFO: # loops 2
10:20:47:ST3_smx:INFO: Total # of broken channels: 0
10:20:47:ST3_smx:INFO: List of broken channels: []
10:20:47:ST3_smx:INFO: Total # of broken channels: 0
10:20:47:ST3_smx:INFO: List of broken channels: []
10:20:48:ST3_smx:INFO: chip: 24-7 37.726682 C 1183.292940 mV
10:20:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:20:48:ST3_smx:INFO: Electrons
10:20:48:ST3_smx:INFO: # loops 0
10:20:50:ST3_smx:INFO: # loops 1
10:20:52:ST3_smx:INFO: # loops 2
10:20:53:ST3_smx:INFO: Total # of broken channels: 0
10:20:53:ST3_smx:INFO: List of broken channels: []
10:20:53:ST3_smx:INFO: Total # of broken channels: 0
10:20:53:ST3_smx:INFO: List of broken channels: []
10:20:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:20:54:febtest:INFO: 30-01 | XA-000-09-004-020-005-021-12 | 28.2 | 1230.3
10:20:54:febtest:INFO: 28-03 | XA-000-09-004-020-005-022-12 | 40.9 | 1189.2
10:20:54:febtest:INFO: 26-05 | XA-000-09-004-020-014-023-14 | 44.1 | 1177.4
10:20:54:febtest:INFO: 24-07 | XA-000-09-004-020-008-023-11 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_04_11-10_20_07
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4141| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7157', '1.850', '0.9991']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9917', '1.850', '1.3210']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9847', '1.850', '0.2661']