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FEB_4142 15.04.25 08:15:19
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08:15:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:15:19:ST3_Shared:INFO: FEB-Microcable
08:15:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:15:20:febtest:INFO: Testing FEB with SN 4142
08:15:21:smx_tester:INFO: Scanning setup
08:15:21:elinks:INFO: Disabling clock on downlink 0
08:15:21:elinks:INFO: Disabling clock on downlink 1
08:15:21:elinks:INFO: Disabling clock on downlink 2
08:15:21:elinks:INFO: Disabling clock on downlink 3
08:15:21:elinks:INFO: Disabling clock on downlink 4
08:15:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:15:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:15:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:15:21:elinks:INFO: Disabling clock on downlink 0
08:15:21:elinks:INFO: Disabling clock on downlink 1
08:15:21:elinks:INFO: Disabling clock on downlink 2
08:15:21:elinks:INFO: Disabling clock on downlink 3
08:15:21:elinks:INFO: Disabling clock on downlink 4
08:15:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:15:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:15:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:15:21:elinks:INFO: Disabling clock on downlink 0
08:15:21:elinks:INFO: Disabling clock on downlink 1
08:15:21:elinks:INFO: Disabling clock on downlink 2
08:15:21:elinks:INFO: Disabling clock on downlink 3
08:15:21:elinks:INFO: Disabling clock on downlink 4
08:15:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:15:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:15:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:15:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:15:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:15:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:15:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:15:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:15:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:15:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:15:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:15:22:elinks:INFO: Disabling clock on downlink 0
08:15:22:elinks:INFO: Disabling clock on downlink 1
08:15:22:elinks:INFO: Disabling clock on downlink 2
08:15:22:elinks:INFO: Disabling clock on downlink 3
08:15:22:elinks:INFO: Disabling clock on downlink 4
08:15:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:15:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:15:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:15:22:elinks:INFO: Disabling clock on downlink 0
08:15:22:elinks:INFO: Disabling clock on downlink 1
08:15:22:elinks:INFO: Disabling clock on downlink 2
08:15:22:elinks:INFO: Disabling clock on downlink 3
08:15:22:elinks:INFO: Disabling clock on downlink 4
08:15:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:15:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:15:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:15:22:setup_element:INFO: Scanning clock phase
08:15:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:15:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:15:22:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:15:22:setup_element:INFO: Eye window for uplink 24: XXXX______________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 34
08:15:22:setup_element:INFO: Eye window for uplink 25: XXXX______________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 34
08:15:22:setup_element:INFO: Eye window for uplink 26: XXXX____________________________________________________________________________
Clock Delay: 41
08:15:22:setup_element:INFO: Eye window for uplink 27: XXXX____________________________________________________________________________
Clock Delay: 41
08:15:22:setup_element:INFO: Eye window for uplink 28: XXX_______________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 34
08:15:22:setup_element:INFO: Eye window for uplink 29: XXX_______________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 34
08:15:22:setup_element:INFO: Eye window for uplink 30: XXXXX___________________________________________________________________________
Clock Delay: 42
08:15:22:setup_element:INFO: Eye window for uplink 31: XXXXX___________________________________________________________________________
Clock Delay: 42
08:15:22:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 2
08:15:22:setup_element:INFO: Scanning data phases
08:15:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:15:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:15:27:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:15:27:setup_element:INFO: Eye window for uplink 24: XXXXXXXX______________________XXXXXXXXXX
Data delay found: 18
08:15:27:setup_element:INFO: Eye window for uplink 25: _XXXXXXXX_____________________XXXXXXXXXX
Data delay found: 19
08:15:27:setup_element:INFO: Eye window for uplink 26: XXXXXXXX____________________________XXXX
Data delay found: 21
08:15:27:setup_element:INFO: Eye window for uplink 27: __XXXXXXXXX_____________________________
Data delay found: 26
08:15:27:setup_element:INFO: Eye window for uplink 28: ___XXXXXXXXXX___________________________
Data delay found: 27
08:15:27:setup_element:INFO: Eye window for uplink 29: ______XXXXXXXXX_________________________
Data delay found: 30
08:15:27:setup_element:INFO: Eye window for uplink 30: ______XXXXXXXXXXXX______________________
Data delay found: 31
08:15:27:setup_element:INFO: Eye window for uplink 31: _________XXXXXXXXX______________________
Data delay found: 33
08:15:27:setup_element:INFO: Setting the data phase to 18 for uplink 24
08:15:27:setup_element:INFO: Setting the data phase to 19 for uplink 25
08:15:27:setup_element:INFO: Setting the data phase to 21 for uplink 26
08:15:27:setup_element:INFO: Setting the data phase to 26 for uplink 27
08:15:27:setup_element:INFO: Setting the data phase to 27 for uplink 28
08:15:27:setup_element:INFO: Setting the data phase to 30 for uplink 29
08:15:27:setup_element:INFO: Setting the data phase to 31 for uplink 30
08:15:27:setup_element:INFO: Setting the data phase to 33 for uplink 31
08:15:27:setup_element:INFO: Beginning SMX ASICs map scan
08:15:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:15:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:15:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:15:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:15:27:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:15:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:15:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:15:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:15:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:15:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:15:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:15:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:15:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:15:30:setup_element:INFO: Performing Elink synchronization
08:15:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:15:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:15:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:15:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:15:30:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:15:30:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:15:30:febtest:INFO: Init all SMX (CSA): 30
08:15:39:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:15:40:febtest:INFO: 30-01 | XA-000-09-004-020-017-008-01 | 47.3 | 1100.2
08:15:40:febtest:INFO: 28-03 | XA-000-09-004-020-017-009-01 | 37.7 | 1153.7
08:15:40:febtest:INFO: 26-05 | XA-000-09-004-020-011-014-02 | 28.2 | 1183.3
08:15:40:febtest:INFO: 24-07 | XA-000-09-004-020-008-014-12 | 31.4 | 1171.5
08:15:41:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:15:43:ST3_smx:INFO: chip: 30-1 47.250730 C 1112.140140 mV
08:15:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:15:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:15:43:ST3_smx:INFO: Electrons
08:15:43:ST3_smx:INFO: # loops 0
08:15:45:ST3_smx:INFO: # loops 1
08:15:47:ST3_smx:INFO: # loops 2
08:15:49:ST3_smx:INFO: Total # of broken channels: 0
08:15:49:ST3_smx:INFO: List of broken channels: []
08:15:49:ST3_smx:INFO: Total # of broken channels: 0
08:15:49:ST3_smx:INFO: List of broken channels: []
08:15:51:ST3_smx:INFO: chip: 28-3 37.726682 C 1165.571835 mV
08:15:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:15:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:15:51:ST3_smx:INFO: Electrons
08:15:51:ST3_smx:INFO: # loops 0
08:15:53:ST3_smx:INFO: # loops 1
08:15:55:ST3_smx:INFO: # loops 2
08:15:56:ST3_smx:INFO: Total # of broken channels: 0
08:15:56:ST3_smx:INFO: List of broken channels: []
08:15:56:ST3_smx:INFO: Total # of broken channels: 0
08:15:56:ST3_smx:INFO: List of broken channels: []
08:15:58:ST3_smx:INFO: chip: 26-5 31.389742 C 1189.190035 mV
08:15:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:15:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:15:58:ST3_smx:INFO: Electrons
08:15:58:ST3_smx:INFO: # loops 0
08:16:00:ST3_smx:INFO: # loops 1
08:16:02:ST3_smx:INFO: # loops 2
08:16:05:ST3_smx:INFO: Total # of broken channels: 0
08:16:05:ST3_smx:INFO: List of broken channels: []
08:16:05:ST3_smx:INFO: Total # of broken channels: 0
08:16:05:ST3_smx:INFO: List of broken channels: []
08:16:06:ST3_smx:INFO: chip: 24-7 34.556970 C 1177.390875 mV
08:16:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:16:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:16:06:ST3_smx:INFO: Electrons
08:16:06:ST3_smx:INFO: # loops 0
08:16:09:ST3_smx:INFO: # loops 1
08:16:11:ST3_smx:INFO: # loops 2
08:16:13:ST3_smx:INFO: Total # of broken channels: 0
08:16:13:ST3_smx:INFO: List of broken channels: []
08:16:13:ST3_smx:INFO: Total # of broken channels: 0
08:16:13:ST3_smx:INFO: List of broken channels: []
08:16:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:16:13:febtest:INFO: 30-01 | XA-000-09-004-020-017-008-01 | 50.4 | 1130.0
08:16:14:febtest:INFO: 28-03 | XA-000-09-004-020-017-009-01 | 34.6 | 1189.2
08:16:14:febtest:INFO: 26-05 | XA-000-09-004-020-011-014-02 | 31.4 | 1212.7
08:16:14:febtest:INFO: 24-07 | XA-000-09-004-020-008-014-12 | 34.6 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_04_15-08_15_19
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4142| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.453', '0.7430', '1.850', '1.0860']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0260', '1.850', '1.3080']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9956', '1.850', '0.2674']