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FEB_4144 22.04.25 10:42:35
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10:42:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:42:35:ST3_Shared:INFO: FEB-Microcable
10:42:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:42:35:febtest:INFO: Testing FEB with SN 4144
10:42:37:smx_tester:INFO: Scanning setup
10:42:37:elinks:INFO: Disabling clock on downlink 0
10:42:37:elinks:INFO: Disabling clock on downlink 1
10:42:37:elinks:INFO: Disabling clock on downlink 2
10:42:37:elinks:INFO: Disabling clock on downlink 3
10:42:37:elinks:INFO: Disabling clock on downlink 4
10:42:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:42:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:37:elinks:INFO: Disabling clock on downlink 0
10:42:37:elinks:INFO: Disabling clock on downlink 1
10:42:37:elinks:INFO: Disabling clock on downlink 2
10:42:37:elinks:INFO: Disabling clock on downlink 3
10:42:37:elinks:INFO: Disabling clock on downlink 4
10:42:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:42:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:37:elinks:INFO: Disabling clock on downlink 0
10:42:37:elinks:INFO: Disabling clock on downlink 1
10:42:37:elinks:INFO: Disabling clock on downlink 2
10:42:37:elinks:INFO: Disabling clock on downlink 3
10:42:37:elinks:INFO: Disabling clock on downlink 4
10:42:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:42:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:42:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:37:elinks:INFO: Disabling clock on downlink 0
10:42:37:elinks:INFO: Disabling clock on downlink 1
10:42:37:elinks:INFO: Disabling clock on downlink 2
10:42:37:elinks:INFO: Disabling clock on downlink 3
10:42:37:elinks:INFO: Disabling clock on downlink 4
10:42:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:42:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:37:elinks:INFO: Disabling clock on downlink 0
10:42:37:elinks:INFO: Disabling clock on downlink 1
10:42:37:elinks:INFO: Disabling clock on downlink 2
10:42:37:elinks:INFO: Disabling clock on downlink 3
10:42:37:elinks:INFO: Disabling clock on downlink 4
10:42:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:42:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:42:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:42:37:setup_element:INFO: Scanning clock phase
10:42:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:42:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:42:38:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:42:38:setup_element:INFO: Eye window for uplink 16: XXXXXX____________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 35
10:42:38:setup_element:INFO: Eye window for uplink 17: XXXXXX____________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 35
10:42:38:setup_element:INFO: Eye window for uplink 18: XXX______________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 33
10:42:38:setup_element:INFO: Eye window for uplink 19: XXX______________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 33
10:42:38:setup_element:INFO: Eye window for uplink 20: XXXXX___________________________________________________________________________
Clock Delay: 42
10:42:38:setup_element:INFO: Eye window for uplink 21: XXXXX___________________________________________________________________________
Clock Delay: 42
10:42:38:setup_element:INFO: Eye window for uplink 22: XXXXXXX______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
10:42:38:setup_element:INFO: Eye window for uplink 23: XXXXXXX______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
10:42:38:setup_element:INFO: Eye window for uplink 24: XXXXXXXXX_______________________________________________________XXXXXXXXXXXXXX__
Clock Delay: 36
10:42:38:setup_element:INFO: Eye window for uplink 25: XXXXXXXXX_______________________________________________________XXXXXXXXXXXXXX__
Clock Delay: 36
10:42:38:setup_element:INFO: Eye window for uplink 26: XXXXXXXXXXXX______________________________________________________XXXXXXXXXXXXXX
Clock Delay: 38
10:42:38:setup_element:INFO: Eye window for uplink 27: XXXXXXXXXXXX______________________________________________________XXXXXXXXXXXXXX
Clock Delay: 38
10:42:38:setup_element:INFO: Eye window for uplink 28: XXXXXXXXXXXXXXXXX___________________________________________________XXXXXXXXXXXX
Clock Delay: 42
10:42:38:setup_element:INFO: Eye window for uplink 29: XXXXXXXXXXXXXXXXX___________________________________________________XXXXXXXXXXXX
Clock Delay: 42
10:42:38:setup_element:INFO: Eye window for uplink 30: XXXXXXXXXXXXXX__X__________________________________________________XXXXXXXXXXXXX
Clock Delay: 41
10:42:38:setup_element:INFO: Eye window for uplink 31: XXXXXXXXXXXXXX__X__________________________________________________XXXXXXXXXXXXX
Clock Delay: 41
10:42:38:setup_element:INFO: Setting the clock phase to 40 for group 0, downlink 2
10:42:38:setup_element:INFO: Scanning data phases
10:42:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:42:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:42:43:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:42:43:setup_element:INFO: Eye window for uplink 16: ____________________XXXXXXXXX_____XXXXXX
Data delay found: 9
10:42:43:setup_element:INFO: Eye window for uplink 17: ___________________XXXXXXXX_______XXXXXX
Data delay found: 9
10:42:43:setup_element:INFO: Eye window for uplink 18: ____________________XXXXXXXX____________
Data delay found: 3
10:42:43:setup_element:INFO: Eye window for uplink 19: ___________________XXXXXXXX_____________
Data delay found: 2
10:42:43:setup_element:INFO: Eye window for uplink 20: _______________________XXXXXXXX_________
Data delay found: 6
10:42:43:setup_element:INFO: Eye window for uplink 21: _______________________XXXXXXX__________
Data delay found: 6
10:42:43:setup_element:INFO: Eye window for uplink 22: __________________________XXXXXXXX______
Data delay found: 9
10:42:43:setup_element:INFO: Eye window for uplink 23: ______________________XXXXXXXXX_________
Data delay found: 6
10:42:43:setup_element:INFO: Eye window for uplink 24: XXX________________________XXXXXXXXXXXXX
Data delay found: 14
10:42:43:setup_element:INFO: Eye window for uplink 25: XXXX___________________________XXXXXXXXX
Data delay found: 17
10:42:43:setup_element:INFO: Eye window for uplink 26: X_____________________________XXXXXXXXXX
Data delay found: 15
10:42:43:setup_element:INFO: Eye window for uplink 27: XXXXX_____________________________X_XXXX
Data delay found: 19
10:42:43:setup_element:INFO: Eye window for uplink 28: XXXXXXXX_______________________________X
Data delay found: 23
10:42:43:setup_element:INFO: Eye window for uplink 29: __XXXXXXXXX_____________________________
Data delay found: 26
10:42:43:setup_element:INFO: Eye window for uplink 30: _XXXXXXXXXXX____________________________
Data delay found: 26
10:42:43:setup_element:INFO: Eye window for uplink 31: __XXXXXXXXXX____________________________
Data delay found: 26
10:42:43:setup_element:INFO: Setting the data phase to 9 for uplink 16
10:42:43:setup_element:INFO: Setting the data phase to 9 for uplink 17
10:42:43:setup_element:INFO: Setting the data phase to 3 for uplink 18
10:42:43:setup_element:INFO: Setting the data phase to 2 for uplink 19
10:42:43:setup_element:INFO: Setting the data phase to 6 for uplink 20
10:42:43:setup_element:INFO: Setting the data phase to 6 for uplink 21
10:42:43:setup_element:INFO: Setting the data phase to 9 for uplink 22
10:42:43:setup_element:INFO: Setting the data phase to 6 for uplink 23
10:42:43:setup_element:INFO: Setting the data phase to 14 for uplink 24
10:42:43:setup_element:INFO: Setting the data phase to 17 for uplink 25
10:42:43:setup_element:INFO: Setting the data phase to 15 for uplink 26
10:42:43:setup_element:INFO: Setting the data phase to 19 for uplink 27
10:42:43:setup_element:INFO: Setting the data phase to 23 for uplink 28
10:42:43:setup_element:INFO: Setting the data phase to 26 for uplink 29
10:42:43:setup_element:INFO: Setting the data phase to 26 for uplink 30
10:42:43:setup_element:INFO: Setting the data phase to 26 for uplink 31
10:42:43:setup_element:INFO: Beginning SMX ASICs map scan
10:42:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:42:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:42:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:42:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:42:43:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:42:43:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:42:43:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:42:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:42:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:42:43:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:42:43:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:42:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:42:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:42:44:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:42:44:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:42:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:42:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:42:44:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:42:44:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:42:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:42:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:42:45:setup_element:INFO: Performing Elink synchronization
10:42:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:42:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:42:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:42:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:42:45:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:42:45:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:42:46:febtest:INFO: Init all SMX (CSA): 30
10:43:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:43:01:febtest:INFO: 23-00 | XA-000-09-004-020-002-011-03 | 40.9 | 1147.8
10:43:01:febtest:INFO: 30-01 | XA-000-09-004-020-009-007-01 | 37.7 | 1165.6
10:43:01:febtest:INFO: 21-02 | XA-000-09-004-020-005-011-11 | 44.1 | 1141.9
10:43:01:febtest:INFO: 28-03 | XA-000-09-004-020-002-012-03 | 40.9 | 1147.8
10:43:02:febtest:INFO: 19-04 | XA-000-09-004-020-011-012-02 | 47.3 | 1147.8
10:43:02:febtest:INFO: 26-05 | XA-000-09-004-020-008-012-12 | 40.9 | 1159.7
10:43:02:febtest:INFO: 17-06 | XA-000-09-004-020-014-012-09 | 34.6 | 1171.5
10:43:02:febtest:INFO: 24-07 | XA-000-09-004-020-011-003-02 | 47.3 | 1141.9
10:43:03:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:43:05:ST3_smx:INFO: chip: 23-0 40.898880 C 1159.654860 mV
10:43:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:05:ST3_smx:INFO: Electrons
10:43:05:ST3_smx:INFO: # loops 0
10:43:07:ST3_smx:INFO: # loops 1
10:43:08:ST3_smx:INFO: # loops 2
10:43:10:ST3_smx:INFO: Total # of broken channels: 0
10:43:10:ST3_smx:INFO: List of broken channels: []
10:43:10:ST3_smx:INFO: Total # of broken channels: 0
10:43:10:ST3_smx:INFO: List of broken channels: []
10:43:11:ST3_smx:INFO: chip: 30-1 37.726682 C 1177.390875 mV
10:43:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:11:ST3_smx:INFO: Electrons
10:43:11:ST3_smx:INFO: # loops 0
10:43:13:ST3_smx:INFO: # loops 1
10:43:14:ST3_smx:INFO: # loops 2
10:43:16:ST3_smx:INFO: Total # of broken channels: 0
10:43:16:ST3_smx:INFO: List of broken channels: []
10:43:16:ST3_smx:INFO: Total # of broken channels: 0
10:43:16:ST3_smx:INFO: List of broken channels: []
10:43:17:ST3_smx:INFO: chip: 21-2 47.250730 C 1153.732915 mV
10:43:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:17:ST3_smx:INFO: Electrons
10:43:17:ST3_smx:INFO: # loops 0
10:43:19:ST3_smx:INFO: # loops 1
10:43:20:ST3_smx:INFO: # loops 2
10:43:22:ST3_smx:INFO: Total # of broken channels: 0
10:43:22:ST3_smx:INFO: List of broken channels: []
10:43:22:ST3_smx:INFO: Total # of broken channels: 0
10:43:22:ST3_smx:INFO: List of broken channels: []
10:43:23:ST3_smx:INFO: chip: 28-3 44.073563 C 1159.654860 mV
10:43:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:23:ST3_smx:INFO: Electrons
10:43:23:ST3_smx:INFO: # loops 0
10:43:25:ST3_smx:INFO: # loops 1
10:43:26:ST3_smx:INFO: # loops 2
10:43:28:ST3_smx:INFO: Total # of broken channels: 0
10:43:28:ST3_smx:INFO: List of broken channels: []
10:43:28:ST3_smx:INFO: Total # of broken channels: 10
10:43:28:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19]
10:43:30:ST3_smx:INFO: chip: 19-4 47.250730 C 1159.654860 mV
10:43:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:30:ST3_smx:INFO: Electrons
10:43:30:ST3_smx:INFO: # loops 0
10:43:31:ST3_smx:INFO: # loops 1
10:43:33:ST3_smx:INFO: # loops 2
10:43:35:ST3_smx:INFO: Total # of broken channels: 0
10:43:35:ST3_smx:INFO: List of broken channels: []
10:43:35:ST3_smx:INFO: Total # of broken channels: 0
10:43:35:ST3_smx:INFO: List of broken channels: []
10:43:37:ST3_smx:INFO: chip: 26-5 40.898880 C 1171.483840 mV
10:43:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:37:ST3_smx:INFO: Electrons
10:43:37:ST3_smx:INFO: # loops 0
10:43:38:ST3_smx:INFO: # loops 1
10:43:39:ST3_smx:INFO: # loops 2
10:43:41:ST3_smx:INFO: Total # of broken channels: 0
10:43:41:ST3_smx:INFO: List of broken channels: []
10:43:41:ST3_smx:INFO: Total # of broken channels: 0
10:43:41:ST3_smx:INFO: List of broken channels: []
10:43:43:ST3_smx:INFO: chip: 17-6 37.726682 C 1183.292940 mV
10:43:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:43:ST3_smx:INFO: Electrons
10:43:43:ST3_smx:INFO: # loops 0
10:43:44:ST3_smx:INFO: # loops 1
10:43:46:ST3_smx:INFO: # loops 2
10:43:47:ST3_smx:INFO: Total # of broken channels: 0
10:43:47:ST3_smx:INFO: List of broken channels: []
10:43:47:ST3_smx:INFO: Total # of broken channels: 0
10:43:47:ST3_smx:INFO: List of broken channels: []
10:43:49:ST3_smx:INFO: chip: 24-7 50.430383 C 1153.732915 mV
10:43:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:43:49:ST3_smx:INFO: Electrons
10:43:49:ST3_smx:INFO: # loops 0
10:43:50:ST3_smx:INFO: # loops 1
10:43:52:ST3_smx:INFO: # loops 2
10:43:54:ST3_smx:INFO: Total # of broken channels: 0
10:43:54:ST3_smx:INFO: List of broken channels: []
10:43:54:ST3_smx:INFO: Total # of broken channels: 0
10:43:54:ST3_smx:INFO: List of broken channels: []
10:43:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:43:54:febtest:INFO: 23-00 | XA-000-09-004-020-002-011-03 | 44.1 | 1177.4
10:43:54:febtest:INFO: 30-01 | XA-000-09-004-020-009-007-01 | 37.7 | 1201.0
10:43:54:febtest:INFO: 21-02 | XA-000-09-004-020-005-011-11 | 47.3 | 1177.4
10:43:55:febtest:INFO: 28-03 | XA-000-09-004-020-002-012-03 | 44.1 | 1177.4
10:43:55:febtest:INFO: 19-04 | XA-000-09-004-020-011-012-02 | 50.4 | 1177.4
10:43:55:febtest:INFO: 26-05 | XA-000-09-004-020-008-012-12 | 44.1 | 1195.1
10:43:55:febtest:INFO: 17-06 | XA-000-09-004-020-014-012-09 | 37.7 | 1201.0
10:43:55:febtest:INFO: 24-07 | XA-000-09-004-020-011-003-02 | 50.4 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_04_22-10_42_35
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4144| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4800', '1.850', '2.0450']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0150', '1.850', '2.6080']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9890', '1.850', '0.5342']