
FEB_4147 13.05.25 07:48:35
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07:48:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:48:35:ST3_Shared:INFO: FEB-Microcable 07:48:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:48:35:febtest:INFO: Testing FEB with SN 4147 07:48:37:smx_tester:INFO: Scanning setup 07:48:37:elinks:INFO: Disabling clock on downlink 0 07:48:37:elinks:INFO: Disabling clock on downlink 1 07:48:37:elinks:INFO: Disabling clock on downlink 2 07:48:37:elinks:INFO: Disabling clock on downlink 3 07:48:37:elinks:INFO: Disabling clock on downlink 4 07:48:37:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:48:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 07:48:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:48:37:elinks:INFO: Disabling clock on downlink 0 07:48:37:elinks:INFO: Disabling clock on downlink 1 07:48:37:elinks:INFO: Disabling clock on downlink 2 07:48:37:elinks:INFO: Disabling clock on downlink 3 07:48:37:elinks:INFO: Disabling clock on downlink 4 07:48:37:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:48:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:48:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:48:37:elinks:INFO: Disabling clock on downlink 0 07:48:37:elinks:INFO: Disabling clock on downlink 1 07:48:37:elinks:INFO: Disabling clock on downlink 2 07:48:37:elinks:INFO: Disabling clock on downlink 3 07:48:37:elinks:INFO: Disabling clock on downlink 4 07:48:37:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:48:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:48:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 07:48:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 07:48:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 07:48:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 07:48:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 07:48:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 07:48:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 07:48:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 07:48:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:48:37:elinks:INFO: Disabling clock on downlink 0 07:48:37:elinks:INFO: Disabling clock on downlink 1 07:48:37:elinks:INFO: Disabling clock on downlink 2 07:48:37:elinks:INFO: Disabling clock on downlink 3 07:48:37:elinks:INFO: Disabling clock on downlink 4 07:48:37:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:48:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 07:48:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:48:37:elinks:INFO: Disabling clock on downlink 0 07:48:37:elinks:INFO: Disabling clock on downlink 1 07:48:37:elinks:INFO: Disabling clock on downlink 2 07:48:37:elinks:INFO: Disabling clock on downlink 3 07:48:37:elinks:INFO: Disabling clock on downlink 4 07:48:37:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:48:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 07:48:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:48:38:setup_element:INFO: Scanning clock phase 07:48:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:48:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:48:38:setup_element:INFO: Clock phase scan results for group 0, downlink 2 07:48:38:setup_element:INFO: Eye window for uplink 24: XXXX_______________________________________________________________XXXXXXXXXXXXX Clock Delay: 35 07:48:38:setup_element:INFO: Eye window for uplink 25: XXXX_______________________________________________________________XXXXXXXXXXXXX Clock Delay: 35 07:48:38:setup_element:INFO: Eye window for uplink 26: XXXX____________________________________________________________________________ Clock Delay: 41 07:48:38:setup_element:INFO: Eye window for uplink 27: XXXX____________________________________________________________________________ Clock Delay: 41 07:48:38:setup_element:INFO: Eye window for uplink 28: XX______________________________________________________________________________ Clock Delay: 40 07:48:38:setup_element:INFO: Eye window for uplink 29: XX______________________________________________________________________________ Clock Delay: 40 07:48:38:setup_element:INFO: Eye window for uplink 30: XXXX____________________________________________________________XXXXXXXXXXXXXXXX Clock Delay: 33 07:48:38:setup_element:INFO: Eye window for uplink 31: XXXX____________________________________________________________XXXXXXXXXXXXXXXX Clock Delay: 33 07:48:38:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 07:48:38:setup_element:INFO: Scanning data phases 07:48:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:48:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:48:43:setup_element:INFO: Data phase scan results for group 0, downlink 2 07:48:43:setup_element:INFO: Eye window for uplink 24: XXXXXXXXXX______________________________ Data delay found: 24 07:48:43:setup_element:INFO: Eye window for uplink 25: ___XXXXXXXXXX___________________________ Data delay found: 27 07:48:43:setup_element:INFO: Eye window for uplink 26: ___XXXXXXXX_____________________________ Data delay found: 26 07:48:43:setup_element:INFO: Eye window for uplink 27: _______XXXXXXXXX________________________ Data delay found: 31 07:48:43:setup_element:INFO: Eye window for uplink 28: ______XXXXXXXXX_________________________ Data delay found: 30 07:48:43:setup_element:INFO: Eye window for uplink 29: ________XXXXXXXXX_______________________ Data delay found: 32 07:48:43:setup_element:INFO: Eye window for uplink 30: ________XXXXXXXXXXX______________XXXXXXX Data delay found: 25 07:48:43:setup_element:INFO: Eye window for uplink 31: ________XXXXXXXXXX_______________XXXXXXX Data delay found: 25 07:48:43:setup_element:INFO: Setting the data phase to 24 for uplink 24 07:48:43:setup_element:INFO: Setting the data phase to 27 for uplink 25 07:48:43:setup_element:INFO: Setting the data phase to 26 for uplink 26 07:48:43:setup_element:INFO: Setting the data phase to 31 for uplink 27 07:48:43:setup_element:INFO: Setting the data phase to 30 for uplink 28 07:48:43:setup_element:INFO: Setting the data phase to 32 for uplink 29 07:48:43:setup_element:INFO: Setting the data phase to 25 for uplink 30 07:48:43:setup_element:INFO: Setting the data phase to 25 for uplink 31 07:48:43:setup_element:INFO: Beginning SMX ASICs map scan 07:48:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:48:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:48:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:48:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 07:48:43:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 07:48:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 07:48:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 07:48:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 07:48:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 07:48:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 07:48:44:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 07:48:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 07:48:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 07:48:46:setup_element:INFO: Performing Elink synchronization 07:48:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:48:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:48:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:48:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 07:48:46:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 07:48:46:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 07:48:46:febtest:INFO: Init all SMX (CSA): 30 07:48:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:48:56:febtest:INFO: 30-01 | XA-000-09-004-008-007-005-03 | 31.4 | 1177.4 07:48:56:febtest:INFO: 28-03 | XA-000-09-004-008-016-006-07 | 34.6 | 1177.4 07:48:56:febtest:INFO: 26-05 | XA-000-09-004-008-004-007-13 | 25.1 | 1253.7 07:48:56:febtest:INFO: 24-07 | XA-000-09-004-008-007-004-03 | 44.1 | 1141.9 07:48:57:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 07:48:59:ST3_smx:INFO: chip: 30-1 31.389742 C 1189.190035 mV 07:48:59:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:48:59:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:48:59:ST3_smx:INFO: Electrons 07:48:59:ST3_smx:INFO: # loops 0 07:49:01:ST3_smx:INFO: # loops 1 07:49:03:ST3_smx:INFO: # loops 2 07:49:05:ST3_smx:INFO: Total # of broken channels: 0 07:49:05:ST3_smx:INFO: List of broken channels: [] 07:49:05:ST3_smx:INFO: Total # of broken channels: 0 07:49:05:ST3_smx:INFO: List of broken channels: [] 07:49:07:ST3_smx:INFO: chip: 28-3 34.556970 C 1183.292940 mV 07:49:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:49:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:49:07:ST3_smx:INFO: Electrons 07:49:07:ST3_smx:INFO: # loops 0 07:49:09:ST3_smx:INFO: # loops 1 07:49:11:ST3_smx:INFO: # loops 2 07:49:13:ST3_smx:INFO: Total # of broken channels: 0 07:49:13:ST3_smx:INFO: List of broken channels: [] 07:49:13:ST3_smx:INFO: Total # of broken channels: 0 07:49:13:ST3_smx:INFO: List of broken channels: [] 07:49:14:ST3_smx:INFO: chip: 26-5 25.062742 C 1282.867635 mV 07:49:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:49:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:49:14:ST3_smx:INFO: Electrons 07:49:14:ST3_smx:INFO: # loops 0 07:49:16:ST3_smx:INFO: # loops 1 07:49:18:ST3_smx:INFO: # loops 2 07:49:20:ST3_smx:INFO: Total # of broken channels: 0 07:49:20:ST3_smx:INFO: List of broken channels: [] 07:49:20:ST3_smx:INFO: Total # of broken channels: 0 07:49:20:ST3_smx:INFO: List of broken channels: [] 07:49:22:ST3_smx:INFO: chip: 24-7 44.073563 C 1153.732915 mV 07:49:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:49:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:49:22:ST3_smx:INFO: Electrons 07:49:22:ST3_smx:INFO: # loops 0 07:49:24:ST3_smx:INFO: # loops 1 07:49:26:ST3_smx:INFO: # loops 2 07:49:28:ST3_smx:INFO: Total # of broken channels: 0 07:49:28:ST3_smx:INFO: List of broken channels: [] 07:49:28:ST3_smx:INFO: Total # of broken channels: 0 07:49:28:ST3_smx:INFO: List of broken channels: [] 07:49:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:49:29:febtest:INFO: 30-01 | XA-000-09-004-008-007-005-03 | 31.4 | 1212.7 07:49:29:febtest:INFO: 28-03 | XA-000-09-004-008-016-006-07 | 34.6 | 1201.0 07:49:29:febtest:INFO: 26-05 | XA-000-09-004-008-004-007-13 | 21.9 | 1578.5 07:49:29:febtest:INFO: 24-07 | XA-000-09-004-008-007-004-03 | 47.3 | 1177.4 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_05_13-07_48_35 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4147| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8303', '1.850', '1.1390'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0240', '1.850', '1.2780'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9878', '1.850', '0.2621']