
FEB_4148 30.04.25 12:48:56
TextEdit.txt
12:48:56:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:48:57:ST3_Shared:INFO: FEB-Microcable 12:48:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:48:57:febtest:INFO: Testing FEB with SN 4148 12:48:58:smx_tester:INFO: Scanning setup 12:48:58:elinks:INFO: Disabling clock on downlink 0 12:48:58:elinks:INFO: Disabling clock on downlink 1 12:48:58:elinks:INFO: Disabling clock on downlink 2 12:48:58:elinks:INFO: Disabling clock on downlink 3 12:48:58:elinks:INFO: Disabling clock on downlink 4 12:48:58:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:48:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:48:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:48:58:elinks:INFO: Disabling clock on downlink 0 12:48:58:elinks:INFO: Disabling clock on downlink 1 12:48:58:elinks:INFO: Disabling clock on downlink 2 12:48:58:elinks:INFO: Disabling clock on downlink 3 12:48:58:elinks:INFO: Disabling clock on downlink 4 12:48:58:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:48:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:48:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:48:58:elinks:INFO: Disabling clock on downlink 0 12:48:58:elinks:INFO: Disabling clock on downlink 1 12:48:58:elinks:INFO: Disabling clock on downlink 2 12:48:58:elinks:INFO: Disabling clock on downlink 3 12:48:58:elinks:INFO: Disabling clock on downlink 4 12:48:58:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:48:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:48:58:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 12:48:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 12:48:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:48:59:elinks:INFO: Disabling clock on downlink 0 12:48:59:elinks:INFO: Disabling clock on downlink 1 12:48:59:elinks:INFO: Disabling clock on downlink 2 12:48:59:elinks:INFO: Disabling clock on downlink 3 12:48:59:elinks:INFO: Disabling clock on downlink 4 12:48:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:48:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 12:48:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:48:59:elinks:INFO: Disabling clock on downlink 0 12:48:59:elinks:INFO: Disabling clock on downlink 1 12:48:59:elinks:INFO: Disabling clock on downlink 2 12:48:59:elinks:INFO: Disabling clock on downlink 3 12:48:59:elinks:INFO: Disabling clock on downlink 4 12:48:59:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:48:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 12:48:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:48:59:setup_element:INFO: Scanning clock phase 12:48:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:48:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:48:59:setup_element:INFO: Clock phase scan results for group 0, downlink 2 12:48:59:setup_element:INFO: Eye window for uplink 16: XXXX____________________________________________________________XXXXXXXXXXXXXXXX Clock Delay: 33 12:48:59:setup_element:INFO: Eye window for uplink 17: XXXX____________________________________________________________XXXXXXXXXXXXXXXX Clock Delay: 33 12:48:59:setup_element:INFO: Eye window for uplink 18: XXX_______________________________________________________________XXXXXXXXXXXXXX Clock Delay: 34 12:48:59:setup_element:INFO: Eye window for uplink 19: XXX_______________________________________________________________XXXXXXXXXXXXXX Clock Delay: 34 12:48:59:setup_element:INFO: Eye window for uplink 20: XXXX________________________________________________________________XXXXXXXXXXXX Clock Delay: 35 12:48:59:setup_element:INFO: Eye window for uplink 21: XXXX________________________________________________________________XXXXXXXXXXXX Clock Delay: 35 12:48:59:setup_element:INFO: Eye window for uplink 22: XXX_____________________________________________________________________________ Clock Delay: 41 12:48:59:setup_element:INFO: Eye window for uplink 23: XXX_____________________________________________________________________________ Clock Delay: 41 12:48:59:setup_element:INFO: Eye window for uplink 24: XXXXXXXXXXXXX______________________________________________________XXXXXXXXXXXXX Clock Delay: 39 12:48:59:setup_element:INFO: Eye window for uplink 25: XXXXXXXXXXXXX______________________________________________________XXXXXXXXXXXXX Clock Delay: 39 12:48:59:setup_element:INFO: Eye window for uplink 26: XXXXXXXXXXXXXXX_________________________________________________________________ Clock Delay: 47 12:48:59:setup_element:INFO: Eye window for uplink 27: XXXXXXXXXXXXXXX_________________________________________________________________ Clock Delay: 47 12:48:59:setup_element:INFO: Eye window for uplink 28: XXXXXXXXXXXXXX_____________________________________________________XXXXXXXXXXXXX Clock Delay: 40 12:48:59:setup_element:INFO: Eye window for uplink 29: XXXXXXXXXXXXXX_____________________________________________________XXXXXXXXXXXXX Clock Delay: 40 12:48:59:setup_element:INFO: Eye window for uplink 30: XXXXXXXXXXXXXXX_______________________________________________________XXXXXXXXXX Clock Delay: 42 12:48:59:setup_element:INFO: Eye window for uplink 31: XXXXXXXXXXXXXXX_______________________________________________________XXXXXXXXXX Clock Delay: 42 12:48:59:setup_element:INFO: Setting the clock phase to 39 for group 0, downlink 2 12:48:59:setup_element:INFO: Scanning data phases 12:48:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:48:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:49:04:setup_element:INFO: Data phase scan results for group 0, downlink 2 12:49:04:setup_element:INFO: Eye window for uplink 16: ________________________XXXXXXXXXX______ Data delay found: 8 12:49:04:setup_element:INFO: Eye window for uplink 17: _______________________XXXXXXX__________ Data delay found: 6 12:49:04:setup_element:INFO: Eye window for uplink 18: ______________________XXXXXXX___________ Data delay found: 5 12:49:04:setup_element:INFO: Eye window for uplink 19: _____________________XXXXXXX____________ Data delay found: 4 12:49:04:setup_element:INFO: Eye window for uplink 20: ________________________XXXXXXX_________ Data delay found: 7 12:49:04:setup_element:INFO: Eye window for uplink 21: ________________________XXXXXXX_________ Data delay found: 7 12:49:04:setup_element:INFO: Eye window for uplink 22: ___________________________XXXXXX_______ Data delay found: 9 12:49:04:setup_element:INFO: Eye window for uplink 23: ______________________XXXXXXXX__________ Data delay found: 5 12:49:04:setup_element:INFO: Eye window for uplink 24: XXXX___________________XXXXXXXXXXXXXXXXX Data delay found: 13 12:49:04:setup_element:INFO: Eye window for uplink 25: XXXX___________________XXXXXXXXXXXXXXXXX Data delay found: 13 12:49:04:setup_element:INFO: Eye window for uplink 26: XXXXX____________________________X_XXXXX Data delay found: 18 12:49:04:setup_element:INFO: Eye window for uplink 27: XXXXXXXXX______________________________X Data delay found: 23 12:49:04:setup_element:INFO: Eye window for uplink 28: _XXXXXXXXXXXX___________________________ Data delay found: 26 12:49:04:setup_element:INFO: Eye window for uplink 29: ___XXXXXXXXXX___________________________ Data delay found: 27 12:49:04:setup_element:INFO: Eye window for uplink 30: ___X_XXXXXXXXXXX________________________ Data delay found: 29 12:49:04:setup_element:INFO: Eye window for uplink 31: ___X_XXXXXXXXXXX________________________ Data delay found: 29 12:49:04:setup_element:INFO: Setting the data phase to 8 for uplink 16 12:49:04:setup_element:INFO: Setting the data phase to 6 for uplink 17 12:49:04:setup_element:INFO: Setting the data phase to 5 for uplink 18 12:49:04:setup_element:INFO: Setting the data phase to 4 for uplink 19 12:49:04:setup_element:INFO: Setting the data phase to 7 for uplink 20 12:49:04:setup_element:INFO: Setting the data phase to 7 for uplink 21 12:49:04:setup_element:INFO: Setting the data phase to 9 for uplink 22 12:49:04:setup_element:INFO: Setting the data phase to 5 for uplink 23 12:49:04:setup_element:INFO: Setting the data phase to 13 for uplink 24 12:49:04:setup_element:INFO: Setting the data phase to 13 for uplink 25 12:49:04:setup_element:INFO: Setting the data phase to 18 for uplink 26 12:49:04:setup_element:INFO: Setting the data phase to 23 for uplink 27 12:49:04:setup_element:INFO: Setting the data phase to 26 for uplink 28 12:49:04:setup_element:INFO: Setting the data phase to 27 for uplink 29 12:49:04:setup_element:INFO: Setting the data phase to 29 for uplink 30 12:49:04:setup_element:INFO: Setting the data phase to 29 for uplink 31 12:49:04:setup_element:INFO: Beginning SMX ASICs map scan 12:49:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:49:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:49:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:49:04:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 12:49:04:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 12:49:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 12:49:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 12:49:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 12:49:05:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 12:49:05:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 12:49:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 12:49:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 12:49:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 12:49:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 12:49:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 12:49:05:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 12:49:06:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 12:49:06:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 12:49:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 12:49:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 12:49:07:setup_element:INFO: Performing Elink synchronization 12:49:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:49:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:49:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:49:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:49:07:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 12:49:07:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 12:49:08:febtest:INFO: Init all SMX (CSA): 30 12:49:23:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:49:23:febtest:INFO: 23-00 | XA-000-09-004-020-015-022-03 | 31.4 | 1195.1 12:49:23:febtest:INFO: 30-01 | XA-000-09-004-020-003-008-14 | 37.7 | 1153.7 12:49:24:febtest:INFO: 21-02 | XA-000-09-004-020-012-020-13 | 40.9 | 1159.7 12:49:24:febtest:INFO: 28-03 | XA-000-09-004-020-006-008-05 | -432.3 | 1578.5 12:49:24:febtest:INFO: 19-04 | XA-000-09-004-020-012-021-13 | 34.6 | 1183.3 12:49:24:febtest:INFO: 26-05 | XA-000-09-004-020-015-020-03 | 31.4 | 1195.1 12:49:25:febtest:INFO: 17-06 | XA-000-09-004-020-012-022-13 | 50.4 | 1135.9 12:49:25:febtest:INFO: 24-07 | XA-000-09-004-020-015-021-03 | 37.7 | 1177.4 12:49:26:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 12:49:28:ST3_smx:INFO: chip: 23-0 31.389742 C 1212.728715 mV 12:49:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:49:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:49:28:ST3_smx:INFO: Electrons 12:49:28:ST3_smx:INFO: # loops 0 12:49:29:ST3_smx:INFO: # loops 1 12:49:31:ST3_smx:INFO: # loops 2 12:49:33:ST3_smx:INFO: Total # of broken channels: 0 12:49:33:ST3_smx:INFO: List of broken channels: [] 12:49:33:ST3_smx:INFO: Total # of broken channels: 0 12:49:33:ST3_smx:INFO: List of broken channels: [] 12:49:35:ST3_smx:INFO: chip: 30-1 37.726682 C 1165.571835 mV 12:49:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:49:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:49:35:ST3_smx:INFO: Electrons 12:49:35:ST3_smx:INFO: # loops 0 12:49:36:ST3_smx:INFO: # loops 1 12:49:38:ST3_smx:INFO: # loops 2 12:49:40:ST3_smx:INFO: Total # of broken channels: 1 12:49:40:ST3_smx:INFO: List of broken channels: [1] 12:49:40:ST3_smx:INFO: Total # of broken channels: 5 12:49:40:ST3_smx:INFO: List of broken channels: [1, 22, 24, 26, 28] 12:49:41:ST3_smx:INFO: chip: 21-2 40.898880 C 1171.483840 mV 12:49:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:49:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:49:41:ST3_smx:INFO: Electrons 12:49:41:ST3_smx:INFO: # loops 0 12:49:43:ST3_smx:INFO: # loops 1 12:49:45:ST3_smx:INFO: # loops 2 12:49:46:ST3_smx:INFO: Total # of broken channels: 0 12:49:46:ST3_smx:INFO: List of broken channels: [] 12:49:46:ST3_smx:INFO: Total # of broken channels: 0 12:49:46:ST3_smx:INFO: List of broken channels: [] 12:49:48:ST3_smx:INFO: chip: 28-3 -432.266438 C 1578.532875 mV 12:49:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:49:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:49:48:ST3_smx:INFO: Electrons 12:49:48:ST3_smx:INFO: # loops 0 12:49:50:ST3_smx:INFO: # loops 1 12:49:51:ST3_smx:INFO: # loops 2 12:49:53:ST3_smx:INFO: Total # of broken channels: 0 12:49:53:ST3_smx:INFO: List of broken channels: [] 12:49:53:ST3_smx:INFO: Total # of broken channels: 0 12:49:53:ST3_smx:INFO: List of broken channels: [] 12:50:06:ST3_smx:INFO: chip: 19-4 37.726682 C 1195.082160 mV 12:50:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:06:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:06:ST3_smx:INFO: Electrons 12:50:06:ST3_smx:INFO: # loops 0 12:50:08:ST3_smx:INFO: # loops 1 12:50:09:ST3_smx:INFO: # loops 2 12:50:11:ST3_smx:INFO: Total # of broken channels: 0 12:50:11:ST3_smx:INFO: List of broken channels: [] 12:50:11:ST3_smx:INFO: Total # of broken channels: 0 12:50:11:ST3_smx:INFO: List of broken channels: [] 12:50:13:ST3_smx:INFO: chip: 26-5 31.389742 C 1200.969315 mV 12:50:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:13:ST3_smx:INFO: Electrons 12:50:13:ST3_smx:INFO: # loops 0 12:50:14:ST3_smx:INFO: # loops 1 12:50:16:ST3_smx:INFO: # loops 2 12:50:17:ST3_smx:INFO: Total # of broken channels: 1 12:50:17:ST3_smx:INFO: List of broken channels: [42] 12:50:17:ST3_smx:INFO: Total # of broken channels: 1 12:50:18:ST3_smx:INFO: List of broken channels: [42] 12:50:19:ST3_smx:INFO: chip: 17-6 53.612520 C 1147.806000 mV 12:50:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:19:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:19:ST3_smx:INFO: Electrons 12:50:19:ST3_smx:INFO: # loops 0 12:50:21:ST3_smx:INFO: # loops 1 12:50:22:ST3_smx:INFO: # loops 2 12:50:24:ST3_smx:INFO: Total # of broken channels: 0 12:50:24:ST3_smx:INFO: List of broken channels: [] 12:50:24:ST3_smx:INFO: Total # of broken channels: 0 12:50:24:ST3_smx:INFO: List of broken channels: [] 12:50:26:ST3_smx:INFO: chip: 24-7 40.898880 C 1183.292940 mV 12:50:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:50:26:ST3_smx:INFO: Electrons 12:50:26:ST3_smx:INFO: # loops 0 12:50:27:ST3_smx:INFO: # loops 1 12:50:29:ST3_smx:INFO: # loops 2 12:50:30:ST3_smx:INFO: Total # of broken channels: 0 12:50:30:ST3_smx:INFO: List of broken channels: [] 12:50:30:ST3_smx:INFO: Total # of broken channels: 0 12:50:30:ST3_smx:INFO: List of broken channels: [] 12:50:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:50:31:febtest:INFO: 23-00 | XA-000-09-004-020-015-022-03 | 31.4 | 1242.0 12:50:31:febtest:INFO: 30-01 | XA-000-09-004-020-003-008-14 | 40.9 | 1189.2 12:50:31:febtest:INFO: 21-02 | XA-000-09-004-020-012-020-13 | 40.9 | 1195.1 12:50:31:febtest:INFO: 28-03 | XA-000-09-004-020-006-008-05 | -432.3 | 1578.5 12:50:31:febtest:INFO: 19-04 | XA-000-09-004-020-012-021-13 | 37.7 | 1212.7 12:50:32:febtest:INFO: 26-05 | XA-000-09-004-020-015-020-03 | 34.6 | 1224.5 12:50:32:febtest:INFO: 17-06 | XA-000-09-004-020-012-022-13 | 53.6 | 1165.6 12:50:32:febtest:INFO: 24-07 | XA-000-09-004-020-015-021-03 | 40.9 | 1206.9 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_04_30-12_48_56 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4148| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '1.4300', '1.850', '1.9270'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9750', '1.850', '2.6250'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9420', '1.850', '0.7706']