
FEB_4149 14.05.25 09:02:49
TextEdit.txt
09:02:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:02:49:ST3_Shared:INFO: FEB-Microcable 09:02:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:02:49:febtest:INFO: Testing FEB with SN 4149 09:02:50:smx_tester:INFO: Scanning setup 09:02:50:elinks:INFO: Disabling clock on downlink 0 09:02:50:elinks:INFO: Disabling clock on downlink 1 09:02:50:elinks:INFO: Disabling clock on downlink 2 09:02:50:elinks:INFO: Disabling clock on downlink 3 09:02:50:elinks:INFO: Disabling clock on downlink 4 09:02:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:02:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:02:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:02:50:elinks:INFO: Disabling clock on downlink 0 09:02:50:elinks:INFO: Disabling clock on downlink 1 09:02:50:elinks:INFO: Disabling clock on downlink 2 09:02:50:elinks:INFO: Disabling clock on downlink 3 09:02:50:elinks:INFO: Disabling clock on downlink 4 09:02:50:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:02:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:02:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:02:51:elinks:INFO: Disabling clock on downlink 0 09:02:51:elinks:INFO: Disabling clock on downlink 1 09:02:51:elinks:INFO: Disabling clock on downlink 2 09:02:51:elinks:INFO: Disabling clock on downlink 3 09:02:51:elinks:INFO: Disabling clock on downlink 4 09:02:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:02:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:02:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:02:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:02:51:elinks:INFO: Disabling clock on downlink 0 09:02:51:elinks:INFO: Disabling clock on downlink 1 09:02:51:elinks:INFO: Disabling clock on downlink 2 09:02:51:elinks:INFO: Disabling clock on downlink 3 09:02:51:elinks:INFO: Disabling clock on downlink 4 09:02:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:02:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:02:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:02:51:elinks:INFO: Disabling clock on downlink 0 09:02:51:elinks:INFO: Disabling clock on downlink 1 09:02:51:elinks:INFO: Disabling clock on downlink 2 09:02:51:elinks:INFO: Disabling clock on downlink 3 09:02:51:elinks:INFO: Disabling clock on downlink 4 09:02:51:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:02:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:02:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:02:51:setup_element:INFO: Scanning clock phase 09:02:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:02:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:02:51:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:02:51:setup_element:INFO: Eye window for uplink 16: XXXXXX____________________________________________________________XXXXXXXXXXXXXX Clock Delay: 35 09:02:51:setup_element:INFO: Eye window for uplink 17: XXXXXX____________________________________________________________XXXXXXXXXXXXXX Clock Delay: 35 09:02:51:setup_element:INFO: Eye window for uplink 18: XXXX____________________________________________________________________________ Clock Delay: 41 09:02:51:setup_element:INFO: Eye window for uplink 19: XXXX____________________________________________________________________________ Clock Delay: 41 09:02:51:setup_element:INFO: Eye window for uplink 20: XXXXXX__________________________________________________________________________ Clock Delay: 42 09:02:51:setup_element:INFO: Eye window for uplink 21: XXXXXX__________________________________________________________________________ Clock Delay: 42 09:02:51:setup_element:INFO: Eye window for uplink 22: XXXXXX______________________________________________________________XXXXXXXXXXXX Clock Delay: 36 09:02:51:setup_element:INFO: Eye window for uplink 23: XXXXXX______________________________________________________________XXXXXXXXXXXX Clock Delay: 36 09:02:51:setup_element:INFO: Eye window for uplink 24: XXXXXXXXXX_________________________________________________________XXXXXXXXXXXXX Clock Delay: 38 09:02:51:setup_element:INFO: Eye window for uplink 25: XXXXXXXXXX_________________________________________________________XXXXXXXXXXXXX Clock Delay: 38 09:02:51:setup_element:INFO: Eye window for uplink 26: XXXXXXXXXXXXX_XX________________________________________________________________ Clock Delay: 47 09:02:51:setup_element:INFO: Eye window for uplink 27: XXXXXXXXXXXXX_XX________________________________________________________________ Clock Delay: 47 09:02:51:setup_element:INFO: Eye window for uplink 28: XXXXXXXXXXXXX______________________________________________________XXXXXXXXXXXXX Clock Delay: 39 09:02:51:setup_element:INFO: Eye window for uplink 29: XXXXXXXXXXXXX______________________________________________________XXXXXXXXXXXXX Clock Delay: 39 09:02:51:setup_element:INFO: Eye window for uplink 30: XXXXXXXXXX________________________________________________________XXXXXXXXXXXXXX Clock Delay: 37 09:02:51:setup_element:INFO: Eye window for uplink 31: XXXXXXXXXX________________________________________________________XXXXXXXXXXXXXX Clock Delay: 37 09:02:51:setup_element:INFO: Setting the clock phase to 40 for group 0, downlink 2 09:02:51:setup_element:INFO: Scanning data phases 09:02:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:02:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:02:56:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:02:56:setup_element:INFO: Eye window for uplink 16: ___________________XXXXXXXXXX___________ Data delay found: 3 09:02:56:setup_element:INFO: Eye window for uplink 17: __________________XXXXXXXXX_____________ Data delay found: 2 09:02:56:setup_element:INFO: Eye window for uplink 18: _________________________XXXXXXX________ Data delay found: 8 09:02:56:setup_element:INFO: Eye window for uplink 19: _______________________XXXXXXXX_________ Data delay found: 6 09:02:56:setup_element:INFO: Eye window for uplink 20: _______________________XXXXXXX__________ Data delay found: 6 09:02:56:setup_element:INFO: Eye window for uplink 21: _______________________XXXXXXX__________ Data delay found: 6 09:02:56:setup_element:INFO: Eye window for uplink 22: ________________________XXXXXXXX________ Data delay found: 7 09:02:56:setup_element:INFO: Eye window for uplink 23: _____________________XXXXXX_____________ Data delay found: 3 09:02:56:setup_element:INFO: Eye window for uplink 24: XXXXX___________________________XXXXXXXX Data delay found: 18 09:02:56:setup_element:INFO: Eye window for uplink 25: XXXXXXX______________________________XXX Data delay found: 21 09:02:56:setup_element:INFO: Eye window for uplink 26: X______________________________XXXXXXXXX Data delay found: 15 09:02:56:setup_element:INFO: Eye window for uplink 27: XXXXXX_____________________________XXXXX Data delay found: 20 09:02:56:setup_element:INFO: Eye window for uplink 28: XXXXXXXXXX_____________________________X Data delay found: 24 09:02:56:setup_element:INFO: Eye window for uplink 29: __XXXXXXXXXX____________________________ Data delay found: 26 09:02:56:setup_element:INFO: Eye window for uplink 30: _XXXXXXXXXXXX___________________________ Data delay found: 26 09:02:56:setup_element:INFO: Eye window for uplink 31: __XXXXXXXXXX____________________________ Data delay found: 26 09:02:56:setup_element:INFO: Setting the data phase to 3 for uplink 16 09:02:56:setup_element:INFO: Setting the data phase to 2 for uplink 17 09:02:56:setup_element:INFO: Setting the data phase to 8 for uplink 18 09:02:57:setup_element:INFO: Setting the data phase to 6 for uplink 19 09:02:57:setup_element:INFO: Setting the data phase to 6 for uplink 20 09:02:57:setup_element:INFO: Setting the data phase to 6 for uplink 21 09:02:57:setup_element:INFO: Setting the data phase to 7 for uplink 22 09:02:57:setup_element:INFO: Setting the data phase to 3 for uplink 23 09:02:57:setup_element:INFO: Setting the data phase to 18 for uplink 24 09:02:57:setup_element:INFO: Setting the data phase to 21 for uplink 25 09:02:57:setup_element:INFO: Setting the data phase to 15 for uplink 26 09:02:57:setup_element:INFO: Setting the data phase to 20 for uplink 27 09:02:57:setup_element:INFO: Setting the data phase to 24 for uplink 28 09:02:57:setup_element:INFO: Setting the data phase to 26 for uplink 29 09:02:57:setup_element:INFO: Setting the data phase to 26 for uplink 30 09:02:57:setup_element:INFO: Setting the data phase to 26 for uplink 31 09:02:57:setup_element:INFO: Beginning SMX ASICs map scan 09:02:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:02:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:02:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:02:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:02:57:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:02:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 09:02:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 09:02:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:02:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:02:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 09:02:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 09:02:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:02:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:02:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 09:02:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 09:02:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:02:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:02:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 09:02:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 09:02:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:02:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:02:59:setup_element:INFO: Performing Elink synchronization 09:02:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:02:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:02:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:02:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:02:59:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:02:59:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 09:03:00:febtest:INFO: Init all SMX (CSA): 30 09:03:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:03:14:febtest:INFO: 23-00 | XA-000-09-004-008-013-023-11 | 44.1 | 1153.7 09:03:14:febtest:INFO: 30-01 | XA-000-09-004-008-013-022-11 | 40.9 | 1153.7 09:03:14:febtest:INFO: 21-02 | XA-000-09-004-008-016-016-00 | 40.9 | 1159.7 09:03:14:febtest:INFO: 28-03 | XA-000-09-004-008-010-023-03 | 44.1 | 1153.7 09:03:15:febtest:INFO: 19-04 | XA-000-09-004-008-016-017-00 | 31.4 | 1189.2 09:03:15:febtest:INFO: 26-05 | XA-000-09-004-008-013-021-11 | 44.1 | 1153.7 09:03:15:febtest:INFO: 17-06 | XA-000-09-004-008-010-018-03 | 50.4 | 1124.0 09:03:15:febtest:INFO: 24-07 | XA-000-09-004-008-016-023-00 | 34.6 | 1189.2 09:03:16:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 09:03:18:ST3_smx:INFO: chip: 23-0 44.073563 C 1165.571835 mV 09:03:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:18:ST3_smx:INFO: Electrons 09:03:18:ST3_smx:INFO: # loops 0 09:03:20:ST3_smx:INFO: # loops 1 09:03:21:ST3_smx:INFO: # loops 2 09:03:23:ST3_smx:INFO: Total # of broken channels: 0 09:03:23:ST3_smx:INFO: List of broken channels: [] 09:03:23:ST3_smx:INFO: Total # of broken channels: 0 09:03:23:ST3_smx:INFO: List of broken channels: [] 09:03:24:ST3_smx:INFO: chip: 30-1 40.898880 C 1171.483840 mV 09:03:24:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:24:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:24:ST3_smx:INFO: Electrons 09:03:24:ST3_smx:INFO: # loops 0 09:03:26:ST3_smx:INFO: # loops 1 09:03:28:ST3_smx:INFO: # loops 2 09:03:29:ST3_smx:INFO: Total # of broken channels: 0 09:03:29:ST3_smx:INFO: List of broken channels: [] 09:03:29:ST3_smx:INFO: Total # of broken channels: 0 09:03:29:ST3_smx:INFO: List of broken channels: [] 09:03:31:ST3_smx:INFO: chip: 21-2 40.898880 C 1171.483840 mV 09:03:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:31:ST3_smx:INFO: Electrons 09:03:31:ST3_smx:INFO: # loops 0 09:03:33:ST3_smx:INFO: # loops 1 09:03:34:ST3_smx:INFO: # loops 2 09:03:36:ST3_smx:INFO: Total # of broken channels: 0 09:03:36:ST3_smx:INFO: List of broken channels: [] 09:03:36:ST3_smx:INFO: Total # of broken channels: 0 09:03:36:ST3_smx:INFO: List of broken channels: [] 09:03:38:ST3_smx:INFO: chip: 28-3 47.250730 C 1165.571835 mV 09:03:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:38:ST3_smx:INFO: Electrons 09:03:38:ST3_smx:INFO: # loops 0 09:03:39:ST3_smx:INFO: # loops 1 09:03:41:ST3_smx:INFO: # loops 2 09:03:42:ST3_smx:INFO: Total # of broken channels: 0 09:03:42:ST3_smx:INFO: List of broken channels: [] 09:03:42:ST3_smx:INFO: Total # of broken channels: 0 09:03:42:ST3_smx:INFO: List of broken channels: [] 09:03:44:ST3_smx:INFO: chip: 19-4 31.389742 C 1206.851500 mV 09:03:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:44:ST3_smx:INFO: Electrons 09:03:44:ST3_smx:INFO: # loops 0 09:03:45:ST3_smx:INFO: # loops 1 09:03:47:ST3_smx:INFO: # loops 2 09:03:48:ST3_smx:INFO: Total # of broken channels: 0 09:03:48:ST3_smx:INFO: List of broken channels: [] 09:03:48:ST3_smx:INFO: Total # of broken channels: 0 09:03:48:ST3_smx:INFO: List of broken channels: [] 09:03:50:ST3_smx:INFO: chip: 26-5 44.073563 C 1171.483840 mV 09:03:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:50:ST3_smx:INFO: Electrons 09:03:50:ST3_smx:INFO: # loops 0 09:03:51:ST3_smx:INFO: # loops 1 09:03:53:ST3_smx:INFO: # loops 2 09:03:55:ST3_smx:INFO: Total # of broken channels: 0 09:03:55:ST3_smx:INFO: List of broken channels: [] 09:03:55:ST3_smx:INFO: Total # of broken channels: 0 09:03:55:ST3_smx:INFO: List of broken channels: [] 09:03:56:ST3_smx:INFO: chip: 17-6 50.430383 C 1129.995435 mV 09:03:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:56:ST3_smx:INFO: Electrons 09:03:56:ST3_smx:INFO: # loops 0 09:03:58:ST3_smx:INFO: # loops 1 09:04:00:ST3_smx:INFO: # loops 2 09:04:01:ST3_smx:INFO: Total # of broken channels: 0 09:04:01:ST3_smx:INFO: List of broken channels: [] 09:04:01:ST3_smx:INFO: Total # of broken channels: 0 09:04:01:ST3_smx:INFO: List of broken channels: [] 09:04:03:ST3_smx:INFO: chip: 24-7 37.726682 C 1212.728715 mV 09:04:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:04:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:04:03:ST3_smx:INFO: Electrons 09:04:03:ST3_smx:INFO: # loops 0 09:04:05:ST3_smx:INFO: # loops 1 09:04:06:ST3_smx:INFO: # loops 2 09:04:08:ST3_smx:INFO: Total # of broken channels: 0 09:04:08:ST3_smx:INFO: List of broken channels: [] 09:04:08:ST3_smx:INFO: Total # of broken channels: 0 09:04:08:ST3_smx:INFO: List of broken channels: [] 09:04:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:04:08:febtest:INFO: 23-00 | XA-000-09-004-008-013-023-11 | 47.3 | 1183.3 09:04:09:febtest:INFO: 30-01 | XA-000-09-004-008-013-022-11 | 44.1 | 1189.2 09:04:09:febtest:INFO: 21-02 | XA-000-09-004-008-016-016-00 | 44.1 | 1195.1 09:04:09:febtest:INFO: 28-03 | XA-000-09-004-008-010-023-03 | 47.3 | 1183.3 09:04:09:febtest:INFO: 19-04 | XA-000-09-004-008-016-017-00 | 31.4 | 1224.5 09:04:09:febtest:INFO: 26-05 | XA-000-09-004-008-013-021-11 | 44.1 | 1201.0 09:04:10:febtest:INFO: 17-06 | XA-000-09-004-008-010-018-03 | 53.6 | 1153.7 09:04:10:febtest:INFO: 24-07 | XA-000-09-004-008-016-023-00 | 34.6 | 1311.9 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_05_14-09_02_49 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4149| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '1.4950', '1.850', '2.5110'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9870', '1.850', '2.6110'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9610', '1.850', '0.5320']