DTL-STS tests database

FEB_4152 15.05.25 07:31:56

link: XA-000-09-004-008-005-008-00
...SMX_0.root
link: XA-000-09-004-008-005-007-00
...SMX_2.root
link: XA-000-09-004-008-011-008-09
...SMX_4.root
link: XA-000-09-004-008-008-008-07
...SMX_6.root
link: XA-000-09-004-008-017-008-10
...SMX_1.root
link: XA-000-09-004-008-005-009-00
...SMX_3.root
link: XA-000-09-004-008-018-009-04
...SMX_5.root
link: XA-000-09-004-008-014-008-02
...SMX_7.root
link: XA-000-09-004-008-014-008-02
...VddmCSAstatus.root
TextEdit.txt
            07:31:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:31:56:ST3_Shared:INFO:	                       FEB-Microcable                       
07:31:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:31:56:febtest:INFO:	Testing FEB with SN 4152
07:31:58:smx_tester:INFO:	Scanning setup
07:31:58:elinks:INFO:	Disabling clock on downlink 0
07:31:58:elinks:INFO:	Disabling clock on downlink 1
07:31:58:elinks:INFO:	Disabling clock on downlink 2
07:31:58:elinks:INFO:	Disabling clock on downlink 3
07:31:58:elinks:INFO:	Disabling clock on downlink 4
07:31:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:31:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:31:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:31:58:elinks:INFO:	Disabling clock on downlink 0
07:31:58:elinks:INFO:	Disabling clock on downlink 1
07:31:58:elinks:INFO:	Disabling clock on downlink 2
07:31:58:elinks:INFO:	Disabling clock on downlink 3
07:31:58:elinks:INFO:	Disabling clock on downlink 4
07:31:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:31:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:31:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:31:58:elinks:INFO:	Disabling clock on downlink 0
07:31:58:elinks:INFO:	Disabling clock on downlink 1
07:31:58:elinks:INFO:	Disabling clock on downlink 2
07:31:58:elinks:INFO:	Disabling clock on downlink 3
07:31:58:elinks:INFO:	Disabling clock on downlink 4
07:31:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:31:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
07:31:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
07:31:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:31:58:elinks:INFO:	Disabling clock on downlink 0
07:31:58:elinks:INFO:	Disabling clock on downlink 1
07:31:58:elinks:INFO:	Disabling clock on downlink 2
07:31:58:elinks:INFO:	Disabling clock on downlink 3
07:31:58:elinks:INFO:	Disabling clock on downlink 4
07:31:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:31:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:31:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:31:58:elinks:INFO:	Disabling clock on downlink 0
07:31:58:elinks:INFO:	Disabling clock on downlink 1
07:31:58:elinks:INFO:	Disabling clock on downlink 2
07:31:58:elinks:INFO:	Disabling clock on downlink 3
07:31:58:elinks:INFO:	Disabling clock on downlink 4
07:31:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:31:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
07:31:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:31:58:setup_element:INFO:	Scanning clock phase
07:31:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:31:58:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:31:59:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
07:31:59:setup_element:INFO:	Eye window for uplink 16: XXXXX___________________________________________________________________________
Clock Delay: 42
07:31:59:setup_element:INFO:	Eye window for uplink 17: XXXXX___________________________________________________________________________
Clock Delay: 42
07:31:59:setup_element:INFO:	Eye window for uplink 18: XXXXX______________________________________________________________XXXXXXXXXXXXX
Clock Delay: 35
07:31:59:setup_element:INFO:	Eye window for uplink 19: XXXXX______________________________________________________________XXXXXXXXXXXXX
Clock Delay: 35
07:31:59:setup_element:INFO:	Eye window for uplink 20: XXXXX_______________________________________________________________XXXXX_______
Clock Delay: 36
07:31:59:setup_element:INFO:	Eye window for uplink 21: XXXXX_______________________________________________________________XXXXX_______
Clock Delay: 36
07:31:59:setup_element:INFO:	Eye window for uplink 22: XXXXX_______________________________________________________________XXXXXXXXXXXX
Clock Delay: 36
07:31:59:setup_element:INFO:	Eye window for uplink 23: XXXXX_______________________________________________________________XXXXXXXXXXXX
Clock Delay: 36
07:31:59:setup_element:INFO:	Eye window for uplink 24: XXXXXXXXXXX______________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 37
07:31:59:setup_element:INFO:	Eye window for uplink 25: XXXXXXXXXXX______________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 37
07:31:59:setup_element:INFO:	Eye window for uplink 26: XXXXXXXXXXX______________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 37
07:31:59:setup_element:INFO:	Eye window for uplink 27: XXXXXXXXXXX______________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 37
07:31:59:setup_element:INFO:	Eye window for uplink 28: XXXXXXXXXXX_X______________________________________________________XXXXXXXXXXXXX
Clock Delay: 39
07:31:59:setup_element:INFO:	Eye window for uplink 29: XXXXXXXXXXX_X______________________________________________________XXXXXXXXXXXXX
Clock Delay: 39
07:31:59:setup_element:INFO:	Eye window for uplink 30: XXXXXXXXXXXXX_________________________________________________________XXXXXXXXXX
Clock Delay: 41
07:31:59:setup_element:INFO:	Eye window for uplink 31: XXXXXXXXXXXXX_________________________________________________________XXXXXXXXXX
Clock Delay: 41
07:31:59:setup_element:INFO:	Setting the clock phase to 38 for group 0, downlink 2
07:31:59:setup_element:INFO:	Scanning data phases
07:31:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:31:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:32:04:setup_element:INFO:	Data phase scan results for group 0, downlink 2
07:32:04:setup_element:INFO:	Eye window for uplink 16: ________________________XXXXXXXXXXX_____
Data delay found: 9
07:32:04:setup_element:INFO:	Eye window for uplink 17: ______________________X_XXXXXXXX________
Data delay found: 6
07:32:04:setup_element:WARNING:	Group 0, downlink 2, uplink 18: No True values in scanned data!
Traceback (most recent call last):
  File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/setup_element.py", line 261, in characterize_data_phases
    data_delay, window_len = find_center(fcl)
  File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/hctsp.py", line 87, in find_center
    raise Exception("No True values in scanned data!")
Exception: No True values in scanned data!

07:32:04:setup_element:WARNING:	Group 0, downlink 2, uplink 19: No True values in scanned data!
Traceback (most recent call last):
  File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/setup_element.py", line 261, in characterize_data_phases
    data_delay, window_len = find_center(fcl)
  File "/home/cbm/ST3_BASE/smx_software_FEB8_2_20MHz/python/hctsp/hctsp.py", line 87, in find_center
    raise Exception("No True values in scanned data!")
Exception: No True values in scanned data!

07:32:04:setup_element:INFO:	Eye window for uplink 20: __________________________XXXXXX________
Data delay found: 8
07:32:04:setup_element:INFO:	Eye window for uplink 21: _________________________XXXXXXX________
Data delay found: 8
07:32:04:setup_element:INFO:	Eye window for uplink 22: _________________________XXXXXXXXXXXXXXX
Data delay found: 12
07:32:04:setup_element:INFO:	Eye window for uplink 23: ________________________XXXXXXXXXXXXXXXX
Data delay found: 11
07:32:04:setup_element:INFO:	Eye window for uplink 24: XXXXXX_________________________XXXXXXXXX
Data delay found: 18
07:32:04:setup_element:INFO:	Eye window for uplink 25: XXXXXXXX____________________________XXXX
Data delay found: 21
07:32:04:setup_element:INFO:	Eye window for uplink 26: XXXXXXX___________________________XXXXXX
Data delay found: 20
07:32:04:setup_element:INFO:	Eye window for uplink 27: XXXXXXXXXXX____________________________X
Data delay found: 24
07:32:04:setup_element:INFO:	Eye window for uplink 28: _XXXXXXXX_______________________________
Data delay found: 24
07:32:04:setup_element:INFO:	Eye window for uplink 29: ____XXXXXXX_____________________________
Data delay found: 27
07:32:04:setup_element:INFO:	Eye window for uplink 30: ______XXXXXXXXXXXX______________________
Data delay found: 31
07:32:04:setup_element:INFO:	Eye window for uplink 31: ________XXXXXXXXXX______________________
Data delay found: 32
07:32:04:setup_element:INFO:	Setting the data phase to 9 for uplink 16
07:32:04:setup_element:INFO:	Setting the data phase to 6 for uplink 17
07:32:04:setup_element:INFO:	Setting the data phase to 8 for uplink 20
07:32:04:setup_element:INFO:	Setting the data phase to 8 for uplink 21
07:32:04:setup_element:INFO:	Setting the data phase to 12 for uplink 22
07:32:04:setup_element:INFO:	Setting the data phase to 11 for uplink 23
07:32:04:setup_element:INFO:	Setting the data phase to 18 for uplink 24
07:32:04:setup_element:INFO:	Setting the data phase to 21 for uplink 25
07:32:04:setup_element:INFO:	Setting the data phase to 20 for uplink 26
07:32:04:setup_element:INFO:	Setting the data phase to 24 for uplink 27
07:32:04:setup_element:INFO:	Setting the data phase to 24 for uplink 28
07:32:04:setup_element:INFO:	Setting the data phase to 27 for uplink 29
07:32:04:setup_element:INFO:	Setting the data phase to 31 for uplink 30
07:32:04:setup_element:INFO:	Setting the data phase to 32 for uplink 31
07:32:04:setup_element:INFO:	Beginning SMX ASICs map scan
07:32:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:32:04:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:32:04:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
07:32:04:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
07:32:04:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:32:04:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:32:04:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:32:04:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:32:04:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:32:04:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:32:04:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:32:05:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:32:05:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:32:05:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:32:05:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:32:05:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:32:05:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:32:05:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:32:05:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:32:05:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:32:05:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:32:07:setup_element:INFO:	Performing Elink synchronization
07:32:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:32:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:32:07:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
07:32:07:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
07:32:07:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
07:32:07:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:32:08:febtest:INFO:	Init all SMX (CSA): 30
07:32:24:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:32:24:febtest:INFO:	23-00 | XA-000-09-004-008-005-008-00 |  44.1 | 1130.0
07:32:24:febtest:INFO:	30-01 | XA-000-09-004-008-017-008-10 |  40.9 | 1141.9
07:32:24:febtest:INFO:	21-02 | XA-000-09-004-008-005-007-00 |  34.6 | 1177.4
07:32:25:febtest:INFO:	28-03 | XA-000-09-004-008-005-009-00 |  25.1 | 1189.2
07:32:25:febtest:INFO:	19-04 | XA-000-09-004-008-011-008-09 |  31.4 | 1177.4
07:32:25:febtest:INFO:	26-05 | XA-000-09-004-008-018-009-04 |  40.9 | 1135.9
07:32:25:febtest:INFO:	17-06 | XA-000-09-004-008-008-008-07 |  34.6 | 1165.6
07:32:26:febtest:INFO:	24-07 | XA-000-09-004-008-014-008-02 |  28.2 | 1177.4
07:32:27:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:32:28:ST3_smx:INFO:	chip: 23-0 	 44.073563 C 	 1147.806000 mV
07:32:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:32:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:32:28:ST3_smx:INFO:		Electrons
07:32:28:ST3_smx:INFO:	# loops 0
07:32:30:ST3_smx:INFO:	# loops 1
07:32:33:ST3_smx:INFO:	# loops 2
07:32:35:ST3_smx:INFO:	Total # of broken channels: 0
07:32:35:ST3_smx:INFO:	List of broken channels: []
07:32:35:ST3_smx:INFO:	Total # of broken channels: 0
07:32:35:ST3_smx:INFO:	List of broken channels: []
07:32:37:ST3_smx:INFO:	chip: 30-1 	 40.898880 C 	 1159.654860 mV
07:32:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:32:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:32:37:ST3_smx:INFO:		Electrons
07:32:37:ST3_smx:INFO:	# loops 0
07:32:39:ST3_smx:INFO:	# loops 1
07:32:41:ST3_smx:INFO:	# loops 2
07:32:43:ST3_smx:INFO:	Total # of broken channels: 0
07:32:43:ST3_smx:INFO:	List of broken channels: []
07:32:43:ST3_smx:INFO:	Total # of broken channels: 0
07:32:43:ST3_smx:INFO:	List of broken channels: []
07:32:44:ST3_smx:INFO:	chip: 21-2 	 34.556970 C 	 1200.969315 mV
07:32:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:32:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:32:44:ST3_smx:INFO:		Electrons
07:32:44:ST3_smx:INFO:	# loops 0
07:32:46:ST3_smx:INFO:	# loops 1
07:32:48:ST3_smx:INFO:	# loops 2
07:32:50:ST3_smx:INFO:	Total # of broken channels: 0
07:32:50:ST3_smx:INFO:	List of broken channels: []
07:32:50:ST3_smx:INFO:	Total # of broken channels: 0
07:32:50:ST3_smx:INFO:	List of broken channels: []
07:32:52:ST3_smx:INFO:	chip: 28-3 	 28.225000 C 	 1206.851500 mV
07:32:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:32:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:32:52:ST3_smx:INFO:		Electrons
07:32:52:ST3_smx:INFO:	# loops 0
07:32:54:ST3_smx:INFO:	# loops 1
07:32:56:ST3_smx:INFO:	# loops 2
07:32:58:ST3_smx:INFO:	Total # of broken channels: 0
07:32:58:ST3_smx:INFO:	List of broken channels: []
07:32:58:ST3_smx:INFO:	Total # of broken channels: 0
07:32:58:ST3_smx:INFO:	List of broken channels: []
07:33:00:ST3_smx:INFO:	chip: 19-4 	 31.389742 C 	 1195.082160 mV
07:33:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:33:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:33:00:ST3_smx:INFO:		Electrons
07:33:00:ST3_smx:INFO:	# loops 0
07:33:02:ST3_smx:INFO:	# loops 1
07:33:04:ST3_smx:INFO:	# loops 2
07:33:06:ST3_smx:INFO:	Total # of broken channels: 0
07:33:06:ST3_smx:INFO:	List of broken channels: []
07:33:06:ST3_smx:INFO:	Total # of broken channels: 0
07:33:06:ST3_smx:INFO:	List of broken channels: []
07:33:08:ST3_smx:INFO:	chip: 26-5 	 44.073563 C 	 1147.806000 mV
07:33:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:33:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:33:08:ST3_smx:INFO:		Electrons
07:33:08:ST3_smx:INFO:	# loops 0
07:33:10:ST3_smx:INFO:	# loops 1
07:33:12:ST3_smx:INFO:	# loops 2
07:33:14:ST3_smx:INFO:	Total # of broken channels: 0
07:33:14:ST3_smx:INFO:	List of broken channels: []
07:33:14:ST3_smx:INFO:	Total # of broken channels: 0
07:33:14:ST3_smx:INFO:	List of broken channels: []
07:33:15:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1177.390875 mV
07:33:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:33:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:33:15:ST3_smx:INFO:		Electrons
07:33:15:ST3_smx:INFO:	# loops 0
07:33:18:ST3_smx:INFO:	# loops 1
07:33:19:ST3_smx:INFO:	# loops 2
07:33:22:ST3_smx:INFO:	Total # of broken channels: 0
07:33:22:ST3_smx:INFO:	List of broken channels: []
07:33:22:ST3_smx:INFO:	Total # of broken channels: 0
07:33:22:ST3_smx:INFO:	List of broken channels: []
07:33:23:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1189.190035 mV
07:33:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:33:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:33:23:ST3_smx:INFO:		Electrons
07:33:23:ST3_smx:INFO:	# loops 0
07:33:25:ST3_smx:INFO:	# loops 1
07:33:28:ST3_smx:INFO:	# loops 2
07:33:30:ST3_smx:INFO:	Total # of broken channels: 0
07:33:30:ST3_smx:INFO:	List of broken channels: []
07:33:30:ST3_smx:INFO:	Total # of broken channels: 0
07:33:30:ST3_smx:INFO:	List of broken channels: []
07:33:30:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:33:30:febtest:INFO:	23-00 | XA-000-09-004-008-005-008-00 |  47.3 | 1165.6
07:33:31:febtest:INFO:	30-01 | XA-000-09-004-008-017-008-10 |  40.9 | 1183.3
07:33:31:febtest:INFO:	21-02 | XA-000-09-004-008-005-007-00 |  34.6 | 1545.1
07:33:31:febtest:INFO:	28-03 | XA-000-09-004-008-005-009-00 |  28.2 | 1230.3
07:33:31:febtest:INFO:	19-04 | XA-000-09-004-008-011-008-09 |  34.6 | 1206.9
07:33:31:febtest:INFO:	26-05 | XA-000-09-004-008-018-009-04 |  44.1 | 1165.6
07:33:32:febtest:INFO:	17-06 | XA-000-09-004-008-008-008-07 |  37.7 | 1195.1
07:33:32:febtest:INFO:	24-07 | XA-000-09-004-008-014-008-02 |  31.4 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_05_15-07_31_56
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4152| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.453', '1.5550', '1.850', '2.5360']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9790', '1.850', '2.5350']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9550', '1.850', '0.5266']
Comment.txt