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LDO/KIT

FEB_4156    26.05.25 12:48:37

link: XA-000-09-004-008-018-010-04
SMX_0
...SMX_0.root
link: XA-000-09-004-008-015-010-15
SMX_2
...SMX_2.root
link: XA-000-09-004-008-003-009-05
SMX_4
...SMX_4.root
link: XA-000-09-004-008-003-010-05
SMX_6
...SMX_6.root
link: XA-000-09-004-008-006-009-14
SMX_1
...SMX_1.root
link: XA-000-09-004-008-012-009-01
SMX_3
...SMX_3.root
link: XA-000-09-004-008-015-009-15
SMX_5
...SMX_5.root
link: XA-000-09-004-008-009-009-10
SMX_7
...SMX_7.root
link: XA-000-09-004-008-009-009-10
VddmCSAstatus.png
...VddmCSAstatus.root
TextEdit.txt 
            12:48:37:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:48:37:ST3_Shared:INFO:	                         FEB-Sensor                         
12:48:37:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:48:39:ST3_ModuleSelector:INFO:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M8UR7T0011260A2

12:48:39:ST3_ModuleSelector:INFO:	11094

12:48:39:febtest:INFO:	Testing FEB with SN 4156
12:48:41:smx_tester:INFO:	Scanning setup
12:48:41:elinks:INFO:	Disabling clock on downlink 0
12:48:41:elinks:INFO:	Disabling clock on downlink 1
12:48:41:elinks:INFO:	Disabling clock on downlink 2
12:48:41:elinks:INFO:	Disabling clock on downlink 3
12:48:41:elinks:INFO:	Disabling clock on downlink 4
12:48:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:48:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:48:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:48:41:elinks:INFO:	Disabling clock on downlink 0
12:48:41:elinks:INFO:	Disabling clock on downlink 1
12:48:41:elinks:INFO:	Disabling clock on downlink 2
12:48:41:elinks:INFO:	Disabling clock on downlink 3
12:48:41:elinks:INFO:	Disabling clock on downlink 4
12:48:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:48:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:48:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:48:41:elinks:INFO:	Disabling clock on downlink 0
12:48:41:elinks:INFO:	Disabling clock on downlink 1
12:48:41:elinks:INFO:	Disabling clock on downlink 2
12:48:41:elinks:INFO:	Disabling clock on downlink 3
12:48:41:elinks:INFO:	Disabling clock on downlink 4
12:48:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:48:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
12:48:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
12:48:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:48:41:elinks:INFO:	Disabling clock on downlink 0
12:48:41:elinks:INFO:	Disabling clock on downlink 1
12:48:41:elinks:INFO:	Disabling clock on downlink 2
12:48:41:elinks:INFO:	Disabling clock on downlink 3
12:48:41:elinks:INFO:	Disabling clock on downlink 4
12:48:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:48:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:48:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:48:41:elinks:INFO:	Disabling clock on downlink 0
12:48:41:elinks:INFO:	Disabling clock on downlink 1
12:48:41:elinks:INFO:	Disabling clock on downlink 2
12:48:41:elinks:INFO:	Disabling clock on downlink 3
12:48:41:elinks:INFO:	Disabling clock on downlink 4
12:48:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:48:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:48:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:48:41:setup_element:INFO:	Scanning clock phase
12:48:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:48:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:48:42:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
12:48:42:setup_element:INFO:	Eye window for uplink 16: __________________________________________________________________________XXXXXX
Clock Delay: 36
12:48:42:setup_element:INFO:	Eye window for uplink 17: __________________________________________________________________________XXXXXX
Clock Delay: 36
12:48:42:setup_element:INFO:	Eye window for uplink 18: __________________________________________________________________________XXXXX_
Clock Delay: 36
12:48:42:setup_element:INFO:	Eye window for uplink 19: __________________________________________________________________________XXXXX_
Clock Delay: 36
12:48:42:setup_element:INFO:	Eye window for uplink 20: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:48:42:setup_element:INFO:	Eye window for uplink 21: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:48:42:setup_element:INFO:	Eye window for uplink 22: X_________________________________________________________________________XXXXXX
Clock Delay: 37
12:48:42:setup_element:INFO:	Eye window for uplink 23: X_________________________________________________________________________XXXXXX
Clock Delay: 37
12:48:42:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:48:42:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:48:42:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:48:42:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:48:42:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:48:42:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:48:42:setup_element:INFO:	Eye window for uplink 30: __________________________________________________________________________XXXXX_
Clock Delay: 36
12:48:42:setup_element:INFO:	Eye window for uplink 31: __________________________________________________________________________XXXXX_
Clock Delay: 36
12:48:42:setup_element:INFO:	Setting the clock phase to 35 for group 0, downlink 2
12:48:42:setup_element:INFO:	Scanning data phases
12:48:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:48:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:48:47:setup_element:INFO:	Data phase scan results for group 0, downlink 2
12:48:47:setup_element:INFO:	Eye window for uplink 16: XX_________________________________XXXXX
Data delay found: 18
12:48:47:setup_element:INFO:	Eye window for uplink 17: _________________________________XXXXX__
Data delay found: 15
12:48:47:setup_element:INFO:	Eye window for uplink 18: _________________________________XXXXX__
Data delay found: 15
12:48:47:setup_element:INFO:	Eye window for uplink 19: ______________________________XXXXX_____
Data delay found: 12
12:48:47:setup_element:INFO:	Eye window for uplink 20: ________________________________XXXXX___
Data delay found: 14
12:48:47:setup_element:INFO:	Eye window for uplink 21: _______________________________XXXXX____
Data delay found: 13
12:48:47:setup_element:INFO:	Eye window for uplink 22: XXX_________________________________XXXX
Data delay found: 19
12:48:47:setup_element:INFO:	Eye window for uplink 23: ________________________________XXXXX___
Data delay found: 14
12:48:47:setup_element:INFO:	Eye window for uplink 24: _XXXXX_________________________________X
Data delay found: 22
12:48:47:setup_element:INFO:	Eye window for uplink 25: ____XXXXX_______________________________
Data delay found: 26
12:48:47:setup_element:INFO:	Eye window for uplink 26: __XXXXX___________XXXXXXXXXXXXXXXXXXXXXX
Data delay found: 12
12:48:47:setup_element:INFO:	Eye window for uplink 27: ______XXXXXXX_____XXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
12:48:47:setup_element:INFO:	Eye window for uplink 28: _______XXXXX____________________________
Data delay found: 29
12:48:47:setup_element:INFO:	Eye window for uplink 29: _________XXXXXX_________________________
Data delay found: 31
12:48:47:setup_element:INFO:	Eye window for uplink 30: _________XXXXXXX________________________
Data delay found: 32
12:48:47:setup_element:INFO:	Eye window for uplink 31: ___________XXXX_________________________
Data delay found: 32
12:48:47:setup_element:INFO:	Setting the data phase to 18 for uplink 16
12:48:47:setup_element:INFO:	Setting the data phase to 15 for uplink 17
12:48:47:setup_element:INFO:	Setting the data phase to 15 for uplink 18
12:48:47:setup_element:INFO:	Setting the data phase to 12 for uplink 19
12:48:47:setup_element:INFO:	Setting the data phase to 14 for uplink 20
12:48:47:setup_element:INFO:	Setting the data phase to 13 for uplink 21
12:48:47:setup_element:INFO:	Setting the data phase to 19 for uplink 22
12:48:47:setup_element:INFO:	Setting the data phase to 14 for uplink 23
12:48:47:setup_element:INFO:	Setting the data phase to 22 for uplink 24
12:48:47:setup_element:INFO:	Setting the data phase to 26 for uplink 25
12:48:47:setup_element:INFO:	Setting the data phase to 12 for uplink 26
12:48:47:setup_element:INFO:	Setting the data phase to 2 for uplink 27
12:48:47:setup_element:INFO:	Setting the data phase to 29 for uplink 28
12:48:47:setup_element:INFO:	Setting the data phase to 31 for uplink 29
12:48:47:setup_element:INFO:	Setting the data phase to 32 for uplink 30
12:48:47:setup_element:INFO:	Setting the data phase to 32 for uplink 31
12:48:47:setup_element:INFO:	Beginning SMX ASICs map scan
12:48:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:48:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:48:47:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:48:47:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:48:47:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:48:47:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
12:48:47:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
12:48:47:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:48:47:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:48:47:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
12:48:47:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
12:48:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:48:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:48:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
12:48:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
12:48:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:48:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:48:48:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
12:48:48:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
12:48:48:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:48:48:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:48:50:setup_element:INFO:	Performing Elink synchronization
12:48:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:48:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:48:50:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:48:50:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:48:50:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
12:48:50:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
12:48:50:febtest:INFO:	Init all SMX (CSA): 30
12:49:07:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:49:07:febtest:INFO:	23-00 | XA-000-09-004-008-018-010-04 |  47.3 | 1124.0
12:49:08:febtest:INFO:	30-01 | XA-000-09-004-008-006-009-14 |  28.2 | 1195.1
12:49:08:febtest:INFO:	21-02 | XA-000-09-004-008-015-010-15 |  34.6 | 1171.5
12:49:08:febtest:INFO:	28-03 | XA-000-09-004-008-012-009-01 |  31.4 | 1177.4
12:49:08:febtest:INFO:	19-04 | XA-000-09-004-008-003-009-05 |  34.6 | 1177.4
12:49:08:febtest:INFO:	26-05 | XA-000-09-004-008-015-009-15 |  31.4 | 1177.4
12:49:09:febtest:INFO:	17-06 | XA-000-09-004-008-003-010-05 |  37.7 | 1165.6
12:49:09:febtest:INFO:	24-07 | XA-000-09-004-008-009-009-10 |  37.7 | 1159.7
12:49:10:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:49:12:ST3_smx:INFO:	chip: 23-0 	 47.250730 C 	 1135.937260 mV
12:49:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:49:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:49:12:ST3_smx:INFO:		Electrons
12:49:12:ST3_smx:INFO:	# loops 0
12:49:14:ST3_smx:INFO:	# loops 1
12:49:16:ST3_smx:INFO:	# loops 2
12:49:18:ST3_smx:INFO:	Total # of broken channels: 0
12:49:18:ST3_smx:INFO:	List of broken channels: []
12:49:18:ST3_smx:INFO:	Total # of broken channels: 0
12:49:18:ST3_smx:INFO:	List of broken channels: []
12:49:20:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1206.851500 mV
12:49:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:49:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:49:20:ST3_smx:INFO:		Electrons
12:49:20:ST3_smx:INFO:	# loops 0
12:49:22:ST3_smx:INFO:	# loops 1
12:49:25:ST3_smx:INFO:	# loops 2
12:49:27:ST3_smx:INFO:	Total # of broken channels: 0
12:49:27:ST3_smx:INFO:	List of broken channels: []
12:49:27:ST3_smx:INFO:	Total # of broken channels: 0
12:49:27:ST3_smx:INFO:	List of broken channels: []
12:49:29:ST3_smx:INFO:	chip: 21-2 	 34.556970 C 	 1183.292940 mV
12:49:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:49:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:49:29:ST3_smx:INFO:		Electrons
12:49:29:ST3_smx:INFO:	# loops 0
12:49:31:ST3_smx:INFO:	# loops 1
12:49:33:ST3_smx:INFO:	# loops 2
12:49:35:ST3_smx:INFO:	Total # of broken channels: 0
12:49:35:ST3_smx:INFO:	List of broken channels: []
12:49:35:ST3_smx:INFO:	Total # of broken channels: 0
12:49:35:ST3_smx:INFO:	List of broken channels: []
12:49:37:ST3_smx:INFO:	chip: 28-3 	 31.389742 C 	 1189.190035 mV
12:49:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:49:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:49:37:ST3_smx:INFO:		Electrons
12:49:37:ST3_smx:INFO:	# loops 0
12:49:39:ST3_smx:INFO:	# loops 1
12:49:41:ST3_smx:INFO:	# loops 2
12:49:43:ST3_smx:INFO:	Total # of broken channels: 0
12:49:43:ST3_smx:INFO:	List of broken channels: []
12:49:43:ST3_smx:INFO:	Total # of broken channels: 0
12:49:43:ST3_smx:INFO:	List of broken channels: []
12:49:45:ST3_smx:INFO:	chip: 19-4 	 34.556970 C 	 1189.190035 mV
12:49:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:49:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:49:45:ST3_smx:INFO:		Electrons
12:49:45:ST3_smx:INFO:	# loops 0
12:49:47:ST3_smx:INFO:	# loops 1
12:49:49:ST3_smx:INFO:	# loops 2
12:49:51:ST3_smx:INFO:	Total # of broken channels: 0
12:49:51:ST3_smx:INFO:	List of broken channels: []
12:49:51:ST3_smx:INFO:	Total # of broken channels: 0
12:49:51:ST3_smx:INFO:	List of broken channels: []
12:49:53:ST3_smx:INFO:	chip: 26-5 	 34.556970 C 	 1189.190035 mV
12:49:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:49:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:49:53:ST3_smx:INFO:		Electrons
12:49:53:ST3_smx:INFO:	# loops 0
12:49:55:ST3_smx:INFO:	# loops 1
12:49:57:ST3_smx:INFO:	# loops 2
12:50:00:ST3_smx:INFO:	Total # of broken channels: 0
12:50:00:ST3_smx:INFO:	List of broken channels: []
12:50:00:ST3_smx:INFO:	Total # of broken channels: 0
12:50:00:ST3_smx:INFO:	List of broken channels: []
12:50:01:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1171.483840 mV
12:50:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:50:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:50:01:ST3_smx:INFO:		Electrons
12:50:01:ST3_smx:INFO:	# loops 0
12:50:03:ST3_smx:INFO:	# loops 1
12:50:05:ST3_smx:INFO:	# loops 2
12:50:08:ST3_smx:INFO:	Total # of broken channels: 0
12:50:08:ST3_smx:INFO:	List of broken channels: []
12:50:08:ST3_smx:INFO:	Total # of broken channels: 0
12:50:08:ST3_smx:INFO:	List of broken channels: []
12:50:09:ST3_smx:INFO:	chip: 24-7 	 40.898880 C 	 1171.483840 mV
12:50:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:50:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:50:09:ST3_smx:INFO:		Electrons
12:50:09:ST3_smx:INFO:	# loops 0
12:50:12:ST3_smx:INFO:	# loops 1
12:50:14:ST3_smx:INFO:	# loops 2
12:50:17:ST3_smx:INFO:	Total # of broken channels: 0
12:50:17:ST3_smx:INFO:	List of broken channels: []
12:50:17:ST3_smx:INFO:	Total # of broken channels: 0
12:50:17:ST3_smx:INFO:	List of broken channels: []
12:50:17:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:50:17:febtest:INFO:	23-00 | XA-000-09-004-008-018-010-04 |  50.4 | 1153.7
12:50:17:febtest:INFO:	30-01 | XA-000-09-004-008-006-009-14 |  31.4 | 1236.2
12:50:18:febtest:INFO:	21-02 | XA-000-09-004-008-015-010-15 |  34.6 | 1201.0
12:50:18:febtest:INFO:	28-03 | XA-000-09-004-008-012-009-01 |  34.6 | 1206.9
12:50:18:febtest:INFO:	19-04 | XA-000-09-004-008-003-009-05 |  37.7 | 1206.9
12:50:18:febtest:INFO:	26-05 | XA-000-09-004-008-015-009-15 |  34.6 | 1206.9
12:50:18:febtest:INFO:	17-06 | XA-000-09-004-008-003-010-05 |  37.7 | 1189.2
12:50:19:febtest:INFO:	24-07 | XA-000-09-004-008-009-009-10 |  40.9 | 1189.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_05_26-12_48_37
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4156| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	11094

MODULE_NAME:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M8UR7T0011260A2

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.3660', '1.850', '2.5440']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9770', '1.850', '2.5940']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9610', '1.850', '0.5211']
Comment.txt