FEB_4157 19.05.25 13:55:24
Info
13:55:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:55:24:ST3_Shared:INFO: FEB-Microcable
13:55:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:55:24:febtest:INFO: Testing FEB with SN 4157
13:55:26:smx_tester:INFO: Scanning setup
13:55:26:elinks:INFO: Disabling clock on downlink 0
13:55:26:elinks:INFO: Disabling clock on downlink 1
13:55:26:elinks:INFO: Disabling clock on downlink 2
13:55:26:elinks:INFO: Disabling clock on downlink 3
13:55:26:elinks:INFO: Disabling clock on downlink 4
13:55:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:55:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:55:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:55:26:elinks:INFO: Disabling clock on downlink 0
13:55:26:elinks:INFO: Disabling clock on downlink 1
13:55:26:elinks:INFO: Disabling clock on downlink 2
13:55:26:elinks:INFO: Disabling clock on downlink 3
13:55:26:elinks:INFO: Disabling clock on downlink 4
13:55:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:55:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:55:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:55:26:elinks:INFO: Disabling clock on downlink 0
13:55:26:elinks:INFO: Disabling clock on downlink 1
13:55:26:elinks:INFO: Disabling clock on downlink 2
13:55:26:elinks:INFO: Disabling clock on downlink 3
13:55:26:elinks:INFO: Disabling clock on downlink 4
13:55:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:55:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:55:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:55:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:55:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:55:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:55:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:55:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:55:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:55:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:55:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:55:26:elinks:INFO: Disabling clock on downlink 0
13:55:26:elinks:INFO: Disabling clock on downlink 1
13:55:26:elinks:INFO: Disabling clock on downlink 2
13:55:26:elinks:INFO: Disabling clock on downlink 3
13:55:26:elinks:INFO: Disabling clock on downlink 4
13:55:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:55:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:55:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:55:26:elinks:INFO: Disabling clock on downlink 0
13:55:26:elinks:INFO: Disabling clock on downlink 1
13:55:26:elinks:INFO: Disabling clock on downlink 2
13:55:26:elinks:INFO: Disabling clock on downlink 3
13:55:26:elinks:INFO: Disabling clock on downlink 4
13:55:26:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:55:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:55:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:55:27:setup_element:INFO: Scanning clock phase
13:55:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:55:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:27:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:55:27:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:55:27:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:55:27:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
13:55:27:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
13:55:27:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:55:27:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:55:27:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:55:27:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:55:27:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
13:55:27:setup_element:INFO: Scanning data phases
13:55:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:55:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:32:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:55:32:setup_element:INFO: Eye window for uplink 24: ____XXXXX_______________________________
Data delay found: 26
13:55:32:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
13:55:32:setup_element:INFO: Eye window for uplink 26: ___XXXXX________________________________
Data delay found: 25
13:55:32:setup_element:INFO: Eye window for uplink 27: _______XXXXXXX__________________________
Data delay found: 30
13:55:32:setup_element:INFO: Eye window for uplink 28: __________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 4
13:55:32:setup_element:INFO: Eye window for uplink 29: ___________XXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 5
13:55:32:setup_element:INFO: Eye window for uplink 30: ___________XXXXXXX______________________
Data delay found: 34
13:55:32:setup_element:INFO: Eye window for uplink 31: ____________XXXXX_______________________
Data delay found: 34
13:55:32:setup_element:INFO: Setting the data phase to 26 for uplink 24
13:55:32:setup_element:INFO: Setting the data phase to 29 for uplink 25
13:55:32:setup_element:INFO: Setting the data phase to 25 for uplink 26
13:55:32:setup_element:INFO: Setting the data phase to 30 for uplink 27
13:55:32:setup_element:INFO: Setting the data phase to 4 for uplink 28
13:55:32:setup_element:INFO: Setting the data phase to 5 for uplink 29
13:55:32:setup_element:INFO: Setting the data phase to 34 for uplink 30
13:55:32:setup_element:INFO: Setting the data phase to 34 for uplink 31
13:55:32:setup_element:INFO: Beginning SMX ASICs map scan
13:55:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:55:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:55:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:55:32:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:55:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:55:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:55:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:55:33:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:55:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:55:33:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:55:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:55:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:55:35:setup_element:INFO: Performing Elink synchronization
13:55:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:55:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:55:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:55:35:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:55:35:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:55:35:febtest:INFO: Init all SMX (CSA): 30
13:55:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:55:43:febtest:INFO: 30-01 | XA-000-09-004-008-005-004-00 | 34.6 | 1153.7
13:55:43:febtest:INFO: 28-03 | XA-000-09-004-008-005-005-00 | 50.4 | 1112.1
13:55:43:febtest:INFO: 26-05 | XA-000-09-004-008-005-006-00 | 44.1 | 1147.8
13:55:43:febtest:INFO: 24-07 | XA-000-09-004-008-008-004-07 | 40.9 | 1147.8
13:55:44:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:55:46:ST3_smx:INFO: chip: 30-1 37.726682 C 1165.571835 mV
13:55:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:46:ST3_smx:INFO: Electrons
13:55:46:ST3_smx:INFO: # loops 0
13:55:48:ST3_smx:INFO: # loops 1
13:55:49:ST3_smx:INFO: # loops 2
13:55:51:ST3_smx:INFO: Total # of broken channels: 0
13:55:51:ST3_smx:INFO: List of broken channels: []
13:55:51:ST3_smx:INFO: Total # of broken channels: 0
13:55:51:ST3_smx:INFO: List of broken channels: []
13:55:53:ST3_smx:INFO: chip: 28-3 50.430383 C 1124.048640 mV
13:55:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:53:ST3_smx:INFO: Electrons
13:55:53:ST3_smx:INFO: # loops 0
13:55:54:ST3_smx:INFO: # loops 1
13:55:56:ST3_smx:INFO: # loops 2
13:55:57:ST3_smx:INFO: Total # of broken channels: 0
13:55:57:ST3_smx:INFO: List of broken channels: []
13:55:57:ST3_smx:INFO: Total # of broken channels: 0
13:55:57:ST3_smx:INFO: List of broken channels: []
13:55:59:ST3_smx:INFO: chip: 26-5 44.073563 C 1159.654860 mV
13:55:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:59:ST3_smx:INFO: Electrons
13:55:59:ST3_smx:INFO: # loops 0
13:56:01:ST3_smx:INFO: # loops 1
13:56:02:ST3_smx:INFO: # loops 2
13:56:04:ST3_smx:INFO: Total # of broken channels: 0
13:56:04:ST3_smx:INFO: List of broken channels: []
13:56:04:ST3_smx:INFO: Total # of broken channels: 0
13:56:04:ST3_smx:INFO: List of broken channels: []
13:56:05:ST3_smx:INFO: chip: 24-7 40.898880 C 1159.654860 mV
13:56:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:56:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:56:05:ST3_smx:INFO: Electrons
13:56:05:ST3_smx:INFO: # loops 0
13:56:07:ST3_smx:INFO: # loops 1
13:56:08:ST3_smx:INFO: # loops 2
13:56:10:ST3_smx:INFO: Total # of broken channels: 0
13:56:10:ST3_smx:INFO: List of broken channels: []
13:56:10:ST3_smx:INFO: Total # of broken channels: 0
13:56:10:ST3_smx:INFO: List of broken channels: []
13:56:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:56:11:febtest:INFO: 30-01 | XA-000-09-004-008-005-004-00 | 37.7 | 1189.2
13:56:11:febtest:INFO: 28-03 | XA-000-09-004-008-005-005-00 | 50.4 | 1147.8
13:56:11:febtest:INFO: 26-05 | XA-000-09-004-008-005-006-00 | 44.1 | 1201.0
13:56:11:febtest:INFO: 24-07 | XA-000-09-004-008-008-004-07 | 40.9 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_05_19-13_55_24
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4157| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7932', '1.850', '1.3680']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0130', '1.850', '1.3060']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9962', '1.850', '0.2723']