FEB_4159 29.04.25 08:54:02
Info
08:54:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:54:02:ST3_Shared:INFO: FEB-Microcable
08:54:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:54:02:febtest:INFO: Testing FEB with SN 4159
08:54:03:smx_tester:INFO: Scanning setup
08:54:03:elinks:INFO: Disabling clock on downlink 0
08:54:03:elinks:INFO: Disabling clock on downlink 1
08:54:03:elinks:INFO: Disabling clock on downlink 2
08:54:03:elinks:INFO: Disabling clock on downlink 3
08:54:03:elinks:INFO: Disabling clock on downlink 4
08:54:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:54:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:04:elinks:INFO: Disabling clock on downlink 0
08:54:04:elinks:INFO: Disabling clock on downlink 1
08:54:04:elinks:INFO: Disabling clock on downlink 2
08:54:04:elinks:INFO: Disabling clock on downlink 3
08:54:04:elinks:INFO: Disabling clock on downlink 4
08:54:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:54:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:04:elinks:INFO: Disabling clock on downlink 0
08:54:04:elinks:INFO: Disabling clock on downlink 1
08:54:04:elinks:INFO: Disabling clock on downlink 2
08:54:04:elinks:INFO: Disabling clock on downlink 3
08:54:04:elinks:INFO: Disabling clock on downlink 4
08:54:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:54:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:54:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:54:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:54:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:54:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:54:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:54:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:54:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:04:elinks:INFO: Disabling clock on downlink 0
08:54:04:elinks:INFO: Disabling clock on downlink 1
08:54:04:elinks:INFO: Disabling clock on downlink 2
08:54:04:elinks:INFO: Disabling clock on downlink 3
08:54:04:elinks:INFO: Disabling clock on downlink 4
08:54:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:54:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:04:elinks:INFO: Disabling clock on downlink 0
08:54:04:elinks:INFO: Disabling clock on downlink 1
08:54:04:elinks:INFO: Disabling clock on downlink 2
08:54:04:elinks:INFO: Disabling clock on downlink 3
08:54:04:elinks:INFO: Disabling clock on downlink 4
08:54:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:54:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:04:setup_element:INFO: Scanning clock phase
08:54:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:04:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:54:04:setup_element:INFO: Eye window for uplink 24: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
08:54:04:setup_element:INFO: Eye window for uplink 25: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
08:54:04:setup_element:INFO: Eye window for uplink 26: XX______________________________________________________________________________
Clock Delay: 40
08:54:04:setup_element:INFO: Eye window for uplink 27: XX______________________________________________________________________________
Clock Delay: 40
08:54:04:setup_element:INFO: Eye window for uplink 28: XXX_______________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 34
08:54:04:setup_element:INFO: Eye window for uplink 29: XXX_______________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 34
08:54:04:setup_element:INFO: Eye window for uplink 30: XXX_____________________________________________________________XXXXXXXXXXXXXXXX
Clock Delay: 33
08:54:04:setup_element:INFO: Eye window for uplink 31: XXX_____________________________________________________________XXXXXXXXXXXXXXXX
Clock Delay: 33
08:54:04:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
08:54:04:setup_element:INFO: Scanning data phases
08:54:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:09:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:54:09:setup_element:INFO: Eye window for uplink 24: _XXXXXXXXX______________________________
Data delay found: 25
08:54:10:setup_element:INFO: Eye window for uplink 25: ____XXXXXXXX____________________________
Data delay found: 27
08:54:10:setup_element:INFO: Eye window for uplink 26: XXXXXXXX____________XXXXXXXXXXXXXXXXXXXX
Data delay found: 13
08:54:10:setup_element:INFO: Eye window for uplink 27: __XXXXXXXXXX________XXXXXXXXXXXXXXXXXXXX
Data delay found: 15
08:54:10:setup_element:INFO: Eye window for uplink 28: _______XXXXXXXXX________________________
Data delay found: 31
08:54:10:setup_element:INFO: Eye window for uplink 29: __________XXXXXXXXX_____________________
Data delay found: 34
08:54:10:setup_element:INFO: Eye window for uplink 30: _____XXXXXXXXXXX_________________XXXXX__
Data delay found: 24
08:54:10:setup_element:INFO: Eye window for uplink 31: ______XXXXXXXXXX_________________XXXXX__
Data delay found: 24
08:54:10:setup_element:INFO: Setting the data phase to 25 for uplink 24
08:54:10:setup_element:INFO: Setting the data phase to 27 for uplink 25
08:54:10:setup_element:INFO: Setting the data phase to 13 for uplink 26
08:54:10:setup_element:INFO: Setting the data phase to 15 for uplink 27
08:54:10:setup_element:INFO: Setting the data phase to 31 for uplink 28
08:54:10:setup_element:INFO: Setting the data phase to 34 for uplink 29
08:54:10:setup_element:INFO: Setting the data phase to 24 for uplink 30
08:54:10:setup_element:INFO: Setting the data phase to 24 for uplink 31
08:54:10:setup_element:INFO: Beginning SMX ASICs map scan
08:54:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:54:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:54:10:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:54:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:54:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:54:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:54:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:54:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:54:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:54:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:54:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:54:12:setup_element:INFO: Performing Elink synchronization
08:54:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:54:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:54:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:54:12:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:54:13:febtest:INFO: Init all SMX (CSA): 30
08:54:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:54:20:febtest:INFO: 30-01 | XA-000-09-004-020-012-003-10 | 40.9 | 1141.9
08:54:21:febtest:INFO: 28-03 | XA-000-09-004-020-012-004-10 | 40.9 | 1165.6
08:54:21:febtest:INFO: 26-05 | XA-000-09-004-020-006-006-05 | 34.6 | 1171.5
08:54:21:febtest:INFO: 24-07 | XA-000-09-004-020-009-002-01 | 47.3 | 1135.9
08:54:22:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:54:24:ST3_smx:INFO: chip: 30-1 40.898880 C 1147.806000 mV
08:54:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:24:ST3_smx:INFO: Electrons
08:54:24:ST3_smx:INFO: # loops 0
08:54:26:ST3_smx:INFO: # loops 1
08:54:28:ST3_smx:INFO: # loops 2
08:54:29:ST3_smx:INFO: Total # of broken channels: 0
08:54:29:ST3_smx:INFO: List of broken channels: []
08:54:29:ST3_smx:INFO: Total # of broken channels: 0
08:54:29:ST3_smx:INFO: List of broken channels: []
08:54:31:ST3_smx:INFO: chip: 28-3 37.726682 C 1171.483840 mV
08:54:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:31:ST3_smx:INFO: Electrons
08:54:31:ST3_smx:INFO: # loops 0
08:54:33:ST3_smx:INFO: # loops 1
08:54:34:ST3_smx:INFO: # loops 2
08:54:36:ST3_smx:INFO: Total # of broken channels: 0
08:54:36:ST3_smx:INFO: List of broken channels: []
08:54:36:ST3_smx:INFO: Total # of broken channels: 0
08:54:36:ST3_smx:INFO: List of broken channels: []
08:54:38:ST3_smx:INFO: chip: 26-5 34.556970 C 1177.390875 mV
08:54:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:38:ST3_smx:INFO: Electrons
08:54:38:ST3_smx:INFO: # loops 0
08:54:39:ST3_smx:INFO: # loops 1
08:54:41:ST3_smx:INFO: # loops 2
08:54:43:ST3_smx:INFO: Total # of broken channels: 0
08:54:43:ST3_smx:INFO: List of broken channels: []
08:54:43:ST3_smx:INFO: Total # of broken channels: 0
08:54:43:ST3_smx:INFO: List of broken channels: []
08:54:44:ST3_smx:INFO: chip: 24-7 47.250730 C 1141.874115 mV
08:54:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:44:ST3_smx:INFO: Electrons
08:54:44:ST3_smx:INFO: # loops 0
08:54:46:ST3_smx:INFO: # loops 1
08:54:48:ST3_smx:INFO: # loops 2
08:54:49:ST3_smx:INFO: Total # of broken channels: 0
08:54:49:ST3_smx:INFO: List of broken channels: []
08:54:49:ST3_smx:INFO: Total # of broken channels: 0
08:54:49:ST3_smx:INFO: List of broken channels: []
08:54:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:54:50:febtest:INFO: 30-01 | XA-000-09-004-020-012-003-10 | 40.9 | 1171.5
08:54:50:febtest:INFO: 28-03 | XA-000-09-004-020-012-004-10 | 37.7 | 1224.5
08:54:50:febtest:INFO: 26-05 | XA-000-09-004-020-006-006-05 | 37.7 | 1206.9
08:54:50:febtest:INFO: 24-07 | XA-000-09-004-020-009-002-01 | 47.3 | 1159.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_04_29-08_54_02
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4159| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '0.8404', '1.850', '1.0320']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0250', '1.850', '1.3210']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0020', '1.850', '0.2737']