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FEB_4161 20.05.25 13:58:32
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13:58:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:58:32:ST3_Shared:INFO: FEB-Microcable
13:58:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:58:32:febtest:INFO: Testing FEB with SN 4161
13:58:34:smx_tester:INFO: Scanning setup
13:58:34:elinks:INFO: Disabling clock on downlink 0
13:58:34:elinks:INFO: Disabling clock on downlink 1
13:58:34:elinks:INFO: Disabling clock on downlink 2
13:58:34:elinks:INFO: Disabling clock on downlink 3
13:58:34:elinks:INFO: Disabling clock on downlink 4
13:58:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:58:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:58:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:58:34:elinks:INFO: Disabling clock on downlink 0
13:58:34:elinks:INFO: Disabling clock on downlink 1
13:58:34:elinks:INFO: Disabling clock on downlink 2
13:58:34:elinks:INFO: Disabling clock on downlink 3
13:58:34:elinks:INFO: Disabling clock on downlink 4
13:58:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:58:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:58:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:58:34:elinks:INFO: Disabling clock on downlink 0
13:58:34:elinks:INFO: Disabling clock on downlink 1
13:58:34:elinks:INFO: Disabling clock on downlink 2
13:58:34:elinks:INFO: Disabling clock on downlink 3
13:58:34:elinks:INFO: Disabling clock on downlink 4
13:58:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:58:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:58:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:58:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:58:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:58:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:58:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:58:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:58:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:58:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:58:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:58:34:elinks:INFO: Disabling clock on downlink 0
13:58:34:elinks:INFO: Disabling clock on downlink 1
13:58:34:elinks:INFO: Disabling clock on downlink 2
13:58:34:elinks:INFO: Disabling clock on downlink 3
13:58:34:elinks:INFO: Disabling clock on downlink 4
13:58:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:58:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:58:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:58:34:elinks:INFO: Disabling clock on downlink 0
13:58:34:elinks:INFO: Disabling clock on downlink 1
13:58:34:elinks:INFO: Disabling clock on downlink 2
13:58:34:elinks:INFO: Disabling clock on downlink 3
13:58:34:elinks:INFO: Disabling clock on downlink 4
13:58:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:58:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:58:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:58:35:setup_element:INFO: Scanning clock phase
13:58:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:58:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:58:35:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:58:35:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:58:35:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:58:35:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
13:58:35:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
13:58:35:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXX____
Clock Delay: 33
13:58:35:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXX____
Clock Delay: 33
13:58:35:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXX____
Clock Delay: 33
13:58:35:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXX____
Clock Delay: 33
13:58:35:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
13:58:35:setup_element:INFO: Scanning data phases
13:58:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:58:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:58:40:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:58:40:setup_element:INFO: Eye window for uplink 24: _____XXXXX____________XXXXXXXX__________
Data delay found: 37
13:58:40:setup_element:INFO: Eye window for uplink 25: ________XXXX__________XXXXXXXX__________
Data delay found: 38
13:58:40:setup_element:INFO: Eye window for uplink 26: ____XXXXX_______________________________
Data delay found: 26
13:58:40:setup_element:INFO: Eye window for uplink 27: ________XXXXXXX_________________________
Data delay found: 31
13:58:40:setup_element:INFO: Eye window for uplink 28: _________XXXXX__________________________
Data delay found: 31
13:58:40:setup_element:INFO: Eye window for uplink 29: ___________XXXXXX_______________________
Data delay found: 33
13:58:40:setup_element:INFO: Eye window for uplink 30: __________XXXXXX________________________
Data delay found: 32
13:58:40:setup_element:INFO: Eye window for uplink 31: ___________XXXXX________________________
Data delay found: 33
13:58:40:setup_element:INFO: Setting the data phase to 37 for uplink 24
13:58:40:setup_element:INFO: Setting the data phase to 38 for uplink 25
13:58:40:setup_element:INFO: Setting the data phase to 26 for uplink 26
13:58:40:setup_element:INFO: Setting the data phase to 31 for uplink 27
13:58:40:setup_element:INFO: Setting the data phase to 31 for uplink 28
13:58:40:setup_element:INFO: Setting the data phase to 33 for uplink 29
13:58:40:setup_element:INFO: Setting the data phase to 32 for uplink 30
13:58:40:setup_element:INFO: Setting the data phase to 33 for uplink 31
13:58:40:setup_element:INFO: Beginning SMX ASICs map scan
13:58:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:58:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:58:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:58:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:58:40:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:58:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:58:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:58:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:58:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:58:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:58:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:58:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:58:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:58:43:setup_element:INFO: Performing Elink synchronization
13:58:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:58:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:58:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:58:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:58:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:58:43:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:58:43:febtest:INFO: Init all SMX (CSA): 30
13:58:52:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:58:52:febtest:INFO: 30-01 | XA-000-09-004-008-011-018-14 | 37.7 | 1141.9
13:58:53:febtest:INFO: 28-03 | XA-000-09-004-008-014-018-05 | 31.4 | 1165.6
13:58:53:febtest:INFO: 26-05 | XA-000-09-004-008-004-009-13 | 37.7 | 1159.7
13:58:53:febtest:INFO: 24-07 | XA-000-09-004-008-005-018-07 | 44.1 | 1124.0
13:58:54:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:58:56:ST3_smx:INFO: chip: 30-1 37.726682 C 1153.732915 mV
13:58:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:58:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:58:56:ST3_smx:INFO: Electrons
13:58:56:ST3_smx:INFO: # loops 0
13:58:58:ST3_smx:INFO: # loops 1
13:59:00:ST3_smx:INFO: # loops 2
13:59:02:ST3_smx:INFO: Total # of broken channels: 0
13:59:02:ST3_smx:INFO: List of broken channels: []
13:59:02:ST3_smx:INFO: Total # of broken channels: 0
13:59:02:ST3_smx:INFO: List of broken channels: []
13:59:04:ST3_smx:INFO: chip: 28-3 31.389742 C 1177.390875 mV
13:59:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:04:ST3_smx:INFO: Electrons
13:59:04:ST3_smx:INFO: # loops 0
13:59:06:ST3_smx:INFO: # loops 1
13:59:09:ST3_smx:INFO: # loops 2
13:59:11:ST3_smx:INFO: Total # of broken channels: 0
13:59:11:ST3_smx:INFO: List of broken channels: []
13:59:11:ST3_smx:INFO: Total # of broken channels: 0
13:59:11:ST3_smx:INFO: List of broken channels: []
13:59:12:ST3_smx:INFO: chip: 26-5 37.726682 C 1171.483840 mV
13:59:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:12:ST3_smx:INFO: Electrons
13:59:12:ST3_smx:INFO: # loops 0
13:59:14:ST3_smx:INFO: # loops 1
13:59:17:ST3_smx:INFO: # loops 2
13:59:19:ST3_smx:INFO: Total # of broken channels: 0
13:59:19:ST3_smx:INFO: List of broken channels: []
13:59:19:ST3_smx:INFO: Total # of broken channels: 0
13:59:19:ST3_smx:INFO: List of broken channels: []
13:59:20:ST3_smx:INFO: chip: 24-7 44.073563 C 1129.995435 mV
13:59:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:20:ST3_smx:INFO: Electrons
13:59:20:ST3_smx:INFO: # loops 0
13:59:22:ST3_smx:INFO: # loops 1
13:59:25:ST3_smx:INFO: # loops 2
13:59:27:ST3_smx:INFO: Total # of broken channels: 0
13:59:27:ST3_smx:INFO: List of broken channels: []
13:59:27:ST3_smx:INFO: Total # of broken channels: 0
13:59:27:ST3_smx:INFO: List of broken channels: []
13:59:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:59:27:febtest:INFO: 30-01 | XA-000-09-004-008-011-018-14 | 37.7 | 1177.4
13:59:27:febtest:INFO: 28-03 | XA-000-09-004-008-014-018-05 | 34.6 | 1201.0
13:59:28:febtest:INFO: 26-05 | XA-000-09-004-008-004-009-13 | 37.7 | 1206.9
13:59:28:febtest:INFO: 24-07 | XA-000-09-004-008-005-018-07 | 47.3 | 1153.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_05_20-13_58_32
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4161| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9486', '1.850', '1.1080']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0120', '1.850', '1.2670']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9948', '1.850', '0.2695']