
FEB_4163 23.05.25 09:01:29
TextEdit.txt
09:01:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:01:29:ST3_Shared:INFO: FEB-Microcable 09:01:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:01:29:febtest:INFO: Testing FEB with SN 4163 09:01:31:smx_tester:INFO: Scanning setup 09:01:31:elinks:INFO: Disabling clock on downlink 0 09:01:31:elinks:INFO: Disabling clock on downlink 1 09:01:31:elinks:INFO: Disabling clock on downlink 2 09:01:31:elinks:INFO: Disabling clock on downlink 3 09:01:31:elinks:INFO: Disabling clock on downlink 4 09:01:31:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:01:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:01:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:01:31:elinks:INFO: Disabling clock on downlink 0 09:01:31:elinks:INFO: Disabling clock on downlink 1 09:01:31:elinks:INFO: Disabling clock on downlink 2 09:01:31:elinks:INFO: Disabling clock on downlink 3 09:01:31:elinks:INFO: Disabling clock on downlink 4 09:01:31:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:01:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:01:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:01:31:elinks:INFO: Disabling clock on downlink 0 09:01:31:elinks:INFO: Disabling clock on downlink 1 09:01:31:elinks:INFO: Disabling clock on downlink 2 09:01:31:elinks:INFO: Disabling clock on downlink 3 09:01:31:elinks:INFO: Disabling clock on downlink 4 09:01:31:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:01:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:01:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:01:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:01:31:elinks:INFO: Disabling clock on downlink 0 09:01:31:elinks:INFO: Disabling clock on downlink 1 09:01:31:elinks:INFO: Disabling clock on downlink 2 09:01:31:elinks:INFO: Disabling clock on downlink 3 09:01:31:elinks:INFO: Disabling clock on downlink 4 09:01:32:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:01:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:01:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:01:32:elinks:INFO: Disabling clock on downlink 0 09:01:32:elinks:INFO: Disabling clock on downlink 1 09:01:32:elinks:INFO: Disabling clock on downlink 2 09:01:32:elinks:INFO: Disabling clock on downlink 3 09:01:32:elinks:INFO: Disabling clock on downlink 4 09:01:32:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:01:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:01:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:01:32:setup_element:INFO: Scanning clock phase 09:01:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:01:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:01:32:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:01:32:setup_element:INFO: Eye window for uplink 16: ___________________________________________________________________________XXXX_ Clock Delay: 36 09:01:32:setup_element:INFO: Eye window for uplink 17: ___________________________________________________________________________XXXX_ Clock Delay: 36 09:01:32:setup_element:INFO: Eye window for uplink 18: __________________________________________________________________________XXXXX_ Clock Delay: 36 09:01:32:setup_element:INFO: Eye window for uplink 19: __________________________________________________________________________XXXXX_ Clock Delay: 36 09:01:32:setup_element:INFO: Eye window for uplink 20: _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:01:32:setup_element:INFO: Eye window for uplink 21: _________________________________________________________________________XXXXXX_ Clock Delay: 35 09:01:32:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:01:32:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:01:32:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________XXXXXX__ Clock Delay: 34 09:01:32:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________XXXXXX__ Clock Delay: 34 09:01:32:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________________XXXXX__ Clock Delay: 35 09:01:32:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________________XXXXX__ Clock Delay: 35 09:01:32:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________________XXXXX__ Clock Delay: 35 09:01:32:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________________XXXXX__ Clock Delay: 35 09:01:32:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________________XXXX_ Clock Delay: 36 09:01:32:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________________XXXX_ Clock Delay: 36 09:01:32:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 09:01:32:setup_element:INFO: Scanning data phases 09:01:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:01:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:01:37:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:01:37:setup_element:INFO: Eye window for uplink 16: XXX________________________________XXXXX Data delay found: 18 09:01:37:setup_element:INFO: Eye window for uplink 17: _________________________________XXXXX__ Data delay found: 15 09:01:37:setup_element:INFO: Eye window for uplink 18: ___________________________________XXXXX Data delay found: 17 09:01:37:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXX___ Data delay found: 14 09:01:37:setup_element:INFO: Eye window for uplink 20: ________________________________XXXXXX__ Data delay found: 14 09:01:37:setup_element:INFO: Eye window for uplink 21: _______________________________XXXXXX___ Data delay found: 13 09:01:37:setup_element:INFO: Eye window for uplink 22: _________________________________XXXX___ Data delay found: 14 09:01:37:setup_element:INFO: Eye window for uplink 23: ____________________________XXXX________ Data delay found: 9 09:01:37:setup_element:INFO: Eye window for uplink 24: ____XXXXXX______________________________ Data delay found: 26 09:01:37:setup_element:INFO: Eye window for uplink 25: _______XXXXXX___________________________ Data delay found: 29 09:01:37:setup_element:INFO: Eye window for uplink 26: _____XXXXXX_____________________________ Data delay found: 27 09:01:37:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________ Data delay found: 32 09:01:37:setup_element:INFO: Eye window for uplink 28: __________XXXXX_________________________ Data delay found: 32 09:01:37:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________ Data delay found: 35 09:01:37:setup_element:INFO: Eye window for uplink 30: ____________XXXXXXX_____________________ Data delay found: 35 09:01:37:setup_element:INFO: Eye window for uplink 31: ______________XXXX______________________ Data delay found: 35 09:01:37:setup_element:INFO: Setting the data phase to 18 for uplink 16 09:01:37:setup_element:INFO: Setting the data phase to 15 for uplink 17 09:01:37:setup_element:INFO: Setting the data phase to 17 for uplink 18 09:01:37:setup_element:INFO: Setting the data phase to 14 for uplink 19 09:01:37:setup_element:INFO: Setting the data phase to 14 for uplink 20 09:01:37:setup_element:INFO: Setting the data phase to 13 for uplink 21 09:01:37:setup_element:INFO: Setting the data phase to 14 for uplink 22 09:01:37:setup_element:INFO: Setting the data phase to 9 for uplink 23 09:01:37:setup_element:INFO: Setting the data phase to 26 for uplink 24 09:01:37:setup_element:INFO: Setting the data phase to 29 for uplink 25 09:01:37:setup_element:INFO: Setting the data phase to 27 for uplink 26 09:01:37:setup_element:INFO: Setting the data phase to 32 for uplink 27 09:01:37:setup_element:INFO: Setting the data phase to 32 for uplink 28 09:01:37:setup_element:INFO: Setting the data phase to 35 for uplink 29 09:01:37:setup_element:INFO: Setting the data phase to 35 for uplink 30 09:01:37:setup_element:INFO: Setting the data phase to 35 for uplink 31 09:01:37:setup_element:INFO: Beginning SMX ASICs map scan 09:01:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:01:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:01:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:01:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:01:38:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 09:01:38:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 09:01:38:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 09:01:38:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:01:38:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:01:38:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 09:01:38:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 09:01:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:01:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:01:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 09:01:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 09:01:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:01:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:01:39:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 09:01:39:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 09:01:39:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:01:39:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:01:40:setup_element:INFO: Performing Elink synchronization 09:01:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:01:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:01:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:01:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:01:40:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:01:40:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 09:01:41:febtest:INFO: Init all SMX (CSA): 30 09:02:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:02:00:febtest:INFO: 23-00 | XA-000-09-004-008-014-012-02 | 31.4 | 1165.6 09:02:00:febtest:INFO: 30-01 | XA-000-09-004-008-017-012-10 | 37.7 | 1141.9 09:02:01:febtest:INFO: 21-02 | XA-000-09-004-008-011-011-09 | 37.7 | 1147.8 09:02:01:febtest:INFO: 28-03 | XA-000-09-004-008-005-012-00 | 31.4 | 1177.4 09:02:01:febtest:INFO: 19-04 | XA-000-09-004-008-008-013-07 | 25.1 | 1206.9 09:02:01:febtest:INFO: 26-05 | XA-000-09-004-008-002-012-08 | 34.6 | 1165.6 09:02:01:febtest:INFO: 17-06 | XA-000-09-004-008-005-013-00 | 40.9 | 1135.9 09:02:02:febtest:INFO: 24-07 | XA-000-09-004-008-008-014-07 | 40.9 | 1141.9 09:02:03:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 09:02:05:ST3_smx:INFO: chip: 23-0 31.389742 C 1183.292940 mV 09:02:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:05:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:05:ST3_smx:INFO: Electrons 09:02:05:ST3_smx:INFO: # loops 0 09:02:07:ST3_smx:INFO: # loops 1 09:02:09:ST3_smx:INFO: # loops 2 09:02:11:ST3_smx:INFO: Total # of broken channels: 1 09:02:11:ST3_smx:INFO: List of broken channels: [57] 09:02:11:ST3_smx:INFO: Total # of broken channels: 0 09:02:11:ST3_smx:INFO: List of broken channels: [] 09:02:13:ST3_smx:INFO: chip: 30-1 37.726682 C 1153.732915 mV 09:02:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:13:ST3_smx:INFO: Electrons 09:02:13:ST3_smx:INFO: # loops 0 09:02:15:ST3_smx:INFO: # loops 1 09:02:17:ST3_smx:INFO: # loops 2 09:02:19:ST3_smx:INFO: Total # of broken channels: 0 09:02:19:ST3_smx:INFO: List of broken channels: [] 09:02:19:ST3_smx:INFO: Total # of broken channels: 0 09:02:19:ST3_smx:INFO: List of broken channels: [] 09:02:21:ST3_smx:INFO: chip: 21-2 40.898880 C 1159.654860 mV 09:02:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:21:ST3_smx:INFO: Electrons 09:02:21:ST3_smx:INFO: # loops 0 09:02:23:ST3_smx:INFO: # loops 1 09:02:25:ST3_smx:INFO: # loops 2 09:02:27:ST3_smx:INFO: Total # of broken channels: 0 09:02:27:ST3_smx:INFO: List of broken channels: [] 09:02:27:ST3_smx:INFO: Total # of broken channels: 0 09:02:27:ST3_smx:INFO: List of broken channels: [] 09:02:29:ST3_smx:INFO: chip: 28-3 31.389742 C 1189.190035 mV 09:02:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:29:ST3_smx:INFO: Electrons 09:02:29:ST3_smx:INFO: # loops 0 09:02:31:ST3_smx:INFO: # loops 1 09:02:33:ST3_smx:INFO: # loops 2 09:02:35:ST3_smx:INFO: Total # of broken channels: 0 09:02:35:ST3_smx:INFO: List of broken channels: [] 09:02:35:ST3_smx:INFO: Total # of broken channels: 0 09:02:35:ST3_smx:INFO: List of broken channels: [] 09:02:37:ST3_smx:INFO: chip: 19-4 25.062742 C 1212.728715 mV 09:02:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:37:ST3_smx:INFO: Electrons 09:02:37:ST3_smx:INFO: # loops 0 09:02:39:ST3_smx:INFO: # loops 1 09:02:41:ST3_smx:INFO: # loops 2 09:02:43:ST3_smx:INFO: Total # of broken channels: 0 09:02:43:ST3_smx:INFO: List of broken channels: [] 09:02:43:ST3_smx:INFO: Total # of broken channels: 0 09:02:43:ST3_smx:INFO: List of broken channels: [] 09:02:44:ST3_smx:INFO: chip: 26-5 37.726682 C 1183.292940 mV 09:02:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:44:ST3_smx:INFO: Electrons 09:02:44:ST3_smx:INFO: # loops 0 09:02:47:ST3_smx:INFO: # loops 1 09:02:49:ST3_smx:INFO: # loops 2 09:02:51:ST3_smx:INFO: Total # of broken channels: 0 09:02:51:ST3_smx:INFO: List of broken channels: [] 09:02:51:ST3_smx:INFO: Total # of broken channels: 0 09:02:51:ST3_smx:INFO: List of broken channels: [] 09:02:52:ST3_smx:INFO: chip: 17-6 44.073563 C 1147.806000 mV 09:02:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:52:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:02:52:ST3_smx:INFO: Electrons 09:02:52:ST3_smx:INFO: # loops 0 09:02:54:ST3_smx:INFO: # loops 1 09:02:57:ST3_smx:INFO: # loops 2 09:02:59:ST3_smx:INFO: Total # of broken channels: 0 09:02:59:ST3_smx:INFO: List of broken channels: [] 09:02:59:ST3_smx:INFO: Total # of broken channels: 0 09:02:59:ST3_smx:INFO: List of broken channels: [] 09:03:00:ST3_smx:INFO: chip: 24-7 44.073563 C 1153.732915 mV 09:03:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:03:00:ST3_smx:INFO: Electrons 09:03:00:ST3_smx:INFO: # loops 0 09:03:03:ST3_smx:INFO: # loops 1 09:03:05:ST3_smx:INFO: # loops 2 09:03:07:ST3_smx:INFO: Total # of broken channels: 0 09:03:07:ST3_smx:INFO: List of broken channels: [] 09:03:07:ST3_smx:INFO: Total # of broken channels: 0 09:03:07:ST3_smx:INFO: List of broken channels: [] 09:03:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:03:07:febtest:INFO: 23-00 | XA-000-09-004-008-014-012-02 | 34.6 | 1206.9 09:03:07:febtest:INFO: 30-01 | XA-000-09-004-008-017-012-10 | 40.9 | 1171.5 09:03:08:febtest:INFO: 21-02 | XA-000-09-004-008-011-011-09 | 40.9 | 1177.4 09:03:08:febtest:INFO: 28-03 | XA-000-09-004-008-005-012-00 | 34.6 | 1212.7 09:03:08:febtest:INFO: 19-04 | XA-000-09-004-008-008-013-07 | 28.2 | 1236.2 09:03:08:febtest:INFO: 26-05 | XA-000-09-004-008-002-012-08 | 37.7 | 1212.7 09:03:08:febtest:INFO: 17-06 | XA-000-09-004-008-005-013-00 | 44.1 | 1171.5 09:03:09:febtest:INFO: 24-07 | XA-000-09-004-008-008-014-07 | 44.1 | 1177.4 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_05_23-09_01_29 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4163| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '1.5640', '1.850', '2.6350'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0160', '1.849', '2.5590'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9670', '1.850', '0.5271']