DTL-STS tests database

FEB_4164 26.05.25 13:31:39

link: XA-000-09-004-008-011-020-14
...SMX_0.root
link: XA-000-09-004-008-014-022-05
...SMX_2.root
link: XA-000-09-004-008-008-022-00
...SMX_4.root
link: XA-000-09-004-008-011-010-09
...SMX_6.root
link: XA-000-09-004-008-005-023-07
...SMX_1.root
link: XA-000-09-004-008-008-020-00
...SMX_3.root
link: XA-000-09-004-008-017-021-13
...SMX_5.root
link: XA-000-09-004-008-005-022-07
...SMX_7.root
link: XA-000-09-004-008-005-022-07
...VddmCSAstatus.root
Info
            13:31:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:31:39:ST3_Shared:INFO:	                       FEB-Microcable                       
13:31:39:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:31:40:febtest:INFO:	Testing FEB with SN 4164
13:31:41:smx_tester:INFO:	Scanning setup
13:31:41:elinks:INFO:	Disabling clock on downlink 0
13:31:41:elinks:INFO:	Disabling clock on downlink 1
13:31:41:elinks:INFO:	Disabling clock on downlink 2
13:31:41:elinks:INFO:	Disabling clock on downlink 3
13:31:41:elinks:INFO:	Disabling clock on downlink 4
13:31:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:31:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:41:elinks:INFO:	Disabling clock on downlink 0
13:31:41:elinks:INFO:	Disabling clock on downlink 1
13:31:41:elinks:INFO:	Disabling clock on downlink 2
13:31:41:elinks:INFO:	Disabling clock on downlink 3
13:31:41:elinks:INFO:	Disabling clock on downlink 4
13:31:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:31:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:41:elinks:INFO:	Disabling clock on downlink 0
13:31:41:elinks:INFO:	Disabling clock on downlink 1
13:31:41:elinks:INFO:	Disabling clock on downlink 2
13:31:41:elinks:INFO:	Disabling clock on downlink 3
13:31:41:elinks:INFO:	Disabling clock on downlink 4
13:31:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:31:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:31:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:42:elinks:INFO:	Disabling clock on downlink 0
13:31:42:elinks:INFO:	Disabling clock on downlink 1
13:31:42:elinks:INFO:	Disabling clock on downlink 2
13:31:42:elinks:INFO:	Disabling clock on downlink 3
13:31:42:elinks:INFO:	Disabling clock on downlink 4
13:31:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:31:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:42:elinks:INFO:	Disabling clock on downlink 0
13:31:42:elinks:INFO:	Disabling clock on downlink 1
13:31:42:elinks:INFO:	Disabling clock on downlink 2
13:31:42:elinks:INFO:	Disabling clock on downlink 3
13:31:42:elinks:INFO:	Disabling clock on downlink 4
13:31:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:31:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:31:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:31:42:setup_element:INFO:	Scanning clock phase
13:31:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:42:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:31:42:setup_element:INFO:	Eye window for uplink 16: __________________________________________________________________________XXXX__
Clock Delay: 35
13:31:42:setup_element:INFO:	Eye window for uplink 17: __________________________________________________________________________XXXX__
Clock Delay: 35
13:31:42:setup_element:INFO:	Eye window for uplink 18: __________________________________________________________________________XXXXXX
Clock Delay: 36
13:31:42:setup_element:INFO:	Eye window for uplink 19: __________________________________________________________________________XXXXXX
Clock Delay: 36
13:31:42:setup_element:INFO:	Eye window for uplink 20: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:31:42:setup_element:INFO:	Eye window for uplink 21: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:31:42:setup_element:INFO:	Eye window for uplink 22: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:31:42:setup_element:INFO:	Eye window for uplink 23: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:31:42:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:31:42:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:31:42:setup_element:INFO:	Eye window for uplink 26: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:31:42:setup_element:INFO:	Eye window for uplink 27: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:31:42:setup_element:INFO:	Eye window for uplink 28: __________________________________________________________________________XXXXXX
Clock Delay: 36
13:31:42:setup_element:INFO:	Eye window for uplink 29: __________________________________________________________________________XXXXXX
Clock Delay: 36
13:31:42:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________________XXXXX
Clock Delay: 37
13:31:42:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________________XXXXX
Clock Delay: 37
13:31:42:setup_element:INFO:	Setting the clock phase to 36 for group 0, downlink 2
13:31:42:setup_element:INFO:	Scanning data phases
13:31:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:47:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:31:47:setup_element:INFO:	Eye window for uplink 16: ________________________________XXXXXX__
Data delay found: 14
13:31:47:setup_element:INFO:	Eye window for uplink 17: _____________________________XXXXX______
Data delay found: 11
13:31:47:setup_element:INFO:	Eye window for uplink 18: ________________________________XXXXXX__
Data delay found: 14
13:31:47:setup_element:INFO:	Eye window for uplink 19: _____________________________XXXXXX_____
Data delay found: 11
13:31:47:setup_element:INFO:	Eye window for uplink 20: ________________________________XXXXX___
Data delay found: 14
13:31:47:setup_element:INFO:	Eye window for uplink 21: _______________________________XXXX_____
Data delay found: 12
13:31:47:setup_element:INFO:	Eye window for uplink 22: ________________________________XXXXXX__
Data delay found: 14
13:31:47:setup_element:INFO:	Eye window for uplink 23: ____________________________XXXXX_______
Data delay found: 10
13:31:47:setup_element:INFO:	Eye window for uplink 24: ___XXXXXX_______________________________
Data delay found: 25
13:31:47:setup_element:INFO:	Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
13:31:47:setup_element:INFO:	Eye window for uplink 26: ___XXXXXX_______________________________
Data delay found: 25
13:31:47:setup_element:INFO:	Eye window for uplink 27: ________XXXXXX__________________________
Data delay found: 30
13:31:47:setup_element:INFO:	Eye window for uplink 28: ________XXXXXX__________________________
Data delay found: 30
13:31:47:setup_element:INFO:	Eye window for uplink 29: ___________XXXXXX_______________________
Data delay found: 33
13:31:47:setup_element:INFO:	Eye window for uplink 30: _____________XXXXXXX________XXXXXXXXXXXX
Data delay found: 6
13:31:47:setup_element:INFO:	Eye window for uplink 31: ______________XXXXX_________XXXXXXXXXXXX
Data delay found: 6
13:31:47:setup_element:INFO:	Setting the data phase to 14 for uplink 16
13:31:47:setup_element:INFO:	Setting the data phase to 11 for uplink 17
13:31:47:setup_element:INFO:	Setting the data phase to 14 for uplink 18
13:31:47:setup_element:INFO:	Setting the data phase to 11 for uplink 19
13:31:47:setup_element:INFO:	Setting the data phase to 14 for uplink 20
13:31:47:setup_element:INFO:	Setting the data phase to 12 for uplink 21
13:31:47:setup_element:INFO:	Setting the data phase to 14 for uplink 22
13:31:47:setup_element:INFO:	Setting the data phase to 10 for uplink 23
13:31:47:setup_element:INFO:	Setting the data phase to 25 for uplink 24
13:31:47:setup_element:INFO:	Setting the data phase to 29 for uplink 25
13:31:47:setup_element:INFO:	Setting the data phase to 25 for uplink 26
13:31:47:setup_element:INFO:	Setting the data phase to 30 for uplink 27
13:31:47:setup_element:INFO:	Setting the data phase to 30 for uplink 28
13:31:47:setup_element:INFO:	Setting the data phase to 33 for uplink 29
13:31:47:setup_element:INFO:	Setting the data phase to 6 for uplink 30
13:31:47:setup_element:INFO:	Setting the data phase to 6 for uplink 31
13:31:47:setup_element:INFO:	Beginning SMX ASICs map scan
13:31:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:48:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:31:48:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:31:48:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:31:48:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:31:48:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:31:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:31:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:31:48:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:31:48:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:31:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:31:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:31:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:31:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:31:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:31:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:31:49:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:31:49:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:31:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:31:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:31:50:setup_element:INFO:	Performing Elink synchronization
13:31:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:31:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:50:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:31:50:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:31:50:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:31:50:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:31:51:febtest:INFO:	Init all SMX (CSA): 30
13:32:07:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:32:07:febtest:INFO:	23-00 | XA-000-09-004-008-011-020-14 |  40.9 | 1153.7
13:32:07:febtest:INFO:	30-01 | XA-000-09-004-008-005-023-07 |  28.2 | 1189.2
13:32:08:febtest:INFO:	21-02 | XA-000-09-004-008-014-022-05 |  34.6 | 1177.4
13:32:08:febtest:INFO:	28-03 | XA-000-09-004-008-008-020-00 |  37.7 | 1159.7
13:32:08:febtest:INFO:	19-04 | XA-000-09-004-008-008-022-00 |  44.1 | 1153.7
13:32:08:febtest:INFO:	26-05 | XA-000-09-004-008-017-021-13 |  28.2 | 1195.1
13:32:08:febtest:INFO:	17-06 | XA-000-09-004-008-011-010-09 |  44.1 | 1147.8
13:32:09:febtest:INFO:	24-07 | XA-000-09-004-008-005-022-07 |  44.1 | 1135.9
13:32:10:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:32:12:ST3_smx:INFO:	chip: 23-0 	 40.898880 C 	 1165.571835 mV
13:32:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:12:ST3_smx:INFO:		Electrons
13:32:12:ST3_smx:INFO:	# loops 0
13:32:13:ST3_smx:INFO:	# loops 1
13:32:15:ST3_smx:INFO:	# loops 2
13:32:17:ST3_smx:INFO:	Total # of broken channels: 0
13:32:17:ST3_smx:INFO:	List of broken channels: []
13:32:17:ST3_smx:INFO:	Total # of broken channels: 0
13:32:17:ST3_smx:INFO:	List of broken channels: []
13:32:19:ST3_smx:INFO:	chip: 30-1 	 28.225000 C 	 1200.969315 mV
13:32:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:19:ST3_smx:INFO:		Electrons
13:32:19:ST3_smx:INFO:	# loops 0
13:32:21:ST3_smx:INFO:	# loops 1
13:32:22:ST3_smx:INFO:	# loops 2
13:32:24:ST3_smx:INFO:	Total # of broken channels: 0
13:32:24:ST3_smx:INFO:	List of broken channels: []
13:32:24:ST3_smx:INFO:	Total # of broken channels: 0
13:32:24:ST3_smx:INFO:	List of broken channels: []
13:32:25:ST3_smx:INFO:	chip: 21-2 	 34.556970 C 	 1189.190035 mV
13:32:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:25:ST3_smx:INFO:		Electrons
13:32:25:ST3_smx:INFO:	# loops 0
13:32:27:ST3_smx:INFO:	# loops 1
13:32:29:ST3_smx:INFO:	# loops 2
13:32:30:ST3_smx:INFO:	Total # of broken channels: 0
13:32:30:ST3_smx:INFO:	List of broken channels: []
13:32:30:ST3_smx:INFO:	Total # of broken channels: 0
13:32:30:ST3_smx:INFO:	List of broken channels: []
13:32:32:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1171.483840 mV
13:32:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:32:ST3_smx:INFO:		Electrons
13:32:32:ST3_smx:INFO:	# loops 0
13:32:34:ST3_smx:INFO:	# loops 1
13:32:36:ST3_smx:INFO:	# loops 2
13:32:37:ST3_smx:INFO:	Total # of broken channels: 0
13:32:37:ST3_smx:INFO:	List of broken channels: []
13:32:37:ST3_smx:INFO:	Total # of broken channels: 0
13:32:37:ST3_smx:INFO:	List of broken channels: []
13:32:39:ST3_smx:INFO:	chip: 19-4 	 44.073563 C 	 1165.571835 mV
13:32:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:39:ST3_smx:INFO:		Electrons
13:32:39:ST3_smx:INFO:	# loops 0
13:32:41:ST3_smx:INFO:	# loops 1
13:32:42:ST3_smx:INFO:	# loops 2
13:32:44:ST3_smx:INFO:	Total # of broken channels: 0
13:32:44:ST3_smx:INFO:	List of broken channels: []
13:32:44:ST3_smx:INFO:	Total # of broken channels: 0
13:32:44:ST3_smx:INFO:	List of broken channels: []
13:32:45:ST3_smx:INFO:	chip: 26-5 	 28.225000 C 	 1212.728715 mV
13:32:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:45:ST3_smx:INFO:		Electrons
13:32:45:ST3_smx:INFO:	# loops 0
13:32:47:ST3_smx:INFO:	# loops 1
13:32:49:ST3_smx:INFO:	# loops 2
13:32:51:ST3_smx:INFO:	Total # of broken channels: 0
13:32:51:ST3_smx:INFO:	List of broken channels: []
13:32:51:ST3_smx:INFO:	Total # of broken channels: 0
13:32:51:ST3_smx:INFO:	List of broken channels: []
13:32:52:ST3_smx:INFO:	chip: 17-6 	 44.073563 C 	 1159.654860 mV
13:32:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:52:ST3_smx:INFO:		Electrons
13:32:52:ST3_smx:INFO:	# loops 0
13:32:54:ST3_smx:INFO:	# loops 1
13:32:55:ST3_smx:INFO:	# loops 2
13:32:57:ST3_smx:INFO:	Total # of broken channels: 0
13:32:57:ST3_smx:INFO:	List of broken channels: []
13:32:57:ST3_smx:INFO:	Total # of broken channels: 0
13:32:57:ST3_smx:INFO:	List of broken channels: []
13:32:59:ST3_smx:INFO:	chip: 24-7 	 47.250730 C 	 1147.806000 mV
13:32:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:59:ST3_smx:INFO:		Electrons
13:32:59:ST3_smx:INFO:	# loops 0
13:33:00:ST3_smx:INFO:	# loops 1
13:33:02:ST3_smx:INFO:	# loops 2
13:33:04:ST3_smx:INFO:	Total # of broken channels: 0
13:33:04:ST3_smx:INFO:	List of broken channels: []
13:33:04:ST3_smx:INFO:	Total # of broken channels: 0
13:33:04:ST3_smx:INFO:	List of broken channels: []
13:33:04:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:33:04:febtest:INFO:	23-00 | XA-000-09-004-008-011-020-14 |  44.1 | 1189.2
13:33:04:febtest:INFO:	30-01 | XA-000-09-004-008-005-023-07 |  31.4 | 1224.5
13:33:05:febtest:INFO:	21-02 | XA-000-09-004-008-014-022-05 |  34.6 | 1206.9
13:33:05:febtest:INFO:	28-03 | XA-000-09-004-008-008-020-00 |  37.7 | 1195.1
13:33:05:febtest:INFO:	19-04 | XA-000-09-004-008-008-022-00 |  47.3 | 1189.2
13:33:05:febtest:INFO:	26-05 | XA-000-09-004-008-017-021-13 |  31.4 | 1230.3
13:33:05:febtest:INFO:	17-06 | XA-000-09-004-008-011-010-09 |  47.3 | 1183.3
13:33:06:febtest:INFO:	24-07 | XA-000-09-004-008-005-022-07 |  47.3 | 1165.6
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_05_26-13_31_39
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4164| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5130', '1.850', '2.3130']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9670', '1.849', '2.5630']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9480', '1.850', '0.5194']
Comment