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FEB_4167 12.06.25 11:23:42
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11:23:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:23:42:ST3_Shared:INFO: FEB-Microcable
11:23:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:23:42:febtest:INFO: Testing FEB with SN 4167
11:23:43:smx_tester:INFO: Scanning setup
11:23:43:elinks:INFO: Disabling clock on downlink 0
11:23:43:elinks:INFO: Disabling clock on downlink 1
11:23:43:elinks:INFO: Disabling clock on downlink 2
11:23:43:elinks:INFO: Disabling clock on downlink 3
11:23:43:elinks:INFO: Disabling clock on downlink 4
11:23:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:23:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:43:elinks:INFO: Disabling clock on downlink 0
11:23:43:elinks:INFO: Disabling clock on downlink 1
11:23:43:elinks:INFO: Disabling clock on downlink 2
11:23:43:elinks:INFO: Disabling clock on downlink 3
11:23:43:elinks:INFO: Disabling clock on downlink 4
11:23:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:23:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:44:elinks:INFO: Disabling clock on downlink 0
11:23:44:elinks:INFO: Disabling clock on downlink 1
11:23:44:elinks:INFO: Disabling clock on downlink 2
11:23:44:elinks:INFO: Disabling clock on downlink 3
11:23:44:elinks:INFO: Disabling clock on downlink 4
11:23:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:23:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:44:elinks:INFO: Disabling clock on downlink 0
11:23:44:elinks:INFO: Disabling clock on downlink 1
11:23:44:elinks:INFO: Disabling clock on downlink 2
11:23:44:elinks:INFO: Disabling clock on downlink 3
11:23:44:elinks:INFO: Disabling clock on downlink 4
11:23:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:23:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:44:elinks:INFO: Disabling clock on downlink 0
11:23:44:elinks:INFO: Disabling clock on downlink 1
11:23:44:elinks:INFO: Disabling clock on downlink 2
11:23:44:elinks:INFO: Disabling clock on downlink 3
11:23:44:elinks:INFO: Disabling clock on downlink 4
11:23:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:23:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:23:44:setup_element:INFO: Scanning clock phase
11:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:23:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:23:44:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:23:44:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:23:44:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:23:44:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:23:44:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:23:44:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:23:44:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:23:44:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:23:44:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:23:44:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:23:44:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:23:44:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:23:44:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:23:44:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:23:44:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:23:44:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________________XXXXXX
Clock Delay: 36
11:23:44:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________________XXXXXX
Clock Delay: 36
11:23:44:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
11:23:44:setup_element:INFO: Scanning data phases
11:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:23:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:23:50:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:23:50:setup_element:INFO: Eye window for uplink 16: XXXX___________________________________X
Data delay found: 21
11:23:50:setup_element:INFO: Eye window for uplink 17: XXX___________________________________XX
Data delay found: 20
11:23:50:setup_element:INFO: Eye window for uplink 18: X___________________________________XXXX
Data delay found: 18
11:23:50:setup_element:INFO: Eye window for uplink 19: X___________________________________XXXX
Data delay found: 18
11:23:50:setup_element:INFO: Eye window for uplink 20: X__________________________________XXXX_
Data delay found: 17
11:23:50:setup_element:INFO: Eye window for uplink 21: XX__________________________________XXXX
Data delay found: 18
11:23:50:setup_element:INFO: Eye window for uplink 22: XXX___________________________________XX
Data delay found: 20
11:23:50:setup_element:INFO: Eye window for uplink 23: X__________________________________XXXXX
Data delay found: 17
11:23:50:setup_element:INFO: Eye window for uplink 24: __________XXXXXX________________________
Data delay found: 32
11:23:50:setup_element:INFO: Eye window for uplink 25: _____________XXXXX______________________
Data delay found: 35
11:23:50:setup_element:INFO: Eye window for uplink 26: __________XXXXXXX_______________________
Data delay found: 33
11:23:50:setup_element:INFO: Eye window for uplink 27: ____________XXXXXXX_____________________
Data delay found: 35
11:23:50:setup_element:INFO: Eye window for uplink 28: ________________XXXXX___________________
Data delay found: 38
11:23:50:setup_element:INFO: Eye window for uplink 29: ________________XXXXX___________________
Data delay found: 38
11:23:50:setup_element:INFO: Eye window for uplink 30: _____________________XXXXXX_____________
Data delay found: 3
11:23:50:setup_element:INFO: Eye window for uplink 31: _____________________XXXXX______________
Data delay found: 3
11:23:50:setup_element:INFO: Setting the data phase to 21 for uplink 16
11:23:50:setup_element:INFO: Setting the data phase to 20 for uplink 17
11:23:50:setup_element:INFO: Setting the data phase to 18 for uplink 18
11:23:50:setup_element:INFO: Setting the data phase to 18 for uplink 19
11:23:50:setup_element:INFO: Setting the data phase to 17 for uplink 20
11:23:50:setup_element:INFO: Setting the data phase to 18 for uplink 21
11:23:50:setup_element:INFO: Setting the data phase to 20 for uplink 22
11:23:50:setup_element:INFO: Setting the data phase to 17 for uplink 23
11:23:50:setup_element:INFO: Setting the data phase to 32 for uplink 24
11:23:50:setup_element:INFO: Setting the data phase to 35 for uplink 25
11:23:50:setup_element:INFO: Setting the data phase to 33 for uplink 26
11:23:50:setup_element:INFO: Setting the data phase to 35 for uplink 27
11:23:50:setup_element:INFO: Setting the data phase to 38 for uplink 28
11:23:50:setup_element:INFO: Setting the data phase to 38 for uplink 29
11:23:50:setup_element:INFO: Setting the data phase to 3 for uplink 30
11:23:50:setup_element:INFO: Setting the data phase to 3 for uplink 31
11:23:50:setup_element:INFO: Beginning SMX ASICs map scan
11:23:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:23:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:23:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:23:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:23:50:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:23:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:23:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:23:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:23:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:23:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:23:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:23:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:23:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:23:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:23:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:23:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:23:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:23:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:23:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:23:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:23:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:23:52:setup_element:INFO: Performing Elink synchronization
11:23:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:23:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:23:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:23:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:23:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:23:52:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:23:53:febtest:INFO: Init all SMX (CSA): 30
11:24:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:24:07:febtest:INFO: 23-00 | XA-000-09-004-019-009-014-11 | 31.4 | 1177.4
11:24:07:febtest:INFO: 30-01 | XA-000-09-004-019-018-014-05 | 37.7 | 1165.6
11:24:08:febtest:INFO: 21-02 | XA-000-09-004-019-015-015-14 | 37.7 | 1165.6
11:24:08:febtest:INFO: 28-03 | XA-000-09-004-019-009-016-12 | 50.4 | 1124.0
11:24:08:febtest:INFO: 19-04 | XA-000-09-004-019-007-021-05 | 34.6 | 1183.3
11:24:08:febtest:INFO: 26-05 | XA-000-09-004-019-018-015-05 | 25.1 | 1206.9
11:24:08:febtest:INFO: 17-06 | XA-000-09-004-019-006-013-15 | 34.6 | 1165.6
11:24:09:febtest:INFO: 24-07 | XA-000-09-004-019-003-016-03 | 40.9 | 1147.8
11:24:10:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:24:12:ST3_smx:INFO: chip: 23-0 34.556970 C 1189.190035 mV
11:24:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:12:ST3_smx:INFO: Electrons
11:24:12:ST3_smx:INFO: # loops 0
11:24:13:ST3_smx:INFO: # loops 1
11:24:15:ST3_smx:INFO: # loops 2
11:24:16:ST3_smx:INFO: Total # of broken channels: 0
11:24:16:ST3_smx:INFO: List of broken channels: []
11:24:16:ST3_smx:INFO: Total # of broken channels: 0
11:24:16:ST3_smx:INFO: List of broken channels: []
11:24:18:ST3_smx:INFO: chip: 30-1 37.726682 C 1177.390875 mV
11:24:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:18:ST3_smx:INFO: Electrons
11:24:18:ST3_smx:INFO: # loops 0
11:24:20:ST3_smx:INFO: # loops 1
11:24:22:ST3_smx:INFO: # loops 2
11:24:24:ST3_smx:INFO: Total # of broken channels: 0
11:24:24:ST3_smx:INFO: List of broken channels: []
11:24:24:ST3_smx:INFO: Total # of broken channels: 0
11:24:24:ST3_smx:INFO: List of broken channels: []
11:24:26:ST3_smx:INFO: chip: 21-2 40.898880 C 1177.390875 mV
11:24:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:26:ST3_smx:INFO: Electrons
11:24:26:ST3_smx:INFO: # loops 0
11:24:27:ST3_smx:INFO: # loops 1
11:24:29:ST3_smx:INFO: # loops 2
11:24:30:ST3_smx:INFO: Total # of broken channels: 0
11:24:30:ST3_smx:INFO: List of broken channels: []
11:24:30:ST3_smx:INFO: Total # of broken channels: 8
11:24:30:ST3_smx:INFO: List of broken channels: [0, 4, 6, 8, 10, 12, 14, 18]
11:24:32:ST3_smx:INFO: chip: 28-3 50.430383 C 1135.937260 mV
11:24:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:32:ST3_smx:INFO: Electrons
11:24:32:ST3_smx:INFO: # loops 0
11:24:34:ST3_smx:INFO: # loops 1
11:24:35:ST3_smx:INFO: # loops 2
11:24:37:ST3_smx:INFO: Total # of broken channels: 0
11:24:37:ST3_smx:INFO: List of broken channels: []
11:24:37:ST3_smx:INFO: Total # of broken channels: 0
11:24:37:ST3_smx:INFO: List of broken channels: []
11:24:38:ST3_smx:INFO: chip: 19-4 34.556970 C 1195.082160 mV
11:24:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:38:ST3_smx:INFO: Electrons
11:24:38:ST3_smx:INFO: # loops 0
11:24:40:ST3_smx:INFO: # loops 1
11:24:42:ST3_smx:INFO: # loops 2
11:24:44:ST3_smx:INFO: Total # of broken channels: 0
11:24:44:ST3_smx:INFO: List of broken channels: []
11:24:44:ST3_smx:INFO: Total # of broken channels: 0
11:24:44:ST3_smx:INFO: List of broken channels: []
11:24:45:ST3_smx:INFO: chip: 26-5 28.225000 C 1218.600960 mV
11:24:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:45:ST3_smx:INFO: Electrons
11:24:45:ST3_smx:INFO: # loops 0
11:24:47:ST3_smx:INFO: # loops 1
11:24:48:ST3_smx:INFO: # loops 2
11:24:50:ST3_smx:INFO: Total # of broken channels: 0
11:24:50:ST3_smx:INFO: List of broken channels: []
11:24:50:ST3_smx:INFO: Total # of broken channels: 0
11:24:50:ST3_smx:INFO: List of broken channels: []
11:24:51:ST3_smx:INFO: chip: 17-6 37.726682 C 1177.390875 mV
11:24:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:51:ST3_smx:INFO: Electrons
11:24:51:ST3_smx:INFO: # loops 0
11:24:53:ST3_smx:INFO: # loops 1
11:24:54:ST3_smx:INFO: # loops 2
11:24:56:ST3_smx:INFO: Total # of broken channels: 0
11:24:56:ST3_smx:INFO: List of broken channels: []
11:24:56:ST3_smx:INFO: Total # of broken channels: 0
11:24:56:ST3_smx:INFO: List of broken channels: []
11:24:58:ST3_smx:INFO: chip: 24-7 44.073563 C 1159.654860 mV
11:24:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:24:58:ST3_smx:INFO: Electrons
11:24:58:ST3_smx:INFO: # loops 0
11:24:59:ST3_smx:INFO: # loops 1
11:25:01:ST3_smx:INFO: # loops 2
11:25:02:ST3_smx:INFO: Total # of broken channels: 0
11:25:02:ST3_smx:INFO: List of broken channels: []
11:25:02:ST3_smx:INFO: Total # of broken channels: 0
11:25:02:ST3_smx:INFO: List of broken channels: []
11:25:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:25:03:febtest:INFO: 23-00 | XA-000-09-004-019-009-014-11 | 34.6 | 1212.7
11:25:03:febtest:INFO: 30-01 | XA-000-09-004-019-018-014-05 | 40.9 | 1201.0
11:25:03:febtest:INFO: 21-02 | XA-000-09-004-019-015-015-14 | 40.9 | 1201.0
11:25:04:febtest:INFO: 28-03 | XA-000-09-004-019-009-016-12 | 53.6 | 1153.7
11:25:04:febtest:INFO: 19-04 | XA-000-09-004-019-007-021-05 | 37.7 | 1212.7
11:25:04:febtest:INFO: 26-05 | XA-000-09-004-019-018-015-05 | 28.2 | 1242.0
11:25:04:febtest:INFO: 17-06 | XA-000-09-004-019-006-013-15 | 40.9 | 1195.1
11:25:04:febtest:INFO: 24-07 | XA-000-09-004-019-003-016-03 | 44.1 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_12-11_23_42
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4167| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '1.6160', '1.850', '3.4280']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9920', '1.850', '2.5740']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9640', '1.850', '0.5319']