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FEB_4168 23.05.25 10:05:37
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10:05:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:05:37:ST3_Shared:INFO: FEB-Microcable
10:05:37:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:05:37:febtest:INFO: Testing FEB with SN 4168
10:05:39:smx_tester:INFO: Scanning setup
10:05:39:elinks:INFO: Disabling clock on downlink 0
10:05:39:elinks:INFO: Disabling clock on downlink 1
10:05:39:elinks:INFO: Disabling clock on downlink 2
10:05:39:elinks:INFO: Disabling clock on downlink 3
10:05:39:elinks:INFO: Disabling clock on downlink 4
10:05:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:05:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:05:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:05:39:elinks:INFO: Disabling clock on downlink 0
10:05:39:elinks:INFO: Disabling clock on downlink 1
10:05:39:elinks:INFO: Disabling clock on downlink 2
10:05:39:elinks:INFO: Disabling clock on downlink 3
10:05:39:elinks:INFO: Disabling clock on downlink 4
10:05:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:05:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:05:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:05:39:elinks:INFO: Disabling clock on downlink 0
10:05:39:elinks:INFO: Disabling clock on downlink 1
10:05:39:elinks:INFO: Disabling clock on downlink 2
10:05:39:elinks:INFO: Disabling clock on downlink 3
10:05:39:elinks:INFO: Disabling clock on downlink 4
10:05:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:05:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:05:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:05:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:05:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:05:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:05:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:05:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:05:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:05:39:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:05:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:05:39:elinks:INFO: Disabling clock on downlink 0
10:05:39:elinks:INFO: Disabling clock on downlink 1
10:05:39:elinks:INFO: Disabling clock on downlink 2
10:05:39:elinks:INFO: Disabling clock on downlink 3
10:05:39:elinks:INFO: Disabling clock on downlink 4
10:05:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:05:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:05:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:05:39:elinks:INFO: Disabling clock on downlink 0
10:05:39:elinks:INFO: Disabling clock on downlink 1
10:05:39:elinks:INFO: Disabling clock on downlink 2
10:05:39:elinks:INFO: Disabling clock on downlink 3
10:05:39:elinks:INFO: Disabling clock on downlink 4
10:05:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:05:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:05:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:05:39:setup_element:INFO: Scanning clock phase
10:05:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:05:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:05:40:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:05:40:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:05:40:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:05:40:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
10:05:40:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
10:05:40:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:05:40:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:05:40:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:05:40:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:05:40:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
10:05:40:setup_element:INFO: Scanning data phases
10:05:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:05:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:05:45:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:05:45:setup_element:INFO: Eye window for uplink 24: ______XXXX______________________________
Data delay found: 27
10:05:45:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
10:05:45:setup_element:INFO: Eye window for uplink 26: ___XXXXXX_______________________________
Data delay found: 25
10:05:45:setup_element:INFO: Eye window for uplink 27: ________XXXXXX__________________________
Data delay found: 30
10:05:45:setup_element:INFO: Eye window for uplink 28: ________XXXXXX__________________________
Data delay found: 30
10:05:45:setup_element:INFO: Eye window for uplink 29: ___________XXXXXX_______________________
Data delay found: 33
10:05:45:setup_element:INFO: Eye window for uplink 30: ___________XXXXXX_______________________
Data delay found: 33
10:05:45:setup_element:INFO: Eye window for uplink 31: ____________XXXX________________________
Data delay found: 33
10:05:45:setup_element:INFO: Setting the data phase to 27 for uplink 24
10:05:45:setup_element:INFO: Setting the data phase to 31 for uplink 25
10:05:45:setup_element:INFO: Setting the data phase to 25 for uplink 26
10:05:45:setup_element:INFO: Setting the data phase to 30 for uplink 27
10:05:45:setup_element:INFO: Setting the data phase to 30 for uplink 28
10:05:45:setup_element:INFO: Setting the data phase to 33 for uplink 29
10:05:45:setup_element:INFO: Setting the data phase to 33 for uplink 30
10:05:45:setup_element:INFO: Setting the data phase to 33 for uplink 31
10:05:45:setup_element:INFO: Beginning SMX ASICs map scan
10:05:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:05:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:05:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:05:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:05:45:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:05:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:05:45:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:05:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:05:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:05:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:05:46:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:05:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:05:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:05:48:setup_element:INFO: Performing Elink synchronization
10:05:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:05:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:05:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:05:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:05:48:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:05:48:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:05:48:febtest:INFO: Init all SMX (CSA): 30
10:05:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:05:59:febtest:INFO: 30-01 | XA-000-09-004-008-014-015-02 | 28.2 | 1189.2
10:05:59:febtest:INFO: 28-03 | XA-000-09-004-008-011-015-09 | 37.7 | 1165.6
10:05:59:febtest:INFO: 26-05 | XA-000-09-004-008-008-015-07 | 34.6 | 1171.5
10:05:59:febtest:INFO: 24-07 | XA-000-09-004-008-008-016-00 | 40.9 | 1147.8
10:06:00:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:06:02:ST3_smx:INFO: chip: 30-1 28.225000 C 1200.969315 mV
10:06:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:02:ST3_smx:INFO: Electrons
10:06:02:ST3_smx:INFO: # loops 0
10:06:04:ST3_smx:INFO: # loops 1
10:06:07:ST3_smx:INFO: # loops 2
10:06:09:ST3_smx:INFO: Total # of broken channels: 0
10:06:09:ST3_smx:INFO: List of broken channels: []
10:06:09:ST3_smx:INFO: Total # of broken channels: 0
10:06:09:ST3_smx:INFO: List of broken channels: []
10:06:11:ST3_smx:INFO: chip: 28-3 37.726682 C 1177.390875 mV
10:06:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:11:ST3_smx:INFO: Electrons
10:06:11:ST3_smx:INFO: # loops 0
10:06:13:ST3_smx:INFO: # loops 1
10:06:15:ST3_smx:INFO: # loops 2
10:06:17:ST3_smx:INFO: Total # of broken channels: 0
10:06:17:ST3_smx:INFO: List of broken channels: []
10:06:17:ST3_smx:INFO: Total # of broken channels: 0
10:06:17:ST3_smx:INFO: List of broken channels: []
10:06:19:ST3_smx:INFO: chip: 26-5 37.726682 C 1183.292940 mV
10:06:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:19:ST3_smx:INFO: Electrons
10:06:19:ST3_smx:INFO: # loops 0
10:06:21:ST3_smx:INFO: # loops 1
10:06:23:ST3_smx:INFO: # loops 2
10:06:25:ST3_smx:INFO: Total # of broken channels: 0
10:06:25:ST3_smx:INFO: List of broken channels: []
10:06:25:ST3_smx:INFO: Total # of broken channels: 0
10:06:25:ST3_smx:INFO: List of broken channels: []
10:06:27:ST3_smx:INFO: chip: 24-7 40.898880 C 1153.732915 mV
10:06:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:06:27:ST3_smx:INFO: Electrons
10:06:27:ST3_smx:INFO: # loops 0
10:06:29:ST3_smx:INFO: # loops 1
10:06:31:ST3_smx:INFO: # loops 2
10:06:33:ST3_smx:INFO: Total # of broken channels: 0
10:06:33:ST3_smx:INFO: List of broken channels: []
10:06:33:ST3_smx:INFO: Total # of broken channels: 0
10:06:33:ST3_smx:INFO: List of broken channels: []
10:06:33:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:06:34:febtest:INFO: 30-01 | XA-000-09-004-008-014-015-02 | 28.2 | 1224.5
10:06:34:febtest:INFO: 28-03 | XA-000-09-004-008-011-015-09 | 37.7 | 1195.1
10:06:34:febtest:INFO: 26-05 | XA-000-09-004-008-008-015-07 | 37.7 | 1206.9
10:06:34:febtest:INFO: 24-07 | XA-000-09-004-008-008-016-00 | 44.1 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_05_23-10_05_37
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4168| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0390', '1.850', '1.4030']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0130', '1.850', '1.2980']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9942', '1.850', '0.2678']