
FEB_4168 28.05.25 06:55:00
TextEdit.txt
06:55:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 06:55:00:ST3_Shared:INFO: FEB-Microcable 06:55:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 06:55:00:febtest:INFO: Testing FEB with SN 4168 06:55:02:smx_tester:INFO: Scanning setup 06:55:02:elinks:INFO: Disabling clock on downlink 0 06:55:02:elinks:INFO: Disabling clock on downlink 1 06:55:02:elinks:INFO: Disabling clock on downlink 2 06:55:02:elinks:INFO: Disabling clock on downlink 3 06:55:02:elinks:INFO: Disabling clock on downlink 4 06:55:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 06:55:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 06:55:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 06:55:02:elinks:INFO: Disabling clock on downlink 0 06:55:02:elinks:INFO: Disabling clock on downlink 1 06:55:02:elinks:INFO: Disabling clock on downlink 2 06:55:02:elinks:INFO: Disabling clock on downlink 3 06:55:02:elinks:INFO: Disabling clock on downlink 4 06:55:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 06:55:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 06:55:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 06:55:02:elinks:INFO: Disabling clock on downlink 0 06:55:02:elinks:INFO: Disabling clock on downlink 1 06:55:02:elinks:INFO: Disabling clock on downlink 2 06:55:02:elinks:INFO: Disabling clock on downlink 3 06:55:02:elinks:INFO: Disabling clock on downlink 4 06:55:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 06:55:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 06:55:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 06:55:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 06:55:02:elinks:INFO: Disabling clock on downlink 0 06:55:02:elinks:INFO: Disabling clock on downlink 1 06:55:02:elinks:INFO: Disabling clock on downlink 2 06:55:02:elinks:INFO: Disabling clock on downlink 3 06:55:02:elinks:INFO: Disabling clock on downlink 4 06:55:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 06:55:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 06:55:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 06:55:02:elinks:INFO: Disabling clock on downlink 0 06:55:02:elinks:INFO: Disabling clock on downlink 1 06:55:02:elinks:INFO: Disabling clock on downlink 2 06:55:02:elinks:INFO: Disabling clock on downlink 3 06:55:02:elinks:INFO: Disabling clock on downlink 4 06:55:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 06:55:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 06:55:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 06:55:02:setup_element:INFO: Scanning clock phase 06:55:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 06:55:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 06:55:03:setup_element:INFO: Clock phase scan results for group 0, downlink 2 06:55:03:setup_element:INFO: Eye window for uplink 16: __________________________________________________________________________XXXXX_ Clock Delay: 36 06:55:03:setup_element:INFO: Eye window for uplink 17: __________________________________________________________________________XXXXX_ Clock Delay: 36 06:55:03:setup_element:INFO: Eye window for uplink 18: __________________________________________________________________________XXXXX_ Clock Delay: 36 06:55:03:setup_element:INFO: Eye window for uplink 19: __________________________________________________________________________XXXXX_ Clock Delay: 36 06:55:03:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________ Clock Delay: 40 06:55:03:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________ Clock Delay: 40 06:55:03:setup_element:INFO: Eye window for uplink 22: __________________________________________________________________________XXXXX_ Clock Delay: 36 06:55:03:setup_element:INFO: Eye window for uplink 23: __________________________________________________________________________XXXXX_ Clock Delay: 36 06:55:03:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________XXXXXX__ Clock Delay: 34 06:55:03:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________XXXXXX__ Clock Delay: 34 06:55:03:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 06:55:03:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 06:55:03:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________________XXXXX__ Clock Delay: 35 06:55:03:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________________XXXXX__ Clock Delay: 35 06:55:03:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________________XXXXX_ Clock Delay: 36 06:55:03:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________________XXXXX_ Clock Delay: 36 06:55:03:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 06:55:03:setup_element:INFO: Scanning data phases 06:55:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 06:55:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 06:55:08:setup_element:INFO: Data phase scan results for group 0, downlink 2 06:55:08:setup_element:INFO: Eye window for uplink 16: XXX__________________________________XXX Data delay found: 19 06:55:08:setup_element:INFO: Eye window for uplink 17: __________________________________XXXX__ Data delay found: 15 06:55:08:setup_element:INFO: Eye window for uplink 18: XXXX__________________________________XX Data delay found: 20 06:55:08:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXXX Data delay found: 17 06:55:08:setup_element:INFO: Eye window for uplink 20: __________________________________XXXX__ Data delay found: 15 06:55:08:setup_element:INFO: Eye window for uplink 21: _________________________________XXXX___ Data delay found: 14 06:55:08:setup_element:INFO: Eye window for uplink 22: X___________________________________XXXX Data delay found: 18 06:55:08:setup_element:INFO: Eye window for uplink 23: _______________________________XXXXX____ Data delay found: 13 06:55:08:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________ Data delay found: 27 06:55:08:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________ Data delay found: 30 06:55:08:setup_element:INFO: Eye window for uplink 26: ___XXXXXX_______________________________ Data delay found: 25 06:55:08:setup_element:INFO: Eye window for uplink 27: ________XXXXXX__________________________ Data delay found: 30 06:55:08:setup_element:INFO: Eye window for uplink 28: _________XXXXXX____XXXXXXXXXXXXXXXXXXXXX Data delay found: 4 06:55:08:setup_element:INFO: Eye window for uplink 29: ____________XXXXX__XXXXXXXXXXXXXXXXXXXXX Data delay found: 5 06:55:08:setup_element:INFO: Eye window for uplink 30: ____________XXXXXX______________________ Data delay found: 34 06:55:08:setup_element:INFO: Eye window for uplink 31: _____________XXXX_______________________ Data delay found: 34 06:55:08:setup_element:INFO: Setting the data phase to 19 for uplink 16 06:55:08:setup_element:INFO: Setting the data phase to 15 for uplink 17 06:55:08:setup_element:INFO: Setting the data phase to 20 for uplink 18 06:55:08:setup_element:INFO: Setting the data phase to 17 for uplink 19 06:55:08:setup_element:INFO: Setting the data phase to 15 for uplink 20 06:55:08:setup_element:INFO: Setting the data phase to 14 for uplink 21 06:55:08:setup_element:INFO: Setting the data phase to 18 for uplink 22 06:55:08:setup_element:INFO: Setting the data phase to 13 for uplink 23 06:55:08:setup_element:INFO: Setting the data phase to 27 for uplink 24 06:55:08:setup_element:INFO: Setting the data phase to 30 for uplink 25 06:55:08:setup_element:INFO: Setting the data phase to 25 for uplink 26 06:55:08:setup_element:INFO: Setting the data phase to 30 for uplink 27 06:55:08:setup_element:INFO: Setting the data phase to 4 for uplink 28 06:55:08:setup_element:INFO: Setting the data phase to 5 for uplink 29 06:55:08:setup_element:INFO: Setting the data phase to 34 for uplink 30 06:55:08:setup_element:INFO: Setting the data phase to 34 for uplink 31 06:55:08:setup_element:INFO: Beginning SMX ASICs map scan 06:55:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 06:55:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 06:55:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 06:55:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 06:55:08:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 06:55:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 06:55:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 06:55:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 06:55:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 06:55:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 06:55:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 06:55:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 06:55:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 06:55:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 06:55:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 06:55:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 06:55:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 06:55:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 06:55:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 06:55:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 06:55:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 06:55:11:setup_element:INFO: Performing Elink synchronization 06:55:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 06:55:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 06:55:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 06:55:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 06:55:11:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 06:55:11:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 06:55:11:febtest:INFO: Init all SMX (CSA): 30 06:55:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 06:55:25:febtest:INFO: 23-00 | XA-000-09-004-008-005-016-07 | 44.1 | 1135.9 06:55:25:febtest:INFO: 30-01 | XA-000-09-004-008-014-015-02 | 25.1 | 1189.2 06:55:25:febtest:INFO: 21-02 | XA-000-09-004-008-014-016-05 | 31.4 | 1171.5 06:55:26:febtest:INFO: 28-03 | XA-000-09-004-008-011-015-09 | 37.7 | 1165.6 06:55:26:febtest:INFO: 19-04 | XA-000-09-004-008-017-016-13 | 28.2 | 1183.3 06:55:26:febtest:INFO: 26-05 | XA-000-09-004-008-008-015-07 | 34.6 | 1165.6 06:55:26:febtest:INFO: 17-06 | XA-000-09-004-008-011-016-14 | 31.4 | 1177.4 06:55:26:febtest:INFO: 24-07 | XA-000-09-004-008-008-016-00 | 44.1 | 1141.9 06:55:27:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 06:55:29:ST3_smx:INFO: chip: 23-0 44.073563 C 1147.806000 mV 06:55:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:55:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:55:29:ST3_smx:INFO: Electrons 06:55:29:ST3_smx:INFO: # loops 0 06:55:31:ST3_smx:INFO: # loops 1 06:55:33:ST3_smx:INFO: # loops 2 06:55:35:ST3_smx:INFO: Total # of broken channels: 0 06:55:35:ST3_smx:INFO: List of broken channels: [] 06:55:35:ST3_smx:INFO: Total # of broken channels: 0 06:55:35:ST3_smx:INFO: List of broken channels: [] 06:55:37:ST3_smx:INFO: chip: 30-1 25.062742 C 1200.969315 mV 06:55:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:55:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:55:37:ST3_smx:INFO: Electrons 06:55:37:ST3_smx:INFO: # loops 0 06:55:38:ST3_smx:INFO: # loops 1 06:55:40:ST3_smx:INFO: # loops 2 06:55:41:ST3_smx:INFO: Total # of broken channels: 0 06:55:41:ST3_smx:INFO: List of broken channels: [] 06:55:41:ST3_smx:INFO: Total # of broken channels: 0 06:55:41:ST3_smx:INFO: List of broken channels: [] 06:55:43:ST3_smx:INFO: chip: 21-2 34.556970 C 1183.292940 mV 06:55:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:55:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:55:43:ST3_smx:INFO: Electrons 06:55:43:ST3_smx:INFO: # loops 0 06:55:45:ST3_smx:INFO: # loops 1 06:55:46:ST3_smx:INFO: # loops 2 06:55:48:ST3_smx:INFO: Total # of broken channels: 0 06:55:48:ST3_smx:INFO: List of broken channels: [] 06:55:48:ST3_smx:INFO: Total # of broken channels: 0 06:55:48:ST3_smx:INFO: List of broken channels: [] 06:55:49:ST3_smx:INFO: chip: 28-3 37.726682 C 1177.390875 mV 06:55:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:55:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:55:49:ST3_smx:INFO: Electrons 06:55:49:ST3_smx:INFO: # loops 0 06:55:51:ST3_smx:INFO: # loops 1 06:55:52:ST3_smx:INFO: # loops 2 06:55:54:ST3_smx:INFO: Total # of broken channels: 0 06:55:54:ST3_smx:INFO: List of broken channels: [] 06:55:54:ST3_smx:INFO: Total # of broken channels: 0 06:55:54:ST3_smx:INFO: List of broken channels: [] 06:55:56:ST3_smx:INFO: chip: 19-4 28.225000 C 1195.082160 mV 06:55:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:55:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:55:56:ST3_smx:INFO: Electrons 06:55:56:ST3_smx:INFO: # loops 0 06:55:57:ST3_smx:INFO: # loops 1 06:55:59:ST3_smx:INFO: # loops 2 06:56:01:ST3_smx:INFO: Total # of broken channels: 0 06:56:01:ST3_smx:INFO: List of broken channels: [] 06:56:01:ST3_smx:INFO: Total # of broken channels: 0 06:56:01:ST3_smx:INFO: List of broken channels: [] 06:56:02:ST3_smx:INFO: chip: 26-5 37.726682 C 1183.292940 mV 06:56:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:56:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:56:02:ST3_smx:INFO: Electrons 06:56:02:ST3_smx:INFO: # loops 0 06:56:04:ST3_smx:INFO: # loops 1 06:56:06:ST3_smx:INFO: # loops 2 06:56:07:ST3_smx:INFO: Total # of broken channels: 0 06:56:07:ST3_smx:INFO: List of broken channels: [] 06:56:07:ST3_smx:INFO: Total # of broken channels: 0 06:56:07:ST3_smx:INFO: List of broken channels: [] 06:56:09:ST3_smx:INFO: chip: 17-6 31.389742 C 1189.190035 mV 06:56:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:56:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:56:09:ST3_smx:INFO: Electrons 06:56:09:ST3_smx:INFO: # loops 0 06:56:11:ST3_smx:INFO: # loops 1 06:56:12:ST3_smx:INFO: # loops 2 06:56:14:ST3_smx:INFO: Total # of broken channels: 0 06:56:14:ST3_smx:INFO: List of broken channels: [] 06:56:14:ST3_smx:INFO: Total # of broken channels: 0 06:56:14:ST3_smx:INFO: List of broken channels: [] 06:56:15:ST3_smx:INFO: chip: 24-7 44.073563 C 1153.732915 mV 06:56:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:56:15:ST3_discr_histo:WARNING: Not enough entries for fit!!! 06:56:15:ST3_smx:INFO: Electrons 06:56:15:ST3_smx:INFO: # loops 0 06:56:17:ST3_smx:INFO: # loops 1 06:56:18:ST3_smx:INFO: # loops 2 06:56:20:ST3_smx:INFO: Total # of broken channels: 0 06:56:20:ST3_smx:INFO: List of broken channels: [] 06:56:20:ST3_smx:INFO: Total # of broken channels: 0 06:56:20:ST3_smx:INFO: List of broken channels: [] 06:56:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 06:56:20:febtest:INFO: 23-00 | XA-000-09-004-008-005-016-07 | 44.1 | 1165.6 06:56:21:febtest:INFO: 30-01 | XA-000-09-004-008-014-015-02 | 28.2 | 1224.5 06:56:21:febtest:INFO: 21-02 | XA-000-09-004-008-014-016-05 | 34.6 | 1224.5 06:56:21:febtest:INFO: 28-03 | XA-000-09-004-008-011-015-09 | 37.7 | 1195.1 06:56:21:febtest:INFO: 19-04 | XA-000-09-004-008-017-016-13 | 31.4 | 1218.6 06:56:21:febtest:INFO: 26-05 | XA-000-09-004-008-008-015-07 | 37.7 | 1201.0 06:56:22:febtest:INFO: 17-06 | XA-000-09-004-008-011-016-14 | 34.6 | 1206.9 06:56:22:febtest:INFO: 24-07 | XA-000-09-004-008-008-016-00 | 44.1 | 1177.4 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_05_28-06_55_00 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4168| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.453', '1.6550', '1.850', '2.8690'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0050', '1.850', '2.5880'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9730', '1.850', '0.5312']