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FEB_4173 04.06.25 14:50:12
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14:50:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:50:12:ST3_Shared:INFO: FEB-Microcable
14:50:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:50:12:febtest:INFO: Testing FEB with SN 4173
14:50:14:smx_tester:INFO: Scanning setup
14:50:14:elinks:INFO: Disabling clock on downlink 0
14:50:14:elinks:INFO: Disabling clock on downlink 1
14:50:14:elinks:INFO: Disabling clock on downlink 2
14:50:14:elinks:INFO: Disabling clock on downlink 3
14:50:14:elinks:INFO: Disabling clock on downlink 4
14:50:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:50:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:50:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:50:14:elinks:INFO: Disabling clock on downlink 0
14:50:14:elinks:INFO: Disabling clock on downlink 1
14:50:14:elinks:INFO: Disabling clock on downlink 2
14:50:14:elinks:INFO: Disabling clock on downlink 3
14:50:14:elinks:INFO: Disabling clock on downlink 4
14:50:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:50:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:50:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:50:14:elinks:INFO: Disabling clock on downlink 0
14:50:14:elinks:INFO: Disabling clock on downlink 1
14:50:14:elinks:INFO: Disabling clock on downlink 2
14:50:14:elinks:INFO: Disabling clock on downlink 3
14:50:14:elinks:INFO: Disabling clock on downlink 4
14:50:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:50:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:50:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:50:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:50:14:elinks:INFO: Disabling clock on downlink 0
14:50:14:elinks:INFO: Disabling clock on downlink 1
14:50:14:elinks:INFO: Disabling clock on downlink 2
14:50:14:elinks:INFO: Disabling clock on downlink 3
14:50:14:elinks:INFO: Disabling clock on downlink 4
14:50:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:50:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:50:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:50:14:elinks:INFO: Disabling clock on downlink 0
14:50:14:elinks:INFO: Disabling clock on downlink 1
14:50:14:elinks:INFO: Disabling clock on downlink 2
14:50:14:elinks:INFO: Disabling clock on downlink 3
14:50:14:elinks:INFO: Disabling clock on downlink 4
14:50:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:50:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:50:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:50:14:setup_element:INFO: Scanning clock phase
14:50:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:50:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:50:15:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:50:15:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:50:15:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:50:15:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:50:15:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:50:15:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:50:15:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:50:15:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:50:15:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:50:15:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:50:15:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:50:15:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:50:15:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:50:15:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:50:15:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:50:15:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:50:15:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:50:15:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
14:50:15:setup_element:INFO: Scanning data phases
14:50:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:50:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:50:20:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:50:20:setup_element:INFO: Eye window for uplink 16: XX__________________________________XXXX
Data delay found: 18
14:50:20:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
14:50:20:setup_element:INFO: Eye window for uplink 18: __________________________________XXXXX_
Data delay found: 16
14:50:20:setup_element:INFO: Eye window for uplink 19: __________________________________XXXXX_
Data delay found: 16
14:50:20:setup_element:INFO: Eye window for uplink 20: _________________________________XXXX___
Data delay found: 14
14:50:20:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
14:50:20:setup_element:INFO: Eye window for uplink 22: X___________________________________XXXX
Data delay found: 18
14:50:20:setup_element:INFO: Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
14:50:20:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
14:50:20:setup_element:INFO: Eye window for uplink 25: ________XXXXXX__________________________
Data delay found: 30
14:50:20:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________
Data delay found: 29
14:50:20:setup_element:INFO: Eye window for uplink 27: _________XXXXXX_________________________
Data delay found: 31
14:50:20:setup_element:INFO: Eye window for uplink 28: _______________XXXXX____________________
Data delay found: 37
14:50:20:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
14:50:20:setup_element:INFO: Eye window for uplink 30: ________________XXXXXXX_________________
Data delay found: 39
14:50:20:setup_element:INFO: Eye window for uplink 31: ________________XXXXX___________________
Data delay found: 38
14:50:20:setup_element:INFO: Setting the data phase to 18 for uplink 16
14:50:20:setup_element:INFO: Setting the data phase to 16 for uplink 17
14:50:20:setup_element:INFO: Setting the data phase to 16 for uplink 18
14:50:20:setup_element:INFO: Setting the data phase to 16 for uplink 19
14:50:20:setup_element:INFO: Setting the data phase to 14 for uplink 20
14:50:20:setup_element:INFO: Setting the data phase to 16 for uplink 21
14:50:20:setup_element:INFO: Setting the data phase to 18 for uplink 22
14:50:20:setup_element:INFO: Setting the data phase to 15 for uplink 23
14:50:20:setup_element:INFO: Setting the data phase to 28 for uplink 24
14:50:20:setup_element:INFO: Setting the data phase to 30 for uplink 25
14:50:20:setup_element:INFO: Setting the data phase to 29 for uplink 26
14:50:20:setup_element:INFO: Setting the data phase to 31 for uplink 27
14:50:20:setup_element:INFO: Setting the data phase to 37 for uplink 28
14:50:20:setup_element:INFO: Setting the data phase to 36 for uplink 29
14:50:20:setup_element:INFO: Setting the data phase to 39 for uplink 30
14:50:20:setup_element:INFO: Setting the data phase to 38 for uplink 31
14:50:20:setup_element:INFO: Beginning SMX ASICs map scan
14:50:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:50:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:50:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:50:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:50:20:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:50:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:50:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:50:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:50:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:50:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:50:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:50:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:50:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:50:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:50:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:50:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:50:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:50:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:50:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:50:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:50:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:50:23:setup_element:INFO: Performing Elink synchronization
14:50:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:50:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:50:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:50:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:50:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:50:23:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:50:23:febtest:INFO: Init all SMX (CSA): 30
14:50:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:50:41:febtest:INFO: 23-00 | XA-000-09-004-008-009-008-10 | 37.7 | 1165.6
14:50:41:febtest:INFO: 30-01 | XA-000-09-004-008-006-007-14 | 34.6 | 1183.3
14:50:41:febtest:INFO: 21-02 | XA-000-09-004-008-009-006-10 | 37.7 | 1159.7
14:50:41:febtest:INFO: 28-03 | XA-000-09-004-008-006-008-14 | 47.3 | 1135.9
14:50:41:febtest:INFO: 19-04 | XA-000-09-004-008-012-006-01 | 28.2 | 1201.0
14:50:42:febtest:INFO: 26-05 | XA-000-09-004-008-006-006-14 | 37.7 | 1171.5
14:50:42:febtest:INFO: 17-06 | XA-000-09-004-008-012-008-01 | 37.7 | 1165.6
14:50:42:febtest:INFO: 24-07 | XA-000-09-004-008-009-007-10 | 37.7 | 1171.5
14:50:43:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:50:45:ST3_smx:INFO: chip: 23-0 37.726682 C 1177.390875 mV
14:50:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:50:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:50:45:ST3_smx:INFO: Electrons
14:50:45:ST3_smx:INFO: # loops 0
14:50:47:ST3_smx:INFO: # loops 1
14:50:49:ST3_smx:INFO: # loops 2
14:50:51:ST3_smx:INFO: Total # of broken channels: 0
14:50:51:ST3_smx:INFO: List of broken channels: []
14:50:51:ST3_smx:INFO: Total # of broken channels: 0
14:50:51:ST3_smx:INFO: List of broken channels: []
14:50:53:ST3_smx:INFO: chip: 30-1 34.556970 C 1195.082160 mV
14:50:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:50:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:50:53:ST3_smx:INFO: Electrons
14:50:53:ST3_smx:INFO: # loops 0
14:50:55:ST3_smx:INFO: # loops 1
14:50:57:ST3_smx:INFO: # loops 2
14:50:59:ST3_smx:INFO: Total # of broken channels: 0
14:50:59:ST3_smx:INFO: List of broken channels: []
14:50:59:ST3_smx:INFO: Total # of broken channels: 0
14:50:59:ST3_smx:INFO: List of broken channels: []
14:51:00:ST3_smx:INFO: chip: 21-2 37.726682 C 1171.483840 mV
14:51:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:51:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:51:00:ST3_smx:INFO: Electrons
14:51:00:ST3_smx:INFO: # loops 0
14:51:02:ST3_smx:INFO: # loops 1
14:51:04:ST3_smx:INFO: # loops 2
14:51:06:ST3_smx:INFO: Total # of broken channels: 0
14:51:06:ST3_smx:INFO: List of broken channels: []
14:51:06:ST3_smx:INFO: Total # of broken channels: 6
14:51:06:ST3_smx:INFO: List of broken channels: [4, 6, 8, 10, 12, 14]
14:51:08:ST3_smx:INFO: chip: 28-3 47.250730 C 1147.806000 mV
14:51:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:51:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:51:08:ST3_smx:INFO: Electrons
14:51:08:ST3_smx:INFO: # loops 0
14:51:10:ST3_smx:INFO: # loops 1
14:51:12:ST3_smx:INFO: # loops 2
14:51:14:ST3_smx:INFO: Total # of broken channels: 0
14:51:14:ST3_smx:INFO: List of broken channels: []
14:51:14:ST3_smx:INFO: Total # of broken channels: 4
14:51:14:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7]
14:51:15:ST3_smx:INFO: chip: 19-4 28.225000 C 1212.728715 mV
14:51:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:51:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:51:15:ST3_smx:INFO: Electrons
14:51:15:ST3_smx:INFO: # loops 0
14:51:17:ST3_smx:INFO: # loops 1
14:51:19:ST3_smx:INFO: # loops 2
14:51:21:ST3_smx:INFO: Total # of broken channels: 0
14:51:21:ST3_smx:INFO: List of broken channels: []
14:51:21:ST3_smx:INFO: Total # of broken channels: 0
14:51:21:ST3_smx:INFO: List of broken channels: []
14:51:23:ST3_smx:INFO: chip: 26-5 40.898880 C 1183.292940 mV
14:51:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:51:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:51:23:ST3_smx:INFO: Electrons
14:51:23:ST3_smx:INFO: # loops 0
14:51:25:ST3_smx:INFO: # loops 1
14:51:27:ST3_smx:INFO: # loops 2
14:51:29:ST3_smx:INFO: Total # of broken channels: 0
14:51:29:ST3_smx:INFO: List of broken channels: []
14:51:29:ST3_smx:INFO: Total # of broken channels: 0
14:51:29:ST3_smx:INFO: List of broken channels: []
14:51:31:ST3_smx:INFO: chip: 17-6 37.726682 C 1177.390875 mV
14:51:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:51:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:51:31:ST3_smx:INFO: Electrons
14:51:31:ST3_smx:INFO: # loops 0
14:51:33:ST3_smx:INFO: # loops 1
14:51:34:ST3_smx:INFO: # loops 2
14:51:37:ST3_smx:INFO: Total # of broken channels: 0
14:51:37:ST3_smx:INFO: List of broken channels: []
14:51:37:ST3_smx:INFO: Total # of broken channels: 0
14:51:37:ST3_smx:INFO: List of broken channels: []
14:51:38:ST3_smx:INFO: chip: 24-7 37.726682 C 1183.292940 mV
14:51:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:51:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:51:38:ST3_smx:INFO: Electrons
14:51:38:ST3_smx:INFO: # loops 0
14:51:40:ST3_smx:INFO: # loops 1
14:51:42:ST3_smx:INFO: # loops 2
14:51:44:ST3_smx:INFO: Total # of broken channels: 0
14:51:44:ST3_smx:INFO: List of broken channels: []
14:51:44:ST3_smx:INFO: Total # of broken channels: 0
14:51:44:ST3_smx:INFO: List of broken channels: []
14:51:44:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:51:45:febtest:INFO: 23-00 | XA-000-09-004-008-009-008-10 | 37.7 | 1201.0
14:51:45:febtest:INFO: 30-01 | XA-000-09-004-008-006-007-14 | 34.6 | 1212.7
14:51:45:febtest:INFO: 21-02 | XA-000-09-004-008-009-006-10 | 40.9 | 1195.1
14:51:45:febtest:INFO: 28-03 | XA-000-09-004-008-006-008-14 | 50.4 | 1171.5
14:51:45:febtest:INFO: 19-04 | XA-000-09-004-008-012-006-01 | 31.4 | 1236.2
14:51:46:febtest:INFO: 26-05 | XA-000-09-004-008-006-006-14 | 40.9 | 1206.9
14:51:46:febtest:INFO: 17-06 | XA-000-09-004-008-012-008-01 | 40.9 | 1195.1
14:51:46:febtest:INFO: 24-07 | XA-000-09-004-008-009-007-10 | 40.9 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_04-14_50_12
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4173| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5960', '1.850', '2.4150']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9980', '1.850', '2.5710']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9710', '1.850', '0.5277']