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FEB_4176 03.06.25 11:35:50
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11:35:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:35:50:ST3_Shared:INFO: FEB-Microcable
11:35:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:35:50:febtest:INFO: Testing FEB with SN 4176
11:35:52:smx_tester:INFO: Scanning setup
11:35:52:elinks:INFO: Disabling clock on downlink 0
11:35:52:elinks:INFO: Disabling clock on downlink 1
11:35:52:elinks:INFO: Disabling clock on downlink 2
11:35:52:elinks:INFO: Disabling clock on downlink 3
11:35:52:elinks:INFO: Disabling clock on downlink 4
11:35:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:35:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:52:elinks:INFO: Disabling clock on downlink 0
11:35:52:elinks:INFO: Disabling clock on downlink 1
11:35:52:elinks:INFO: Disabling clock on downlink 2
11:35:52:elinks:INFO: Disabling clock on downlink 3
11:35:52:elinks:INFO: Disabling clock on downlink 4
11:35:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:35:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:52:elinks:INFO: Disabling clock on downlink 0
11:35:52:elinks:INFO: Disabling clock on downlink 1
11:35:52:elinks:INFO: Disabling clock on downlink 2
11:35:52:elinks:INFO: Disabling clock on downlink 3
11:35:52:elinks:INFO: Disabling clock on downlink 4
11:35:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:35:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:35:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:35:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:35:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:35:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:35:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:35:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:35:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:35:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:52:elinks:INFO: Disabling clock on downlink 0
11:35:52:elinks:INFO: Disabling clock on downlink 1
11:35:52:elinks:INFO: Disabling clock on downlink 2
11:35:52:elinks:INFO: Disabling clock on downlink 3
11:35:52:elinks:INFO: Disabling clock on downlink 4
11:35:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:35:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:52:elinks:INFO: Disabling clock on downlink 0
11:35:52:elinks:INFO: Disabling clock on downlink 1
11:35:52:elinks:INFO: Disabling clock on downlink 2
11:35:52:elinks:INFO: Disabling clock on downlink 3
11:35:52:elinks:INFO: Disabling clock on downlink 4
11:35:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:35:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:35:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:35:52:setup_element:INFO: Scanning clock phase
11:35:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:35:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:35:52:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:35:52:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:35:52:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:35:52:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:35:52:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:35:52:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:35:52:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:35:52:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:35:52:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:35:52:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
11:35:52:setup_element:INFO: Scanning data phases
11:35:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:35:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:35:58:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:35:58:setup_element:INFO: Eye window for uplink 24: __XXXXXX________________________________
Data delay found: 24
11:35:58:setup_element:INFO: Eye window for uplink 25: ______XXXXX_____________________________
Data delay found: 28
11:35:58:setup_element:INFO: Eye window for uplink 26: _____XXXXX______________________________
Data delay found: 27
11:35:58:setup_element:INFO: Eye window for uplink 27: _________XXXXXXX________________________
Data delay found: 32
11:35:58:setup_element:INFO: Eye window for uplink 28: _______XXXXXX___________________________
Data delay found: 29
11:35:58:setup_element:INFO: Eye window for uplink 29: _________XXXXXXX________________________
Data delay found: 32
11:35:58:setup_element:INFO: Eye window for uplink 30: ______XXXXXXXX__________________________
Data delay found: 29
11:35:58:setup_element:INFO: Eye window for uplink 31: _______XXXXXX___________________________
Data delay found: 29
11:35:58:setup_element:INFO: Setting the data phase to 24 for uplink 24
11:35:58:setup_element:INFO: Setting the data phase to 28 for uplink 25
11:35:58:setup_element:INFO: Setting the data phase to 27 for uplink 26
11:35:58:setup_element:INFO: Setting the data phase to 32 for uplink 27
11:35:58:setup_element:INFO: Setting the data phase to 29 for uplink 28
11:35:58:setup_element:INFO: Setting the data phase to 32 for uplink 29
11:35:58:setup_element:INFO: Setting the data phase to 29 for uplink 30
11:35:58:setup_element:INFO: Setting the data phase to 29 for uplink 31
11:35:58:setup_element:INFO: Beginning SMX ASICs map scan
11:35:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:35:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:35:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:35:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:35:58:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
11:35:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:35:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:35:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:35:58:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:35:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:35:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:35:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:35:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:36:00:setup_element:INFO: Performing Elink synchronization
11:36:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:36:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:36:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:36:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:36:00:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:36:00:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:36:01:febtest:INFO: Init all SMX (CSA): 30
11:36:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:36:08:febtest:INFO: 30-01 | XA-000-09-004-008-015-015-15 | 21.9 | 1212.7
11:36:09:febtest:INFO: 28-03 | XA-000-09-004-008-018-015-04 | 31.4 | 1165.6
11:36:09:febtest:INFO: 26-05 | XA-000-09-004-008-018-014-04 | 31.4 | 1177.4
11:36:09:febtest:INFO: 24-07 | XA-000-09-004-008-015-014-15 | 34.6 | 1165.6
11:36:10:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:36:13:ST3_smx:INFO: chip: 30-1 21.902970 C 1224.468235 mV
11:36:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:13:ST3_smx:INFO: Electrons
11:36:13:ST3_smx:INFO: # loops 0
11:36:14:ST3_smx:INFO: # loops 1
11:36:16:ST3_smx:INFO: # loops 2
11:36:17:ST3_smx:INFO: Total # of broken channels: 0
11:36:17:ST3_smx:INFO: List of broken channels: []
11:36:17:ST3_smx:INFO: Total # of broken channels: 0
11:36:17:ST3_smx:INFO: List of broken channels: []
11:36:20:ST3_smx:INFO: chip: 28-3 31.389742 C 1183.292940 mV
11:36:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:20:ST3_smx:INFO: Electrons
11:36:20:ST3_smx:INFO: # loops 0
11:36:21:ST3_smx:INFO: # loops 1
11:36:23:ST3_smx:INFO: # loops 2
11:36:24:ST3_smx:INFO: Total # of broken channels: 0
11:36:24:ST3_smx:INFO: List of broken channels: []
11:36:24:ST3_smx:INFO: Total # of broken channels: 0
11:36:24:ST3_smx:INFO: List of broken channels: []
11:36:26:ST3_smx:INFO: chip: 26-5 31.389742 C 1183.292940 mV
11:36:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:26:ST3_smx:INFO: Electrons
11:36:26:ST3_smx:INFO: # loops 0
11:36:28:ST3_smx:INFO: # loops 1
11:36:29:ST3_smx:INFO: # loops 2
11:36:31:ST3_smx:INFO: Total # of broken channels: 0
11:36:31:ST3_smx:INFO: List of broken channels: []
11:36:31:ST3_smx:INFO: Total # of broken channels: 0
11:36:31:ST3_smx:INFO: List of broken channels: []
11:36:33:ST3_smx:INFO: chip: 24-7 37.726682 C 1171.483840 mV
11:36:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:36:33:ST3_smx:INFO: Electrons
11:36:33:ST3_smx:INFO: # loops 0
11:36:34:ST3_smx:INFO: # loops 1
11:36:36:ST3_smx:INFO: # loops 2
11:36:37:ST3_smx:INFO: Total # of broken channels: 0
11:36:37:ST3_smx:INFO: List of broken channels: []
11:36:37:ST3_smx:INFO: Total # of broken channels: 0
11:36:37:ST3_smx:INFO: List of broken channels: []
11:36:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:36:38:febtest:INFO: 30-01 | XA-000-09-004-008-015-015-15 | 21.9 | 1253.7
11:36:38:febtest:INFO: 28-03 | XA-000-09-004-008-018-015-04 | 31.4 | 1201.0
11:36:38:febtest:INFO: 26-05 | XA-000-09-004-008-018-014-04 | 31.4 | 1206.9
11:36:39:febtest:INFO: 24-07 | XA-000-09-004-008-015-014-15 | 37.7 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_03-11_35_50
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4176| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8168', '1.850', '0.9108']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9903', '1.850', '1.2870']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9721', '1.850', '0.2643']