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FEB_4176 05.06.25 10:21:46
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10:21:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:21:46:ST3_Shared:INFO: FEB-Microcable
10:21:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:21:46:febtest:INFO: Testing FEB with SN 4176
10:21:48:smx_tester:INFO: Scanning setup
10:21:48:elinks:INFO: Disabling clock on downlink 0
10:21:48:elinks:INFO: Disabling clock on downlink 1
10:21:48:elinks:INFO: Disabling clock on downlink 2
10:21:48:elinks:INFO: Disabling clock on downlink 3
10:21:48:elinks:INFO: Disabling clock on downlink 4
10:21:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:21:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:21:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:21:48:elinks:INFO: Disabling clock on downlink 0
10:21:48:elinks:INFO: Disabling clock on downlink 1
10:21:48:elinks:INFO: Disabling clock on downlink 2
10:21:48:elinks:INFO: Disabling clock on downlink 3
10:21:48:elinks:INFO: Disabling clock on downlink 4
10:21:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:21:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:21:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:21:48:elinks:INFO: Disabling clock on downlink 0
10:21:48:elinks:INFO: Disabling clock on downlink 1
10:21:48:elinks:INFO: Disabling clock on downlink 2
10:21:48:elinks:INFO: Disabling clock on downlink 3
10:21:48:elinks:INFO: Disabling clock on downlink 4
10:21:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:21:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:21:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:21:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:21:48:elinks:INFO: Disabling clock on downlink 0
10:21:48:elinks:INFO: Disabling clock on downlink 1
10:21:48:elinks:INFO: Disabling clock on downlink 2
10:21:48:elinks:INFO: Disabling clock on downlink 3
10:21:48:elinks:INFO: Disabling clock on downlink 4
10:21:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:21:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:21:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:21:48:elinks:INFO: Disabling clock on downlink 0
10:21:48:elinks:INFO: Disabling clock on downlink 1
10:21:48:elinks:INFO: Disabling clock on downlink 2
10:21:48:elinks:INFO: Disabling clock on downlink 3
10:21:48:elinks:INFO: Disabling clock on downlink 4
10:21:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:21:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:21:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:21:48:setup_element:INFO: Scanning clock phase
10:21:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:21:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:21:49:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:21:49:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:21:49:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:21:49:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:21:49:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:21:49:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:21:49:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:21:49:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:21:49:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
10:21:49:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:21:49:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:21:49:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:21:49:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:21:49:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:21:49:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:21:49:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:21:49:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:21:49:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
10:21:49:setup_element:INFO: Scanning data phases
10:21:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:21:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:21:54:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:21:54:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
10:21:54:setup_element:INFO: Eye window for uplink 17: X___________________________________XXXX
Data delay found: 18
10:21:54:setup_element:INFO: Eye window for uplink 18: __________________________________XXXXX_
Data delay found: 16
10:21:54:setup_element:INFO: Eye window for uplink 19: __________________________________XXXXX_
Data delay found: 16
10:21:54:setup_element:INFO: Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
10:21:54:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX
Data delay found: 17
10:21:54:setup_element:INFO: Eye window for uplink 22: XX___________________________________XXX
Data delay found: 19
10:21:54:setup_element:INFO: Eye window for uplink 23: __________________________________XXXXX_
Data delay found: 16
10:21:54:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
10:21:54:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
10:21:54:setup_element:INFO: Eye window for uplink 26: ___________XXXXXX_______________________
Data delay found: 33
10:21:54:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
10:21:54:setup_element:INFO: Eye window for uplink 28: _____________XXXXXX_____________________
Data delay found: 35
10:21:54:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
10:21:54:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXX____________________
Data delay found: 36
10:21:54:setup_element:INFO: Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
10:21:54:setup_element:INFO: Setting the data phase to 19 for uplink 16
10:21:54:setup_element:INFO: Setting the data phase to 18 for uplink 17
10:21:54:setup_element:INFO: Setting the data phase to 16 for uplink 18
10:21:54:setup_element:INFO: Setting the data phase to 16 for uplink 19
10:21:54:setup_element:INFO: Setting the data phase to 15 for uplink 20
10:21:54:setup_element:INFO: Setting the data phase to 17 for uplink 21
10:21:54:setup_element:INFO: Setting the data phase to 19 for uplink 22
10:21:54:setup_element:INFO: Setting the data phase to 16 for uplink 23
10:21:54:setup_element:INFO: Setting the data phase to 29 for uplink 24
10:21:54:setup_element:INFO: Setting the data phase to 31 for uplink 25
10:21:54:setup_element:INFO: Setting the data phase to 33 for uplink 26
10:21:54:setup_element:INFO: Setting the data phase to 35 for uplink 27
10:21:54:setup_element:INFO: Setting the data phase to 35 for uplink 28
10:21:54:setup_element:INFO: Setting the data phase to 35 for uplink 29
10:21:54:setup_element:INFO: Setting the data phase to 36 for uplink 30
10:21:54:setup_element:INFO: Setting the data phase to 35 for uplink 31
10:21:54:setup_element:INFO: Beginning SMX ASICs map scan
10:21:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:21:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:21:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:21:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:21:54:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:21:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:21:54:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:21:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:21:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:21:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:21:54:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:21:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:21:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:21:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:21:55:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:21:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:21:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:21:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:21:55:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:21:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:21:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:21:57:setup_element:INFO: Performing Elink synchronization
10:21:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:21:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:21:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:21:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:21:57:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:21:57:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:21:57:febtest:INFO: Init all SMX (CSA): 30
10:22:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:22:12:febtest:INFO: 23-00 | XA-000-09-004-008-015-004-15 | 47.3 | 1112.1
10:22:12:febtest:INFO: 30-01 | XA-000-09-004-008-015-015-15 | 21.9 | 1206.9
10:22:13:febtest:INFO: 21-02 | XA-000-09-004-008-012-003-01 | 40.9 | 1135.9
10:22:13:febtest:INFO: 28-03 | XA-000-09-004-008-018-015-04 | 28.2 | 1165.6
10:22:13:febtest:INFO: 19-04 | XA-000-09-004-008-009-003-10 | 37.7 | 1159.7
10:22:13:febtest:INFO: 26-05 | XA-000-09-004-008-018-014-04 | 28.2 | 1171.5
10:22:13:febtest:INFO: 17-06 | XA-000-09-004-008-012-004-01 | 34.6 | 1159.7
10:22:14:febtest:INFO: 24-07 | XA-000-09-004-008-015-014-15 | 31.4 | 1159.7
10:22:15:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:22:17:ST3_smx:INFO: chip: 23-0 47.250730 C 1124.048640 mV
10:22:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:17:ST3_smx:INFO: Electrons
10:22:17:ST3_smx:INFO: # loops 0
10:22:18:ST3_smx:INFO: # loops 1
10:22:20:ST3_smx:INFO: # loops 2
10:22:21:ST3_smx:INFO: Total # of broken channels: 0
10:22:21:ST3_smx:INFO: List of broken channels: []
10:22:21:ST3_smx:INFO: Total # of broken channels: 0
10:22:21:ST3_smx:INFO: List of broken channels: []
10:22:23:ST3_smx:INFO: chip: 30-1 21.902970 C 1224.468235 mV
10:22:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:23:ST3_smx:INFO: Electrons
10:22:23:ST3_smx:INFO: # loops 0
10:22:25:ST3_smx:INFO: # loops 1
10:22:26:ST3_smx:INFO: # loops 2
10:22:28:ST3_smx:INFO: Total # of broken channels: 0
10:22:28:ST3_smx:INFO: List of broken channels: []
10:22:28:ST3_smx:INFO: Total # of broken channels: 0
10:22:28:ST3_smx:INFO: List of broken channels: []
10:22:29:ST3_smx:INFO: chip: 21-2 40.898880 C 1147.806000 mV
10:22:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:29:ST3_smx:INFO: Electrons
10:22:29:ST3_smx:INFO: # loops 0
10:22:31:ST3_smx:INFO: # loops 1
10:22:32:ST3_smx:INFO: # loops 2
10:22:34:ST3_smx:INFO: Total # of broken channels: 0
10:22:34:ST3_smx:INFO: List of broken channels: []
10:22:34:ST3_smx:INFO: Total # of broken channels: 0
10:22:34:ST3_smx:INFO: List of broken channels: []
10:22:35:ST3_smx:INFO: chip: 28-3 28.225000 C 1177.390875 mV
10:22:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:35:ST3_smx:INFO: Electrons
10:22:35:ST3_smx:INFO: # loops 0
10:22:37:ST3_smx:INFO: # loops 1
10:22:38:ST3_smx:INFO: # loops 2
10:22:40:ST3_smx:INFO: Total # of broken channels: 0
10:22:40:ST3_smx:INFO: List of broken channels: []
10:22:40:ST3_smx:INFO: Total # of broken channels: 0
10:22:40:ST3_smx:INFO: List of broken channels: []
10:22:41:ST3_smx:INFO: chip: 19-4 37.726682 C 1171.483840 mV
10:22:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:41:ST3_smx:INFO: Electrons
10:22:41:ST3_smx:INFO: # loops 0
10:22:43:ST3_smx:INFO: # loops 1
10:22:45:ST3_smx:INFO: # loops 2
10:22:46:ST3_smx:INFO: Total # of broken channels: 0
10:22:46:ST3_smx:INFO: List of broken channels: []
10:22:46:ST3_smx:INFO: Total # of broken channels: 0
10:22:46:ST3_smx:INFO: List of broken channels: []
10:22:48:ST3_smx:INFO: chip: 26-5 31.389742 C 1183.292940 mV
10:22:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:48:ST3_smx:INFO: Electrons
10:22:48:ST3_smx:INFO: # loops 0
10:22:49:ST3_smx:INFO: # loops 1
10:22:51:ST3_smx:INFO: # loops 2
10:22:53:ST3_smx:INFO: Total # of broken channels: 0
10:22:53:ST3_smx:INFO: List of broken channels: []
10:22:53:ST3_smx:INFO: Total # of broken channels: 0
10:22:53:ST3_smx:INFO: List of broken channels: []
10:22:54:ST3_smx:INFO: chip: 17-6 34.556970 C 1171.483840 mV
10:22:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:22:54:ST3_smx:INFO: Electrons
10:22:54:ST3_smx:INFO: # loops 0
10:22:56:ST3_smx:INFO: # loops 1
10:22:57:ST3_smx:INFO: # loops 2
10:22:59:ST3_smx:INFO: Total # of broken channels: 0
10:22:59:ST3_smx:INFO: List of broken channels: []
10:22:59:ST3_smx:INFO: Total # of broken channels: 0
10:22:59:ST3_smx:INFO: List of broken channels: []
10:23:01:ST3_smx:INFO: chip: 24-7 34.556970 C 1171.483840 mV
10:23:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:23:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:23:01:ST3_smx:INFO: Electrons
10:23:01:ST3_smx:INFO: # loops 0
10:23:02:ST3_smx:INFO: # loops 1
10:23:04:ST3_smx:INFO: # loops 2
10:23:05:ST3_smx:INFO: Total # of broken channels: 0
10:23:05:ST3_smx:INFO: List of broken channels: []
10:23:05:ST3_smx:INFO: Total # of broken channels: 0
10:23:05:ST3_smx:INFO: List of broken channels: []
10:23:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:23:06:febtest:INFO: 23-00 | XA-000-09-004-008-015-004-15 | 50.4 | 1141.9
10:23:06:febtest:INFO: 30-01 | XA-000-09-004-008-015-015-15 | 25.1 | 1259.6
10:23:06:febtest:INFO: 21-02 | XA-000-09-004-008-012-003-01 | 44.1 | 1171.5
10:23:06:febtest:INFO: 28-03 | XA-000-09-004-008-018-015-04 | 31.4 | 1201.0
10:23:07:febtest:INFO: 19-04 | XA-000-09-004-008-009-003-10 | 37.7 | 1206.9
10:23:07:febtest:INFO: 26-05 | XA-000-09-004-008-018-014-04 | 31.4 | 1206.9
10:23:07:febtest:INFO: 17-06 | XA-000-09-004-008-012-004-01 | 37.7 | 1195.1
10:23:07:febtest:INFO: 24-07 | XA-000-09-004-008-015-014-15 | 34.6 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_05-10_21_46
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4176| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.453', '1.6080', '1.850', '2.1780']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9850', '1.850', '2.5050']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9530', '1.850', '0.5235']