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FEB_4177 03.06.25 14:46:27
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14:46:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:46:27:ST3_Shared:INFO: FEB-Microcable
14:46:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:46:27:febtest:INFO: Testing FEB with SN 4177
14:46:29:smx_tester:INFO: Scanning setup
14:46:29:elinks:INFO: Disabling clock on downlink 0
14:46:29:elinks:INFO: Disabling clock on downlink 1
14:46:29:elinks:INFO: Disabling clock on downlink 2
14:46:29:elinks:INFO: Disabling clock on downlink 3
14:46:29:elinks:INFO: Disabling clock on downlink 4
14:46:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:46:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:46:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:46:29:elinks:INFO: Disabling clock on downlink 0
14:46:29:elinks:INFO: Disabling clock on downlink 1
14:46:29:elinks:INFO: Disabling clock on downlink 2
14:46:29:elinks:INFO: Disabling clock on downlink 3
14:46:29:elinks:INFO: Disabling clock on downlink 4
14:46:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:46:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:46:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:46:29:elinks:INFO: Disabling clock on downlink 0
14:46:29:elinks:INFO: Disabling clock on downlink 1
14:46:29:elinks:INFO: Disabling clock on downlink 2
14:46:29:elinks:INFO: Disabling clock on downlink 3
14:46:29:elinks:INFO: Disabling clock on downlink 4
14:46:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:46:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:46:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:46:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:46:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:46:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:46:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:46:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:46:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:46:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:46:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:46:29:elinks:INFO: Disabling clock on downlink 0
14:46:29:elinks:INFO: Disabling clock on downlink 1
14:46:29:elinks:INFO: Disabling clock on downlink 2
14:46:29:elinks:INFO: Disabling clock on downlink 3
14:46:29:elinks:INFO: Disabling clock on downlink 4
14:46:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:46:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:46:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:46:30:elinks:INFO: Disabling clock on downlink 0
14:46:30:elinks:INFO: Disabling clock on downlink 1
14:46:30:elinks:INFO: Disabling clock on downlink 2
14:46:30:elinks:INFO: Disabling clock on downlink 3
14:46:30:elinks:INFO: Disabling clock on downlink 4
14:46:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:46:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:46:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:46:30:setup_element:INFO: Scanning clock phase
14:46:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:46:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:46:30:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:46:30:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:46:30:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:46:30:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:46:30:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:46:30:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:46:30:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:46:30:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:46:30:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXX__
Clock Delay: 35
14:46:30:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 2
14:46:30:setup_element:INFO: Scanning data phases
14:46:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:46:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:46:35:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:46:35:setup_element:INFO: Eye window for uplink 24: ___XXXXX________________________________
Data delay found: 25
14:46:35:setup_element:INFO: Eye window for uplink 25: ______XXXXX_____________________________
Data delay found: 28
14:46:35:setup_element:INFO: Eye window for uplink 26: ___XXXXXX_______________________________
Data delay found: 25
14:46:35:setup_element:INFO: Eye window for uplink 27: _______XXXXXXX__________________________
Data delay found: 30
14:46:35:setup_element:INFO: Eye window for uplink 28: ____XXXXXXX_____________________________
Data delay found: 27
14:46:35:setup_element:INFO: Eye window for uplink 29: _______XXXXXX___________________________
Data delay found: 29
14:46:35:setup_element:INFO: Eye window for uplink 30: _________XXXXXXX________________________
Data delay found: 32
14:46:35:setup_element:INFO: Eye window for uplink 31: __________XXXXX_________________________
Data delay found: 32
14:46:35:setup_element:INFO: Setting the data phase to 25 for uplink 24
14:46:35:setup_element:INFO: Setting the data phase to 28 for uplink 25
14:46:35:setup_element:INFO: Setting the data phase to 25 for uplink 26
14:46:35:setup_element:INFO: Setting the data phase to 30 for uplink 27
14:46:35:setup_element:INFO: Setting the data phase to 27 for uplink 28
14:46:35:setup_element:INFO: Setting the data phase to 29 for uplink 29
14:46:35:setup_element:INFO: Setting the data phase to 32 for uplink 30
14:46:35:setup_element:INFO: Setting the data phase to 32 for uplink 31
14:46:35:setup_element:INFO: Beginning SMX ASICs map scan
14:46:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:46:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:46:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:46:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:46:35:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
14:46:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:46:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:46:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:46:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:46:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:46:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:46:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:46:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:46:38:setup_element:INFO: Performing Elink synchronization
14:46:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:46:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:46:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:46:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:46:38:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:46:38:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:46:38:febtest:INFO: Init all SMX (CSA): 30
14:46:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:46:46:febtest:INFO: 30-01 | XA-000-09-004-019-007-004-02 | 34.6 | 1189.2
14:46:46:febtest:INFO: 28-03 | XA-000-09-004-019-010-006-05 | 37.7 | 1183.3
14:46:46:febtest:INFO: 26-05 | XA-000-09-004-019-004-007-12 | 37.7 | 1177.4
14:46:46:febtest:INFO: 24-07 | XA-000-09-004-019-010-004-05 | 44.1 | 1159.7
14:46:47:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:46:50:ST3_smx:INFO: chip: 30-1 34.556970 C 1200.969315 mV
14:46:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:46:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:46:50:ST3_smx:INFO: Electrons
14:46:50:ST3_smx:INFO: # loops 0
14:46:51:ST3_smx:INFO: # loops 1
14:46:53:ST3_smx:INFO: # loops 2
14:46:54:ST3_smx:INFO: Total # of broken channels: 0
14:46:54:ST3_smx:INFO: List of broken channels: []
14:46:54:ST3_smx:INFO: Total # of broken channels: 0
14:46:54:ST3_smx:INFO: List of broken channels: []
14:46:56:ST3_smx:INFO: chip: 28-3 37.726682 C 1195.082160 mV
14:46:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:46:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:46:56:ST3_smx:INFO: Electrons
14:46:56:ST3_smx:INFO: # loops 0
14:46:58:ST3_smx:INFO: # loops 1
14:46:59:ST3_smx:INFO: # loops 2
14:47:01:ST3_smx:INFO: Total # of broken channels: 0
14:47:01:ST3_smx:INFO: List of broken channels: []
14:47:01:ST3_smx:INFO: Total # of broken channels: 0
14:47:01:ST3_smx:INFO: List of broken channels: []
14:47:03:ST3_smx:INFO: chip: 26-5 37.726682 C 1183.292940 mV
14:47:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:47:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:47:03:ST3_smx:INFO: Electrons
14:47:03:ST3_smx:INFO: # loops 0
14:47:04:ST3_smx:INFO: # loops 1
14:47:06:ST3_smx:INFO: # loops 2
14:47:07:ST3_smx:INFO: Total # of broken channels: 0
14:47:07:ST3_smx:INFO: List of broken channels: []
14:47:07:ST3_smx:INFO: Total # of broken channels: 0
14:47:07:ST3_smx:INFO: List of broken channels: []
14:47:09:ST3_smx:INFO: chip: 24-7 44.073563 C 1171.483840 mV
14:47:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:47:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:47:09:ST3_smx:INFO: Electrons
14:47:09:ST3_smx:INFO: # loops 0
14:47:11:ST3_smx:INFO: # loops 1
14:47:12:ST3_smx:INFO: # loops 2
14:47:14:ST3_smx:INFO: Total # of broken channels: 0
14:47:14:ST3_smx:INFO: List of broken channels: []
14:47:14:ST3_smx:INFO: Total # of broken channels: 0
14:47:14:ST3_smx:INFO: List of broken channels: []
14:47:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:47:14:febtest:INFO: 30-01 | XA-000-09-004-019-007-004-02 | 34.6 | 1218.6
14:47:14:febtest:INFO: 28-03 | XA-000-09-004-019-010-006-05 | 37.7 | 1218.6
14:47:15:febtest:INFO: 26-05 | XA-000-09-004-019-004-007-12 | 40.9 | 1206.9
14:47:15:febtest:INFO: 24-07 | XA-000-09-004-019-010-004-05 | 47.3 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_03-14_46_27
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4177| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8124', '1.849', '1.2420']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0050', '1.850', '1.2760']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9903', '1.850', '0.2675']