
FEB_4178 12.06.25 07:25:59
TextEdit.txt
07:25:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:25:59:ST3_Shared:INFO: FEB-Microcable 07:25:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:26:00:febtest:INFO: Testing FEB with SN 4178 07:26:01:smx_tester:INFO: Scanning setup 07:26:01:elinks:INFO: Disabling clock on downlink 0 07:26:01:elinks:INFO: Disabling clock on downlink 1 07:26:01:elinks:INFO: Disabling clock on downlink 2 07:26:01:elinks:INFO: Disabling clock on downlink 3 07:26:01:elinks:INFO: Disabling clock on downlink 4 07:26:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 07:26:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:01:elinks:INFO: Disabling clock on downlink 0 07:26:01:elinks:INFO: Disabling clock on downlink 1 07:26:01:elinks:INFO: Disabling clock on downlink 2 07:26:01:elinks:INFO: Disabling clock on downlink 3 07:26:01:elinks:INFO: Disabling clock on downlink 4 07:26:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:26:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:01:elinks:INFO: Disabling clock on downlink 0 07:26:01:elinks:INFO: Disabling clock on downlink 1 07:26:01:elinks:INFO: Disabling clock on downlink 2 07:26:01:elinks:INFO: Disabling clock on downlink 3 07:26:01:elinks:INFO: Disabling clock on downlink 4 07:26:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 07:26:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 07:26:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:02:elinks:INFO: Disabling clock on downlink 0 07:26:02:elinks:INFO: Disabling clock on downlink 1 07:26:02:elinks:INFO: Disabling clock on downlink 2 07:26:02:elinks:INFO: Disabling clock on downlink 3 07:26:02:elinks:INFO: Disabling clock on downlink 4 07:26:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 07:26:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:02:elinks:INFO: Disabling clock on downlink 0 07:26:02:elinks:INFO: Disabling clock on downlink 1 07:26:02:elinks:INFO: Disabling clock on downlink 2 07:26:02:elinks:INFO: Disabling clock on downlink 3 07:26:02:elinks:INFO: Disabling clock on downlink 4 07:26:02:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:26:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 07:26:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:26:02:setup_element:INFO: Scanning clock phase 07:26:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:26:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:26:02:setup_element:INFO: Clock phase scan results for group 0, downlink 2 07:26:02:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXX____ Clock Delay: 33 07:26:02:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXX____ Clock Delay: 33 07:26:02:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXX__ Clock Delay: 34 07:26:02:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXX__ Clock Delay: 34 07:26:02:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXXXX__ Clock Delay: 34 07:26:02:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXXXX__ Clock Delay: 34 07:26:02:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXXX__ Clock Delay: 34 07:26:02:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXXX__ Clock Delay: 34 07:26:02:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXX_____ Clock Delay: 32 07:26:02:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXX_____ Clock Delay: 32 07:26:02:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 07:26:02:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXX__ Clock Delay: 34 07:26:02:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___ Clock Delay: 34 07:26:02:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___ Clock Delay: 34 07:26:02:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXX__ Clock Delay: 34 07:26:02:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXX__ Clock Delay: 34 07:26:02:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 07:26:02:setup_element:INFO: Scanning data phases 07:26:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:26:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:26:07:setup_element:INFO: Data phase scan results for group 0, downlink 2 07:26:07:setup_element:INFO: Eye window for uplink 16: XXXXX__________________________________X Data delay found: 21 07:26:07:setup_element:INFO: Eye window for uplink 17: XXXX__________________________________XX Data delay found: 20 07:26:07:setup_element:INFO: Eye window for uplink 18: XXXXX___________________________________ Data delay found: 22 07:26:07:setup_element:INFO: Eye window for uplink 19: XXXXX__________________________________X Data delay found: 21 07:26:07:setup_element:INFO: Eye window for uplink 20: XXXXX_________________________________XX Data delay found: 21 07:26:07:setup_element:INFO: Eye window for uplink 21: XXXXX__________________________________X Data delay found: 21 07:26:07:setup_element:INFO: Eye window for uplink 22: XXXXX__________________________________X Data delay found: 21 07:26:07:setup_element:INFO: Eye window for uplink 23: XX__________________________________XXXX Data delay found: 18 07:26:07:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________ Data delay found: 29 07:26:07:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________ Data delay found: 31 07:26:07:setup_element:INFO: Eye window for uplink 26: ___________XXXXXX_______________________ Data delay found: 33 07:26:07:setup_element:INFO: Eye window for uplink 27: _____________XXXXXXX____________________ Data delay found: 36 07:26:07:setup_element:INFO: Eye window for uplink 28: __________________XXXXX_________________ Data delay found: 0 07:26:07:setup_element:INFO: Eye window for uplink 29: _________________XXXXXX_________________ Data delay found: 39 07:26:07:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________ Data delay found: 39 07:26:07:setup_element:INFO: Eye window for uplink 31: ________________XXXXX___________________ Data delay found: 38 07:26:07:setup_element:INFO: Setting the data phase to 21 for uplink 16 07:26:07:setup_element:INFO: Setting the data phase to 20 for uplink 17 07:26:07:setup_element:INFO: Setting the data phase to 22 for uplink 18 07:26:07:setup_element:INFO: Setting the data phase to 21 for uplink 19 07:26:07:setup_element:INFO: Setting the data phase to 21 for uplink 20 07:26:07:setup_element:INFO: Setting the data phase to 21 for uplink 21 07:26:08:setup_element:INFO: Setting the data phase to 21 for uplink 22 07:26:08:setup_element:INFO: Setting the data phase to 18 for uplink 23 07:26:08:setup_element:INFO: Setting the data phase to 29 for uplink 24 07:26:08:setup_element:INFO: Setting the data phase to 31 for uplink 25 07:26:08:setup_element:INFO: Setting the data phase to 33 for uplink 26 07:26:08:setup_element:INFO: Setting the data phase to 36 for uplink 27 07:26:08:setup_element:INFO: Setting the data phase to 0 for uplink 28 07:26:08:setup_element:INFO: Setting the data phase to 39 for uplink 29 07:26:08:setup_element:INFO: Setting the data phase to 39 for uplink 30 07:26:08:setup_element:INFO: Setting the data phase to 38 for uplink 31 07:26:08:setup_element:INFO: Beginning SMX ASICs map scan 07:26:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:26:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:26:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:26:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 07:26:08:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 07:26:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 07:26:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 07:26:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 07:26:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 07:26:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 07:26:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 07:26:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 07:26:08:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 07:26:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 07:26:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 07:26:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 07:26:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 07:26:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 07:26:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 07:26:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 07:26:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 07:26:10:setup_element:INFO: Performing Elink synchronization 07:26:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:26:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:26:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:26:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 07:26:10:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 07:26:10:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 07:26:11:febtest:INFO: Init all SMX (CSA): 30 07:26:26:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:26:26:febtest:INFO: 23-00 | XA-000-09-004-019-004-013-12 | 37.7 | 1165.6 07:26:26:febtest:INFO: 30-01 | XA-000-09-004-019-016-012-06 | 34.6 | 1165.6 07:26:27:febtest:INFO: 21-02 | XA-000-09-004-019-007-014-02 | 47.3 | 1130.0 07:26:27:febtest:INFO: 28-03 | XA-000-09-004-019-004-014-12 | 31.4 | 1195.1 07:26:27:febtest:INFO: 19-04 | XA-000-09-004-019-004-016-11 | 40.9 | 1153.7 07:26:27:febtest:INFO: 26-05 | XA-000-09-004-019-013-014-13 | 28.2 | 1236.2 07:26:28:febtest:INFO: 17-06 | XA-000-09-004-019-010-016-02 | 47.3 | 1135.9 07:26:28:febtest:INFO: 24-07 | XA-000-09-004-019-013-012-13 | 44.1 | 1141.9 07:26:29:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 07:26:31:ST3_smx:INFO: chip: 23-0 37.726682 C 1183.292940 mV 07:26:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:31:ST3_smx:INFO: Electrons 07:26:31:ST3_smx:INFO: # loops 0 07:26:32:ST3_smx:INFO: # loops 1 07:26:34:ST3_smx:INFO: # loops 2 07:26:36:ST3_smx:INFO: Total # of broken channels: 0 07:26:36:ST3_smx:INFO: List of broken channels: [] 07:26:36:ST3_smx:INFO: Total # of broken channels: 0 07:26:36:ST3_smx:INFO: List of broken channels: [] 07:26:37:ST3_smx:INFO: chip: 30-1 34.556970 C 1183.292940 mV 07:26:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:37:ST3_smx:INFO: Electrons 07:26:37:ST3_smx:INFO: # loops 0 07:26:39:ST3_smx:INFO: # loops 1 07:26:40:ST3_smx:INFO: # loops 2 07:26:42:ST3_smx:INFO: Total # of broken channels: 0 07:26:42:ST3_smx:INFO: List of broken channels: [] 07:26:42:ST3_smx:INFO: Total # of broken channels: 0 07:26:42:ST3_smx:INFO: List of broken channels: [] 07:26:44:ST3_smx:INFO: chip: 21-2 47.250730 C 1141.874115 mV 07:26:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:44:ST3_smx:INFO: Electrons 07:26:44:ST3_smx:INFO: # loops 0 07:26:45:ST3_smx:INFO: # loops 1 07:26:47:ST3_smx:INFO: # loops 2 07:26:48:ST3_smx:INFO: Total # of broken channels: 0 07:26:48:ST3_smx:INFO: List of broken channels: [] 07:26:48:ST3_smx:INFO: Total # of broken channels: 0 07:26:48:ST3_smx:INFO: List of broken channels: [] 07:26:50:ST3_smx:INFO: chip: 28-3 31.389742 C 1212.728715 mV 07:26:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:50:ST3_smx:INFO: Electrons 07:26:50:ST3_smx:INFO: # loops 0 07:26:52:ST3_smx:INFO: # loops 1 07:26:53:ST3_smx:INFO: # loops 2 07:26:55:ST3_smx:INFO: Total # of broken channels: 0 07:26:55:ST3_smx:INFO: List of broken channels: [] 07:26:55:ST3_smx:INFO: Total # of broken channels: 0 07:26:55:ST3_smx:INFO: List of broken channels: [] 07:26:56:ST3_smx:INFO: chip: 19-4 40.898880 C 1165.571835 mV 07:26:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:26:56:ST3_smx:INFO: Electrons 07:26:56:ST3_smx:INFO: # loops 0 07:26:58:ST3_smx:INFO: # loops 1 07:27:00:ST3_smx:INFO: # loops 2 07:27:02:ST3_smx:INFO: Total # of broken channels: 0 07:27:02:ST3_smx:INFO: List of broken channels: [] 07:27:02:ST3_smx:INFO: Total # of broken channels: 0 07:27:02:ST3_smx:INFO: List of broken channels: [] 07:27:03:ST3_smx:INFO: chip: 26-5 28.225000 C 1294.487875 mV 07:27:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:03:ST3_smx:INFO: Electrons 07:27:03:ST3_smx:INFO: # loops 0 07:27:05:ST3_smx:INFO: # loops 1 07:27:06:ST3_smx:INFO: # loops 2 07:27:08:ST3_smx:INFO: Total # of broken channels: 0 07:27:08:ST3_smx:INFO: List of broken channels: [] 07:27:08:ST3_smx:INFO: Total # of broken channels: 0 07:27:08:ST3_smx:INFO: List of broken channels: [] 07:27:10:ST3_smx:INFO: chip: 17-6 50.430383 C 1147.806000 mV 07:27:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:10:ST3_smx:INFO: Electrons 07:27:10:ST3_smx:INFO: # loops 0 07:27:11:ST3_smx:INFO: # loops 1 07:27:13:ST3_smx:INFO: # loops 2 07:27:14:ST3_smx:INFO: Total # of broken channels: 0 07:27:14:ST3_smx:INFO: List of broken channels: [] 07:27:14:ST3_smx:INFO: Total # of broken channels: 0 07:27:14:ST3_smx:INFO: List of broken channels: [] 07:27:16:ST3_smx:INFO: chip: 24-7 47.250730 C 1153.732915 mV 07:27:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:27:16:ST3_smx:INFO: Electrons 07:27:16:ST3_smx:INFO: # loops 0 07:27:18:ST3_smx:INFO: # loops 1 07:27:19:ST3_smx:INFO: # loops 2 07:27:21:ST3_smx:INFO: Total # of broken channels: 0 07:27:21:ST3_smx:INFO: List of broken channels: [] 07:27:21:ST3_smx:INFO: Total # of broken channels: 0 07:27:21:ST3_smx:INFO: List of broken channels: [] 07:27:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:27:21:febtest:INFO: 23-00 | XA-000-09-004-019-004-013-12 | 37.7 | 1201.0 07:27:22:febtest:INFO: 30-01 | XA-000-09-004-019-016-012-06 | 34.6 | 1206.9 07:27:22:febtest:INFO: 21-02 | XA-000-09-004-019-007-014-02 | 50.4 | 1165.6 07:27:22:febtest:INFO: 28-03 | XA-000-09-004-019-004-014-12 | 31.4 | 1259.6 07:27:22:febtest:INFO: 19-04 | XA-000-09-004-019-004-016-11 | 44.1 | 1183.3 07:27:22:febtest:INFO: 26-05 | XA-000-09-004-019-013-014-13 | 25.1 | 1578.5 07:27:23:febtest:INFO: 17-06 | XA-000-09-004-019-010-016-02 | 50.4 | 1165.6 07:27:23:febtest:INFO: 24-07 | XA-000-09-004-019-013-012-13 | 47.3 | 1177.4 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_06_12-07_25_59 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4178| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '1.4750', '1.850', '2.4140'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9910', '1.850', '2.6010'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9740', '1.850', '0.5256']