
FEB_4181 13.06.25 09:39:10
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09:39:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:39:10:ST3_Shared:INFO: FEB-Microcable 09:39:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:39:10:febtest:INFO: Testing FEB with SN 4181 09:39:12:smx_tester:INFO: Scanning setup 09:39:12:elinks:INFO: Disabling clock on downlink 0 09:39:12:elinks:INFO: Disabling clock on downlink 1 09:39:12:elinks:INFO: Disabling clock on downlink 2 09:39:12:elinks:INFO: Disabling clock on downlink 3 09:39:12:elinks:INFO: Disabling clock on downlink 4 09:39:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:39:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:39:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:39:12:elinks:INFO: Disabling clock on downlink 0 09:39:12:elinks:INFO: Disabling clock on downlink 1 09:39:12:elinks:INFO: Disabling clock on downlink 2 09:39:12:elinks:INFO: Disabling clock on downlink 3 09:39:12:elinks:INFO: Disabling clock on downlink 4 09:39:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:39:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:39:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:39:12:elinks:INFO: Disabling clock on downlink 0 09:39:12:elinks:INFO: Disabling clock on downlink 1 09:39:12:elinks:INFO: Disabling clock on downlink 2 09:39:12:elinks:INFO: Disabling clock on downlink 3 09:39:12:elinks:INFO: Disabling clock on downlink 4 09:39:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:39:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:39:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:39:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:39:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:39:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:39:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:39:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:39:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:39:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:39:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:39:12:elinks:INFO: Disabling clock on downlink 0 09:39:12:elinks:INFO: Disabling clock on downlink 1 09:39:12:elinks:INFO: Disabling clock on downlink 2 09:39:12:elinks:INFO: Disabling clock on downlink 3 09:39:12:elinks:INFO: Disabling clock on downlink 4 09:39:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:39:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:39:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:39:12:elinks:INFO: Disabling clock on downlink 0 09:39:12:elinks:INFO: Disabling clock on downlink 1 09:39:12:elinks:INFO: Disabling clock on downlink 2 09:39:12:elinks:INFO: Disabling clock on downlink 3 09:39:12:elinks:INFO: Disabling clock on downlink 4 09:39:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:39:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:39:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:39:13:setup_element:INFO: Scanning clock phase 09:39:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:39:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:39:13:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:39:13:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____ Clock Delay: 33 09:39:13:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____ Clock Delay: 33 09:39:13:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:39:13:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:39:13:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXX_____ Clock Delay: 32 09:39:13:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXX_____ Clock Delay: 32 09:39:13:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:39:13:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXX___ Clock Delay: 33 09:39:13:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2 09:39:13:setup_element:INFO: Scanning data phases 09:39:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:39:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:39:18:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:39:18:setup_element:INFO: Eye window for uplink 24: __________XXXXXX________________________ Data delay found: 32 09:39:18:setup_element:INFO: Eye window for uplink 25: ____________XXXXX_______________________ Data delay found: 34 09:39:18:setup_element:INFO: Eye window for uplink 26: ____________XXXXX_______________________ Data delay found: 34 09:39:18:setup_element:INFO: Eye window for uplink 27: ______________XXXXXX____________________ Data delay found: 36 09:39:18:setup_element:INFO: Eye window for uplink 28: ________________XXXXX___________________ Data delay found: 38 09:39:18:setup_element:INFO: Eye window for uplink 29: _______________XXXXX____________________ Data delay found: 37 09:39:18:setup_element:INFO: Eye window for uplink 30: ________________XXXXXXX_________________ Data delay found: 39 09:39:18:setup_element:INFO: Eye window for uplink 31: ________________XXXXX___________________ Data delay found: 38 09:39:18:setup_element:INFO: Setting the data phase to 32 for uplink 24 09:39:18:setup_element:INFO: Setting the data phase to 34 for uplink 25 09:39:18:setup_element:INFO: Setting the data phase to 34 for uplink 26 09:39:18:setup_element:INFO: Setting the data phase to 36 for uplink 27 09:39:18:setup_element:INFO: Setting the data phase to 38 for uplink 28 09:39:18:setup_element:INFO: Setting the data phase to 37 for uplink 29 09:39:18:setup_element:INFO: Setting the data phase to 39 for uplink 30 09:39:18:setup_element:INFO: Setting the data phase to 38 for uplink 31 09:39:18:setup_element:INFO: Beginning SMX ASICs map scan 09:39:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:39:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:39:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:39:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:39:18:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 09:39:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:39:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:39:19:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:39:19:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:39:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:39:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:39:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:39:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:39:21:setup_element:INFO: Performing Elink synchronization 09:39:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:39:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:39:21:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:39:21:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:39:21:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:39:21:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 09:39:21:febtest:INFO: Init all SMX (CSA): 30 09:39:29:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:39:29:febtest:INFO: 30-01 | XA-000-09-004-019-003-018-03 | 44.1 | 1130.0 09:39:29:febtest:INFO: 28-03 | XA-000-09-004-019-009-010-11 | 34.6 | 1171.5 09:39:29:febtest:INFO: 26-05 | XA-000-09-004-019-006-010-15 | 40.9 | 1141.9 09:39:30:febtest:INFO: 24-07 | XA-000-09-004-019-009-011-11 | 34.6 | 1159.7 09:39:31:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 09:39:33:ST3_smx:INFO: chip: 30-1 44.073563 C 1141.874115 mV 09:39:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:39:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:39:33:ST3_smx:INFO: Electrons 09:39:33:ST3_smx:INFO: # loops 0 09:39:35:ST3_smx:INFO: # loops 1 09:39:36:ST3_smx:INFO: # loops 2 09:39:39:ST3_smx:INFO: Total # of broken channels: 0 09:39:39:ST3_smx:INFO: List of broken channels: [] 09:39:39:ST3_smx:INFO: Total # of broken channels: 0 09:39:39:ST3_smx:INFO: List of broken channels: [] 09:39:40:ST3_smx:INFO: chip: 28-3 34.556970 C 1177.390875 mV 09:39:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:39:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:39:40:ST3_smx:INFO: Electrons 09:39:40:ST3_smx:INFO: # loops 0 09:39:42:ST3_smx:INFO: # loops 1 09:39:44:ST3_smx:INFO: # loops 2 09:39:46:ST3_smx:INFO: Total # of broken channels: 0 09:39:46:ST3_smx:INFO: List of broken channels: [] 09:39:46:ST3_smx:INFO: Total # of broken channels: 0 09:39:46:ST3_smx:INFO: List of broken channels: [] 09:39:47:ST3_smx:INFO: chip: 26-5 40.898880 C 1153.732915 mV 09:39:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:39:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:39:47:ST3_smx:INFO: Electrons 09:39:47:ST3_smx:INFO: # loops 0 09:39:49:ST3_smx:INFO: # loops 1 09:39:51:ST3_smx:INFO: # loops 2 09:39:53:ST3_smx:INFO: Total # of broken channels: 0 09:39:53:ST3_smx:INFO: List of broken channels: [] 09:39:53:ST3_smx:INFO: Total # of broken channels: 0 09:39:53:ST3_smx:INFO: List of broken channels: [] 09:39:55:ST3_smx:INFO: chip: 24-7 37.726682 C 1171.483840 mV 09:39:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:39:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:39:55:ST3_smx:INFO: Electrons 09:39:55:ST3_smx:INFO: # loops 0 09:39:56:ST3_smx:INFO: # loops 1 09:39:58:ST3_smx:INFO: # loops 2 09:40:00:ST3_smx:INFO: Total # of broken channels: 0 09:40:00:ST3_smx:INFO: List of broken channels: [] 09:40:00:ST3_smx:INFO: Total # of broken channels: 0 09:40:00:ST3_smx:INFO: List of broken channels: [] 09:40:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:40:00:febtest:INFO: 30-01 | XA-000-09-004-019-003-018-03 | 44.1 | 1159.7 09:40:01:febtest:INFO: 28-03 | XA-000-09-004-019-009-010-11 | 34.6 | 1201.0 09:40:01:febtest:INFO: 26-05 | XA-000-09-004-019-006-010-15 | 40.9 | 1177.4 09:40:01:febtest:INFO: 24-07 | XA-000-09-004-019-009-011-11 | 37.7 | 1195.1 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_06_13-09_39_10 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4181| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.453', '0.7579', '1.850', '1.3020'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0180', '1.850', '1.3190'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9991', '1.850', '0.2695']