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FEB_4181 16.06.25 13:31:19
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13:31:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:31:19:ST3_Shared:INFO: FEB-Microcable
13:31:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:31:19:febtest:INFO: Testing FEB with SN 4181
13:31:21:smx_tester:INFO: Scanning setup
13:31:21:elinks:INFO: Disabling clock on downlink 0
13:31:21:elinks:INFO: Disabling clock on downlink 1
13:31:21:elinks:INFO: Disabling clock on downlink 2
13:31:21:elinks:INFO: Disabling clock on downlink 3
13:31:21:elinks:INFO: Disabling clock on downlink 4
13:31:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:31:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:31:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:31:21:elinks:INFO: Disabling clock on downlink 0
13:31:21:elinks:INFO: Disabling clock on downlink 1
13:31:21:elinks:INFO: Disabling clock on downlink 2
13:31:21:elinks:INFO: Disabling clock on downlink 3
13:31:21:elinks:INFO: Disabling clock on downlink 4
13:31:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:31:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:31:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:31:21:elinks:INFO: Disabling clock on downlink 0
13:31:21:elinks:INFO: Disabling clock on downlink 1
13:31:21:elinks:INFO: Disabling clock on downlink 2
13:31:21:elinks:INFO: Disabling clock on downlink 3
13:31:21:elinks:INFO: Disabling clock on downlink 4
13:31:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:31:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:31:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:31:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:31:21:elinks:INFO: Disabling clock on downlink 0
13:31:21:elinks:INFO: Disabling clock on downlink 1
13:31:21:elinks:INFO: Disabling clock on downlink 2
13:31:21:elinks:INFO: Disabling clock on downlink 3
13:31:21:elinks:INFO: Disabling clock on downlink 4
13:31:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:31:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:31:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:31:21:elinks:INFO: Disabling clock on downlink 0
13:31:21:elinks:INFO: Disabling clock on downlink 1
13:31:21:elinks:INFO: Disabling clock on downlink 2
13:31:21:elinks:INFO: Disabling clock on downlink 3
13:31:21:elinks:INFO: Disabling clock on downlink 4
13:31:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:31:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:31:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:31:21:setup_element:INFO: Scanning clock phase
13:31:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:31:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:22:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:31:22:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:31:22:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:31:22:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:31:22:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:31:22:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXXX___
Clock Delay: 34
13:31:22:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXXX___
Clock Delay: 34
13:31:22:setup_element:INFO: Eye window for uplink 22: __________________________________________________________________________XXXXX_
Clock Delay: 36
13:31:22:setup_element:INFO: Eye window for uplink 23: __________________________________________________________________________XXXXX_
Clock Delay: 36
13:31:22:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:31:22:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:31:22:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:31:22:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:31:22:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
13:31:22:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
13:31:22:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:31:22:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:31:22:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
13:31:22:setup_element:INFO: Scanning data phases
13:31:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:31:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:27:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:31:27:setup_element:INFO: Eye window for uplink 16: __________________________________XXXXX_
Data delay found: 16
13:31:27:setup_element:INFO: Eye window for uplink 17: _________________________________XXXX___
Data delay found: 14
13:31:27:setup_element:INFO: Eye window for uplink 18: XXX_________________________________XXXX
Data delay found: 19
13:31:27:setup_element:INFO: Eye window for uplink 19: XXX_________________________________XXXX
Data delay found: 19
13:31:27:setup_element:INFO: Eye window for uplink 20: X___________________________________XXXX
Data delay found: 18
13:31:27:setup_element:INFO: Eye window for uplink 21: XX___________________________________XXX
Data delay found: 19
13:31:27:setup_element:INFO: Eye window for uplink 22: XXX___________________________________XX
Data delay found: 20
13:31:27:setup_element:INFO: Eye window for uplink 23: X__________________________________XXXXX
Data delay found: 17
13:31:27:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
13:31:27:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_________________________
Data delay found: 31
13:31:27:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
13:31:27:setup_element:INFO: Eye window for uplink 27: ____________XXXXXX______________________
Data delay found: 34
13:31:27:setup_element:INFO: Eye window for uplink 28: _______________XXXX_____________________
Data delay found: 36
13:31:27:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
13:31:27:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
13:31:27:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX___________________
Data delay found: 37
13:31:27:setup_element:INFO: Setting the data phase to 16 for uplink 16
13:31:27:setup_element:INFO: Setting the data phase to 14 for uplink 17
13:31:27:setup_element:INFO: Setting the data phase to 19 for uplink 18
13:31:27:setup_element:INFO: Setting the data phase to 19 for uplink 19
13:31:27:setup_element:INFO: Setting the data phase to 18 for uplink 20
13:31:27:setup_element:INFO: Setting the data phase to 19 for uplink 21
13:31:27:setup_element:INFO: Setting the data phase to 20 for uplink 22
13:31:27:setup_element:INFO: Setting the data phase to 17 for uplink 23
13:31:27:setup_element:INFO: Setting the data phase to 29 for uplink 24
13:31:27:setup_element:INFO: Setting the data phase to 31 for uplink 25
13:31:27:setup_element:INFO: Setting the data phase to 32 for uplink 26
13:31:27:setup_element:INFO: Setting the data phase to 34 for uplink 27
13:31:27:setup_element:INFO: Setting the data phase to 36 for uplink 28
13:31:27:setup_element:INFO: Setting the data phase to 36 for uplink 29
13:31:27:setup_element:INFO: Setting the data phase to 38 for uplink 30
13:31:27:setup_element:INFO: Setting the data phase to 37 for uplink 31
13:31:27:setup_element:INFO: Beginning SMX ASICs map scan
13:31:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:31:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:31:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:31:27:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:31:27:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:31:27:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:31:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:31:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:31:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:31:28:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:31:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:31:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:31:28:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:31:28:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:31:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:31:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:31:28:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:31:28:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:31:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:31:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:31:30:setup_element:INFO: Performing Elink synchronization
13:31:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:31:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:31:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:31:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:31:30:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:31:30:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:31:31:febtest:INFO: Init all SMX (CSA): 30
13:31:44:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:31:44:febtest:INFO: 23-00 | XA-000-09-004-019-003-010-04 | 31.4 | 1189.2
13:31:45:febtest:INFO: 30-01 | XA-000-09-004-019-003-018-03 | 47.3 | 1124.0
13:31:45:febtest:INFO: 21-02 | XA-000-09-004-019-012-010-00 | 37.7 | 1165.6
13:31:45:febtest:INFO: 28-03 | XA-000-09-004-019-009-010-11 | 40.9 | 1159.7
13:31:45:febtest:INFO: 19-04 | XA-000-09-004-019-012-011-00 | 34.6 | 1171.5
13:31:45:febtest:INFO: 26-05 | XA-000-09-004-019-006-010-15 | 47.3 | 1141.9
13:31:46:febtest:INFO: 17-06 | XA-000-09-004-019-009-009-11 | 44.1 | 1141.9
13:31:46:febtest:INFO: 24-07 | XA-000-09-004-019-009-011-11 | 40.9 | 1159.7
13:31:47:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:31:49:ST3_smx:INFO: chip: 23-0 31.389742 C 1206.851500 mV
13:31:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:49:ST3_smx:INFO: Electrons
13:31:49:ST3_smx:INFO: # loops 0
13:31:50:ST3_smx:INFO: # loops 1
13:31:52:ST3_smx:INFO: # loops 2
13:31:53:ST3_smx:INFO: Total # of broken channels: 0
13:31:53:ST3_smx:INFO: List of broken channels: []
13:31:53:ST3_smx:INFO: Total # of broken channels: 0
13:31:53:ST3_smx:INFO: List of broken channels: []
13:31:55:ST3_smx:INFO: chip: 30-1 47.250730 C 1135.937260 mV
13:31:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:31:55:ST3_smx:INFO: Electrons
13:31:55:ST3_smx:INFO: # loops 0
13:31:57:ST3_smx:INFO: # loops 1
13:31:58:ST3_smx:INFO: # loops 2
13:32:00:ST3_smx:INFO: Total # of broken channels: 0
13:32:00:ST3_smx:INFO: List of broken channels: []
13:32:00:ST3_smx:INFO: Total # of broken channels: 0
13:32:00:ST3_smx:INFO: List of broken channels: []
13:32:02:ST3_smx:INFO: chip: 21-2 37.726682 C 1177.390875 mV
13:32:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:02:ST3_smx:INFO: Electrons
13:32:02:ST3_smx:INFO: # loops 0
13:32:04:ST3_smx:INFO: # loops 1
13:32:05:ST3_smx:INFO: # loops 2
13:32:07:ST3_smx:INFO: Total # of broken channels: 4
13:32:07:ST3_smx:INFO: List of broken channels: [108, 110, 112, 124]
13:32:07:ST3_smx:INFO: Total # of broken channels: 10
13:32:07:ST3_smx:INFO: List of broken channels: [108, 110, 112, 114, 116, 118, 120, 122, 124, 126]
13:32:08:ST3_smx:INFO: chip: 28-3 40.898880 C 1177.390875 mV
13:32:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:08:ST3_smx:INFO: Electrons
13:32:08:ST3_smx:INFO: # loops 0
13:32:10:ST3_smx:INFO: # loops 1
13:32:12:ST3_smx:INFO: # loops 2
13:32:13:ST3_smx:INFO: Total # of broken channels: 0
13:32:13:ST3_smx:INFO: List of broken channels: []
13:32:13:ST3_smx:INFO: Total # of broken channels: 0
13:32:13:ST3_smx:INFO: List of broken channels: []
13:32:15:ST3_smx:INFO: chip: 19-4 37.726682 C 1183.292940 mV
13:32:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:15:ST3_smx:INFO: Electrons
13:32:15:ST3_smx:INFO: # loops 0
13:32:17:ST3_smx:INFO: # loops 1
13:32:18:ST3_smx:INFO: # loops 2
13:32:20:ST3_smx:INFO: Total # of broken channels: 0
13:32:20:ST3_smx:INFO: List of broken channels: []
13:32:20:ST3_smx:INFO: Total # of broken channels: 0
13:32:20:ST3_smx:INFO: List of broken channels: []
13:32:22:ST3_smx:INFO: chip: 26-5 47.250730 C 1153.732915 mV
13:32:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:22:ST3_smx:INFO: Electrons
13:32:22:ST3_smx:INFO: # loops 0
13:32:23:ST3_smx:INFO: # loops 1
13:32:25:ST3_smx:INFO: # loops 2
13:32:27:ST3_smx:INFO: Total # of broken channels: 0
13:32:27:ST3_smx:INFO: List of broken channels: []
13:32:27:ST3_smx:INFO: Total # of broken channels: 0
13:32:27:ST3_smx:INFO: List of broken channels: []
13:32:28:ST3_smx:INFO: chip: 17-6 44.073563 C 1153.732915 mV
13:32:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:28:ST3_smx:INFO: Electrons
13:32:28:ST3_smx:INFO: # loops 0
13:32:30:ST3_smx:INFO: # loops 1
13:32:32:ST3_smx:INFO: # loops 2
13:32:33:ST3_smx:INFO: Total # of broken channels: 0
13:32:33:ST3_smx:INFO: List of broken channels: []
13:32:33:ST3_smx:INFO: Total # of broken channels: 0
13:32:33:ST3_smx:INFO: List of broken channels: []
13:32:35:ST3_smx:INFO: chip: 24-7 40.898880 C 1171.483840 mV
13:32:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:32:35:ST3_smx:INFO: Electrons
13:32:35:ST3_smx:INFO: # loops 0
13:32:37:ST3_smx:INFO: # loops 1
13:32:39:ST3_smx:INFO: # loops 2
13:32:40:ST3_smx:INFO: Total # of broken channels: 0
13:32:40:ST3_smx:INFO: List of broken channels: []
13:32:40:ST3_smx:INFO: Total # of broken channels: 0
13:32:40:ST3_smx:INFO: List of broken channels: []
13:32:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:32:41:febtest:INFO: 23-00 | XA-000-09-004-019-003-010-04 | 31.4 | 1271.2
13:32:41:febtest:INFO: 30-01 | XA-000-09-004-019-003-018-03 | 50.4 | 1159.7
13:32:41:febtest:INFO: 21-02 | XA-000-09-004-019-012-010-00 | 37.7 | 1201.0
13:32:42:febtest:INFO: 28-03 | XA-000-09-004-019-009-010-11 | 40.9 | 1195.1
13:32:42:febtest:INFO: 19-04 | XA-000-09-004-019-012-011-00 | 37.7 | 1212.7
13:32:42:febtest:INFO: 26-05 | XA-000-09-004-019-006-010-15 | 47.3 | 1177.4
13:32:42:febtest:INFO: 17-06 | XA-000-09-004-019-009-009-11 | 47.3 | 1171.5
13:32:42:febtest:INFO: 24-07 | XA-000-09-004-019-009-011-11 | 44.1 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_16-13_31_19
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4181| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '1.5500', '1.850', '2.5180']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0220', '1.850', '2.6080']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9910', '1.850', '0.5318']