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FEB_4182 01.07.25 10:54:41
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10:54:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:54:41:ST3_Shared:INFO: FEB-Microcable
10:54:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:54:41:febtest:INFO: Testing FEB with SN 4182
10:54:43:smx_tester:INFO: Scanning setup
10:54:43:elinks:INFO: Disabling clock on downlink 0
10:54:43:elinks:INFO: Disabling clock on downlink 1
10:54:43:elinks:INFO: Disabling clock on downlink 2
10:54:43:elinks:INFO: Disabling clock on downlink 3
10:54:43:elinks:INFO: Disabling clock on downlink 4
10:54:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:54:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:43:elinks:INFO: Disabling clock on downlink 0
10:54:43:elinks:INFO: Disabling clock on downlink 1
10:54:43:elinks:INFO: Disabling clock on downlink 2
10:54:43:elinks:INFO: Disabling clock on downlink 3
10:54:43:elinks:INFO: Disabling clock on downlink 4
10:54:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:54:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:43:elinks:INFO: Disabling clock on downlink 0
10:54:43:elinks:INFO: Disabling clock on downlink 1
10:54:43:elinks:INFO: Disabling clock on downlink 2
10:54:43:elinks:INFO: Disabling clock on downlink 3
10:54:43:elinks:INFO: Disabling clock on downlink 4
10:54:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:54:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:54:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:54:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:54:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:54:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:54:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:54:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:54:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:43:elinks:INFO: Disabling clock on downlink 0
10:54:43:elinks:INFO: Disabling clock on downlink 1
10:54:43:elinks:INFO: Disabling clock on downlink 2
10:54:43:elinks:INFO: Disabling clock on downlink 3
10:54:43:elinks:INFO: Disabling clock on downlink 4
10:54:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:54:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:44:elinks:INFO: Disabling clock on downlink 0
10:54:44:elinks:INFO: Disabling clock on downlink 1
10:54:44:elinks:INFO: Disabling clock on downlink 2
10:54:44:elinks:INFO: Disabling clock on downlink 3
10:54:44:elinks:INFO: Disabling clock on downlink 4
10:54:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:54:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:44:setup_element:INFO: Scanning clock phase
10:54:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:54:44:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:54:44:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:54:44:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:54:44:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:54:44:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:54:44:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:54:44:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:54:44:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:54:44:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:54:44:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
10:54:44:setup_element:INFO: Scanning data phases
10:54:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:54:49:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:54:49:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
10:54:49:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
10:54:49:setup_element:INFO: Eye window for uplink 26: _______XXXXXXX__________________________
Data delay found: 30
10:54:49:setup_element:INFO: Eye window for uplink 27: _________XXXXXXX________________________
Data delay found: 32
10:54:49:setup_element:INFO: Eye window for uplink 28: ______________XXXXXX____________________
Data delay found: 36
10:54:49:setup_element:INFO: Eye window for uplink 29: _______________XXXXX____________________
Data delay found: 37
10:54:49:setup_element:INFO: Eye window for uplink 30: ________________XXXXXXXX________________
Data delay found: 39
10:54:49:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
10:54:49:setup_element:INFO: Setting the data phase to 29 for uplink 24
10:54:49:setup_element:INFO: Setting the data phase to 31 for uplink 25
10:54:49:setup_element:INFO: Setting the data phase to 30 for uplink 26
10:54:49:setup_element:INFO: Setting the data phase to 32 for uplink 27
10:54:49:setup_element:INFO: Setting the data phase to 36 for uplink 28
10:54:49:setup_element:INFO: Setting the data phase to 37 for uplink 29
10:54:49:setup_element:INFO: Setting the data phase to 39 for uplink 30
10:54:49:setup_element:INFO: Setting the data phase to 38 for uplink 31
10:54:49:setup_element:INFO: Beginning SMX ASICs map scan
10:54:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:54:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:54:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:54:49:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:54:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:54:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:54:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:54:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:54:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:54:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:54:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:54:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:54:52:setup_element:INFO: Performing Elink synchronization
10:54:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:54:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:54:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:54:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:54:52:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:54:52:febtest:INFO: Init all SMX (CSA): 30
10:55:02:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:55:02:febtest:INFO: 30-01 | XA-000-09-004-019-006-005-15 | 56.8 | 1094.2
10:55:03:febtest:INFO: 28-03 | XA-000-09-004-019-012-005-00 | 37.7 | 1159.7
10:55:03:febtest:INFO: 26-05 | XA-000-09-004-019-011-021-15 | 53.6 | 1112.1
10:55:03:febtest:INFO: 24-07 | XA-000-09-004-019-014-021-04 | 21.9 | 1218.6
10:55:04:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:55:06:ST3_smx:INFO: chip: 30-1 56.797143 C 1106.178435 mV
10:55:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:06:ST3_smx:INFO: Electrons
10:55:06:ST3_smx:INFO: # loops 0
10:55:08:ST3_smx:INFO: # loops 1
10:55:10:ST3_smx:INFO: # loops 2
10:55:12:ST3_smx:INFO: Total # of broken channels: 0
10:55:12:ST3_smx:INFO: List of broken channels: []
10:55:12:ST3_smx:INFO: Total # of broken channels: 0
10:55:12:ST3_smx:INFO: List of broken channels: []
10:55:14:ST3_smx:INFO: chip: 28-3 37.726682 C 1171.483840 mV
10:55:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:14:ST3_smx:INFO: Electrons
10:55:14:ST3_smx:INFO: # loops 0
10:55:16:ST3_smx:INFO: # loops 1
10:55:18:ST3_smx:INFO: # loops 2
10:55:20:ST3_smx:INFO: Total # of broken channels: 0
10:55:20:ST3_smx:INFO: List of broken channels: []
10:55:20:ST3_smx:INFO: Total # of broken channels: 0
10:55:20:ST3_smx:INFO: List of broken channels: []
10:55:21:ST3_smx:INFO: chip: 26-5 53.612520 C 1124.048640 mV
10:55:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:21:ST3_smx:INFO: Electrons
10:55:21:ST3_smx:INFO: # loops 0
10:55:23:ST3_smx:INFO: # loops 1
10:55:25:ST3_smx:INFO: # loops 2
10:55:27:ST3_smx:INFO: Total # of broken channels: 0
10:55:27:ST3_smx:INFO: List of broken channels: []
10:55:27:ST3_smx:INFO: Total # of broken channels: 3
10:55:27:ST3_smx:INFO: List of broken channels: [80, 115, 119]
10:55:28:ST3_smx:INFO: chip: 24-7 21.902970 C 1230.330540 mV
10:55:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:28:ST3_smx:INFO: Electrons
10:55:28:ST3_smx:INFO: # loops 0
10:55:30:ST3_smx:INFO: # loops 1
10:55:32:ST3_smx:INFO: # loops 2
10:55:34:ST3_smx:INFO: Total # of broken channels: 0
10:55:34:ST3_smx:INFO: List of broken channels: []
10:55:34:ST3_smx:INFO: Total # of broken channels: 0
10:55:34:ST3_smx:INFO: List of broken channels: []
10:55:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:55:35:febtest:INFO: 30-01 | XA-000-09-004-019-006-005-15 | 56.8 | 1130.0
10:55:35:febtest:INFO: 28-03 | XA-000-09-004-019-012-005-00 | 37.7 | 1195.1
10:55:35:febtest:INFO: 26-05 | XA-000-09-004-019-011-021-15 | 53.6 | 1141.9
10:55:35:febtest:INFO: 24-07 | XA-000-09-004-019-014-021-04 | 21.9 | 1253.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_01-10_54_41
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4182| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7687', '1.848', '1.1320']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0080', '1.850', '1.3210']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9944', '1.850', '0.2678']