DTL-STS tests database

FEB_4186 01.07.25 10:41:14

link: XA-000-09-004-019-008-008-06
...SMX_0.root
link: XA-000-09-004-019-008-009-06
...SMX_2.root
link: XA-000-09-004-019-005-007-01
...SMX_4.root
link: XA-000-09-004-019-011-008-08
...SMX_6.root
link: XA-000-09-004-019-010-020-02
...SMX_1.root
link: XA-000-09-004-019-016-021-01
...SMX_3.root
link: XA-000-09-004-019-013-020-10
...SMX_5.root
link: XA-000-09-004-019-005-008-01
...SMX_7.root
link: XA-000-09-004-019-005-008-01
...VddmCSAstatus.root
TextEdit.txt
            10:41:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:41:14:ST3_Shared:INFO:	                         FEB-Sensor                         
10:41:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:41:35:ST3_ModuleSelector:INFO:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M7UR0B4011594B2

10:41:35:ST3_ModuleSelector:INFO:	28264

10:41:35:febtest:INFO:	Testing FEB with SN 4186
10:41:37:smx_tester:INFO:	Scanning setup
10:41:37:elinks:INFO:	Disabling clock on downlink 0
10:41:37:elinks:INFO:	Disabling clock on downlink 1
10:41:37:elinks:INFO:	Disabling clock on downlink 2
10:41:37:elinks:INFO:	Disabling clock on downlink 3
10:41:37:elinks:INFO:	Disabling clock on downlink 4
10:41:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:41:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:41:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:41:37:elinks:INFO:	Disabling clock on downlink 0
10:41:37:elinks:INFO:	Disabling clock on downlink 1
10:41:37:elinks:INFO:	Disabling clock on downlink 2
10:41:37:elinks:INFO:	Disabling clock on downlink 3
10:41:37:elinks:INFO:	Disabling clock on downlink 4
10:41:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:41:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:41:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:41:37:elinks:INFO:	Disabling clock on downlink 0
10:41:37:elinks:INFO:	Disabling clock on downlink 1
10:41:37:elinks:INFO:	Disabling clock on downlink 2
10:41:37:elinks:INFO:	Disabling clock on downlink 3
10:41:37:elinks:INFO:	Disabling clock on downlink 4
10:41:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:41:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:41:37:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:41:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:41:37:elinks:INFO:	Disabling clock on downlink 0
10:41:37:elinks:INFO:	Disabling clock on downlink 1
10:41:37:elinks:INFO:	Disabling clock on downlink 2
10:41:37:elinks:INFO:	Disabling clock on downlink 3
10:41:37:elinks:INFO:	Disabling clock on downlink 4
10:41:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:41:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:41:37:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:41:37:elinks:INFO:	Disabling clock on downlink 0
10:41:37:elinks:INFO:	Disabling clock on downlink 1
10:41:37:elinks:INFO:	Disabling clock on downlink 2
10:41:37:elinks:INFO:	Disabling clock on downlink 3
10:41:37:elinks:INFO:	Disabling clock on downlink 4
10:41:37:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:41:37:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:41:38:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:41:38:setup_element:INFO:	Scanning clock phase
10:41:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:41:38:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:41:38:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:41:38:setup_element:INFO:	Eye window for uplink 16: _________________________________________________________________________XXXX___
Clock Delay: 34
10:41:38:setup_element:INFO:	Eye window for uplink 17: _________________________________________________________________________XXXX___
Clock Delay: 34
10:41:38:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:41:38:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:41:38:setup_element:INFO:	Eye window for uplink 20: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:41:38:setup_element:INFO:	Eye window for uplink 21: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:41:38:setup_element:INFO:	Eye window for uplink 22: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:41:38:setup_element:INFO:	Eye window for uplink 23: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:41:38:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:41:38:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:41:38:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:41:38:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:41:38:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:41:38:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:41:38:setup_element:INFO:	Eye window for uplink 30: __________________________________________________________________________XXXXX_
Clock Delay: 36
10:41:38:setup_element:INFO:	Eye window for uplink 31: __________________________________________________________________________XXXXX_
Clock Delay: 36
10:41:38:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
10:41:38:setup_element:INFO:	Scanning data phases
10:41:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:41:38:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:41:43:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:41:43:setup_element:INFO:	Eye window for uplink 16: XXX__________________________________XXX
Data delay found: 19
10:41:43:setup_element:INFO:	Eye window for uplink 17: XX__________________________________XXXX
Data delay found: 18
10:41:43:setup_element:INFO:	Eye window for uplink 18: XXX___________________________________XX
Data delay found: 20
10:41:43:setup_element:INFO:	Eye window for uplink 19: XXXX__________________________________XX
Data delay found: 20
10:41:43:setup_element:INFO:	Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
10:41:43:setup_element:INFO:	Eye window for uplink 21: XXXX__________________________XXXXXXXXXX
Data delay found: 16
10:41:43:setup_element:INFO:	Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
10:41:43:setup_element:INFO:	Eye window for uplink 23: __________________________________XXXXX_
Data delay found: 16
10:41:43:setup_element:INFO:	Eye window for uplink 24: _________XXXXX__________________________
Data delay found: 31
10:41:43:setup_element:INFO:	Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
10:41:43:setup_element:INFO:	Eye window for uplink 26: __________XXXXXXX_______________________
Data delay found: 33
10:41:43:setup_element:INFO:	Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
10:41:43:setup_element:INFO:	Eye window for uplink 28: ________________XXXXX___________________
Data delay found: 38
10:41:43:setup_element:INFO:	Eye window for uplink 29: _______________XXXXX____________________
Data delay found: 37
10:41:43:setup_element:INFO:	Eye window for uplink 30: ___________________XXXXXX_______________
Data delay found: 1
10:41:43:setup_element:INFO:	Eye window for uplink 31: __________________XXXXX_________________
Data delay found: 0
10:41:43:setup_element:INFO:	Setting the data phase to 19 for uplink 16
10:41:43:setup_element:INFO:	Setting the data phase to 18 for uplink 17
10:41:43:setup_element:INFO:	Setting the data phase to 20 for uplink 18
10:41:43:setup_element:INFO:	Setting the data phase to 20 for uplink 19
10:41:43:setup_element:INFO:	Setting the data phase to 15 for uplink 20
10:41:43:setup_element:INFO:	Setting the data phase to 16 for uplink 21
10:41:43:setup_element:INFO:	Setting the data phase to 19 for uplink 22
10:41:43:setup_element:INFO:	Setting the data phase to 16 for uplink 23
10:41:43:setup_element:INFO:	Setting the data phase to 31 for uplink 24
10:41:43:setup_element:INFO:	Setting the data phase to 33 for uplink 25
10:41:43:setup_element:INFO:	Setting the data phase to 33 for uplink 26
10:41:43:setup_element:INFO:	Setting the data phase to 35 for uplink 27
10:41:43:setup_element:INFO:	Setting the data phase to 38 for uplink 28
10:41:43:setup_element:INFO:	Setting the data phase to 37 for uplink 29
10:41:43:setup_element:INFO:	Setting the data phase to 1 for uplink 30
10:41:43:setup_element:INFO:	Setting the data phase to 0 for uplink 31
10:41:43:setup_element:INFO:	Beginning SMX ASICs map scan
10:41:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:41:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:41:43:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:41:43:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:41:43:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:41:43:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:41:43:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:41:43:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:41:43:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:41:44:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:41:44:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:41:44:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:41:44:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:41:44:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:41:44:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:41:44:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:41:44:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:41:44:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:41:44:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:41:45:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:41:45:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:41:46:setup_element:INFO:	Performing Elink synchronization
10:41:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:41:46:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:41:46:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:41:46:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:41:46:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:41:46:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:41:47:febtest:INFO:	Init all SMX (CSA): 30
10:42:03:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:42:03:febtest:INFO:	23-00 | XA-000-09-004-019-008-008-06 |  37.7 | 1147.8
10:42:04:febtest:INFO:	30-01 | XA-000-09-004-019-010-020-02 |  40.9 | 1130.0
10:42:04:febtest:INFO:	21-02 | XA-000-09-004-019-008-009-06 |  34.6 | 1165.6
10:42:04:febtest:INFO:	28-03 | XA-000-09-004-019-016-021-01 |  18.7 | 1224.5
10:42:04:febtest:INFO:	19-04 | XA-000-09-004-019-005-007-01 |  31.4 | 1171.5
10:42:04:febtest:INFO:	26-05 | XA-000-09-004-019-013-020-10 |  25.1 | 1212.7
10:42:05:febtest:INFO:	17-06 | XA-000-09-004-019-011-008-08 |  44.1 | 1135.9
10:42:05:febtest:INFO:	24-07 | XA-000-09-004-019-005-008-01 |  37.7 | 1159.7
10:42:06:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:42:08:ST3_smx:INFO:	chip: 23-0 	 37.726682 C 	 1159.654860 mV
10:42:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:08:ST3_smx:INFO:		Electrons
10:42:08:ST3_smx:INFO:	# loops 0
10:42:10:ST3_smx:INFO:	# loops 1
10:42:12:ST3_smx:INFO:	# loops 2
10:42:14:ST3_smx:INFO:	Total # of broken channels: 0
10:42:14:ST3_smx:INFO:	List of broken channels: []
10:42:14:ST3_smx:INFO:	Total # of broken channels: 0
10:42:14:ST3_smx:INFO:	List of broken channels: []
10:42:16:ST3_smx:INFO:	chip: 30-1 	 40.898880 C 	 1141.874115 mV
10:42:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:16:ST3_smx:INFO:		Electrons
10:42:16:ST3_smx:INFO:	# loops 0
10:42:18:ST3_smx:INFO:	# loops 1
10:42:20:ST3_smx:INFO:	# loops 2
10:42:22:ST3_smx:INFO:	Total # of broken channels: 0
10:42:22:ST3_smx:INFO:	List of broken channels: []
10:42:22:ST3_smx:INFO:	Total # of broken channels: 0
10:42:22:ST3_smx:INFO:	List of broken channels: []
10:42:24:ST3_smx:INFO:	chip: 21-2 	 34.556970 C 	 1177.390875 mV
10:42:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:24:ST3_smx:INFO:		Electrons
10:42:24:ST3_smx:INFO:	# loops 0
10:42:26:ST3_smx:INFO:	# loops 1
10:42:29:ST3_smx:INFO:	# loops 2
10:42:31:ST3_smx:INFO:	Total # of broken channels: 0
10:42:31:ST3_smx:INFO:	List of broken channels: []
10:42:31:ST3_smx:INFO:	Total # of broken channels: 0
10:42:31:ST3_smx:INFO:	List of broken channels: []
10:42:32:ST3_smx:INFO:	chip: 28-3 	 18.745682 C 	 1242.040240 mV
10:42:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:32:ST3_smx:INFO:		Electrons
10:42:32:ST3_smx:INFO:	# loops 0
10:42:34:ST3_smx:INFO:	# loops 1
10:42:37:ST3_smx:INFO:	# loops 2
10:42:39:ST3_smx:INFO:	Total # of broken channels: 0
10:42:39:ST3_smx:INFO:	List of broken channels: []
10:42:39:ST3_smx:INFO:	Total # of broken channels: 0
10:42:39:ST3_smx:INFO:	List of broken channels: []
10:42:41:ST3_smx:INFO:	chip: 19-4 	 34.556970 C 	 1183.292940 mV
10:42:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:41:ST3_smx:INFO:		Electrons
10:42:41:ST3_smx:INFO:	# loops 0
10:42:43:ST3_smx:INFO:	# loops 1
10:42:45:ST3_smx:INFO:	# loops 2
10:42:47:ST3_smx:INFO:	Total # of broken channels: 0
10:42:47:ST3_smx:INFO:	List of broken channels: []
10:42:47:ST3_smx:INFO:	Total # of broken channels: 0
10:42:47:ST3_smx:INFO:	List of broken channels: []
10:42:49:ST3_smx:INFO:	chip: 26-5 	 25.062742 C 	 1218.600960 mV
10:42:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:49:ST3_smx:INFO:		Electrons
10:42:49:ST3_smx:INFO:	# loops 0
10:42:51:ST3_smx:INFO:	# loops 1
10:42:53:ST3_smx:INFO:	# loops 2
10:42:56:ST3_smx:INFO:	Total # of broken channels: 0
10:42:56:ST3_smx:INFO:	List of broken channels: []
10:42:56:ST3_smx:INFO:	Total # of broken channels: 0
10:42:56:ST3_smx:INFO:	List of broken channels: []
10:42:57:ST3_smx:INFO:	chip: 17-6 	 47.250730 C 	 1147.806000 mV
10:42:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:42:57:ST3_smx:INFO:		Electrons
10:42:57:ST3_smx:INFO:	# loops 0
10:42:59:ST3_smx:INFO:	# loops 1
10:43:01:ST3_smx:INFO:	# loops 2
10:43:03:ST3_smx:INFO:	Total # of broken channels: 0
10:43:03:ST3_smx:INFO:	List of broken channels: []
10:43:03:ST3_smx:INFO:	Total # of broken channels: 0
10:43:03:ST3_smx:INFO:	List of broken channels: []
10:43:05:ST3_smx:INFO:	chip: 24-7 	 40.898880 C 	 1165.571835 mV
10:43:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:43:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:43:05:ST3_smx:INFO:		Electrons
10:43:05:ST3_smx:INFO:	# loops 0
10:43:07:ST3_smx:INFO:	# loops 1
10:43:09:ST3_smx:INFO:	# loops 2
10:43:11:ST3_smx:INFO:	Total # of broken channels: 0
10:43:11:ST3_smx:INFO:	List of broken channels: []
10:43:11:ST3_smx:INFO:	Total # of broken channels: 0
10:43:11:ST3_smx:INFO:	List of broken channels: []
10:43:12:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:43:12:febtest:INFO:	23-00 | XA-000-09-004-019-008-008-06 |  40.9 | 1177.4
10:43:12:febtest:INFO:	30-01 | XA-000-09-004-019-010-020-02 |  47.3 | 1165.6
10:43:12:febtest:INFO:	21-02 | XA-000-09-004-019-008-009-06 |  37.7 | 1201.0
10:43:12:febtest:INFO:	28-03 | XA-000-09-004-019-016-021-01 |  18.7 | 1271.2
10:43:13:febtest:INFO:	19-04 | XA-000-09-004-019-005-007-01 |  37.7 | 1201.0
10:43:13:febtest:INFO:	26-05 | XA-000-09-004-019-013-020-10 |  28.2 | 1247.9
10:43:13:febtest:INFO:	17-06 | XA-000-09-004-019-011-008-08 |  47.3 | 1165.6
10:43:13:febtest:INFO:	24-07 | XA-000-09-004-019-005-008-01 |  44.1 | 1189.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_07_01-10_41_14
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4186| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	28264

MODULE_NAME:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M7UR0B4011594B2

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4780', '1.846', '1.9760']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0230', '1.849', '2.5860']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9750', '1.850', '0.5257']
Comment.txt