FEB_4188 27.06.25 12:51:13
Info
12:51:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:51:13:ST3_Shared:INFO: FEB-Microcable
12:51:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:51:13:febtest:INFO: Testing FEB with SN 4188
12:51:14:smx_tester:INFO: Scanning setup
12:51:14:elinks:INFO: Disabling clock on downlink 0
12:51:14:elinks:INFO: Disabling clock on downlink 1
12:51:14:elinks:INFO: Disabling clock on downlink 2
12:51:14:elinks:INFO: Disabling clock on downlink 3
12:51:14:elinks:INFO: Disabling clock on downlink 4
12:51:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:51:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:51:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:51:14:elinks:INFO: Disabling clock on downlink 0
12:51:14:elinks:INFO: Disabling clock on downlink 1
12:51:14:elinks:INFO: Disabling clock on downlink 2
12:51:14:elinks:INFO: Disabling clock on downlink 3
12:51:14:elinks:INFO: Disabling clock on downlink 4
12:51:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:51:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:51:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:51:14:elinks:INFO: Disabling clock on downlink 0
12:51:14:elinks:INFO: Disabling clock on downlink 1
12:51:14:elinks:INFO: Disabling clock on downlink 2
12:51:14:elinks:INFO: Disabling clock on downlink 3
12:51:14:elinks:INFO: Disabling clock on downlink 4
12:51:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:51:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
12:51:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
12:51:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:51:15:elinks:INFO: Disabling clock on downlink 0
12:51:15:elinks:INFO: Disabling clock on downlink 1
12:51:15:elinks:INFO: Disabling clock on downlink 2
12:51:15:elinks:INFO: Disabling clock on downlink 3
12:51:15:elinks:INFO: Disabling clock on downlink 4
12:51:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:51:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:51:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:51:15:elinks:INFO: Disabling clock on downlink 0
12:51:15:elinks:INFO: Disabling clock on downlink 1
12:51:15:elinks:INFO: Disabling clock on downlink 2
12:51:15:elinks:INFO: Disabling clock on downlink 3
12:51:15:elinks:INFO: Disabling clock on downlink 4
12:51:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:51:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:51:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:51:15:setup_element:INFO: Scanning clock phase
12:51:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:51:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:51:15:setup_element:INFO: Clock phase scan results for group 0, downlink 2
12:51:15:setup_element:INFO: Eye window for uplink 16: _________________________________________________________________________XXXX___
Clock Delay: 34
12:51:15:setup_element:INFO: Eye window for uplink 17: _________________________________________________________________________XXXX___
Clock Delay: 34
12:51:15:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:51:15:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:51:15:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:51:15:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:51:15:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:51:15:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:51:15:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:51:15:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:51:15:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________XXXXX___
Clock Delay: 34
12:51:15:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________XXXXX___
Clock Delay: 34
12:51:15:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
12:51:15:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
12:51:15:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXX__
Clock Delay: 35
12:51:15:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXX__
Clock Delay: 35
12:51:15:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
12:51:15:setup_element:INFO: Scanning data phases
12:51:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:51:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:51:20:setup_element:INFO: Data phase scan results for group 0, downlink 2
12:51:20:setup_element:INFO: Eye window for uplink 16: XXXXX__________________________________X
Data delay found: 21
12:51:20:setup_element:INFO: Eye window for uplink 17: XXX___________________________________XX
Data delay found: 20
12:51:20:setup_element:INFO: Eye window for uplink 18: XXX___________________________________XX
Data delay found: 20
12:51:20:setup_element:INFO: Eye window for uplink 19: XXX__________________________________XXX
Data delay found: 19
12:51:20:setup_element:INFO: Eye window for uplink 20: X__________________________________XXXX_
Data delay found: 17
12:51:20:setup_element:INFO: Eye window for uplink 21: XX__________________________________XXXX
Data delay found: 18
12:51:20:setup_element:INFO: Eye window for uplink 22: XX___________________________________XXX
Data delay found: 19
12:51:20:setup_element:INFO: Eye window for uplink 23: __________________________________XXXXX_
Data delay found: 16
12:51:20:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
12:51:20:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
12:51:20:setup_element:INFO: Eye window for uplink 26: ____________XXXXXX______________________
Data delay found: 34
12:51:20:setup_element:INFO: Eye window for uplink 27: ______________XXXXXXX___________________
Data delay found: 37
12:51:20:setup_element:INFO: Eye window for uplink 28: _______________XXXXX____________________
Data delay found: 37
12:51:20:setup_element:INFO: Eye window for uplink 29: _______________XXXX_____________________
Data delay found: 36
12:51:20:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
12:51:20:setup_element:INFO: Eye window for uplink 31: ________________XXXXX___________________
Data delay found: 38
12:51:20:setup_element:INFO: Setting the data phase to 21 for uplink 16
12:51:20:setup_element:INFO: Setting the data phase to 20 for uplink 17
12:51:20:setup_element:INFO: Setting the data phase to 20 for uplink 18
12:51:20:setup_element:INFO: Setting the data phase to 19 for uplink 19
12:51:20:setup_element:INFO: Setting the data phase to 17 for uplink 20
12:51:20:setup_element:INFO: Setting the data phase to 18 for uplink 21
12:51:20:setup_element:INFO: Setting the data phase to 19 for uplink 22
12:51:20:setup_element:INFO: Setting the data phase to 16 for uplink 23
12:51:20:setup_element:INFO: Setting the data phase to 28 for uplink 24
12:51:20:setup_element:INFO: Setting the data phase to 30 for uplink 25
12:51:20:setup_element:INFO: Setting the data phase to 34 for uplink 26
12:51:20:setup_element:INFO: Setting the data phase to 37 for uplink 27
12:51:20:setup_element:INFO: Setting the data phase to 37 for uplink 28
12:51:20:setup_element:INFO: Setting the data phase to 36 for uplink 29
12:51:20:setup_element:INFO: Setting the data phase to 39 for uplink 30
12:51:20:setup_element:INFO: Setting the data phase to 38 for uplink 31
12:51:20:setup_element:INFO: Beginning SMX ASICs map scan
12:51:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:51:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:51:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:51:21:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:51:21:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:51:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
12:51:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
12:51:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:51:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:51:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
12:51:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
12:51:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:51:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:51:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
12:51:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
12:51:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:51:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:51:22:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
12:51:22:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
12:51:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:51:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:51:23:setup_element:INFO: Performing Elink synchronization
12:51:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:51:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:51:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:51:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:51:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
12:51:23:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
12:51:24:febtest:INFO: Init all SMX (CSA): 30
12:51:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:51:38:febtest:INFO: 23-00 | XA-000-09-004-019-017-012-11 | 25.1 | 1189.2
12:51:38:febtest:INFO: 30-01 | XA-000-09-004-019-005-012-01 | 28.2 | 1195.1
12:51:39:febtest:INFO: 21-02 | XA-000-09-004-037-003-009-14 | 25.1 | 1206.9
12:51:39:febtest:INFO: 28-03 | XA-000-09-004-019-002-012-09 | 34.6 | 1159.7
12:51:39:febtest:INFO: 19-04 | XA-000-09-004-019-014-013-03 | 40.9 | 1141.9
12:51:39:febtest:INFO: 26-05 | XA-000-09-004-019-002-011-09 | 37.7 | 1171.5
12:51:39:febtest:INFO: 17-06 | XA-000-09-004-019-002-014-09 | 34.6 | 1159.7
12:51:40:febtest:INFO: 24-07 | XA-000-09-004-019-014-012-03 | 34.6 | 1159.7
12:51:41:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:51:43:ST3_smx:INFO: chip: 23-0 25.062742 C 1200.969315 mV
12:51:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:51:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:51:43:ST3_smx:INFO: Electrons
12:51:43:ST3_smx:INFO: # loops 0
12:51:44:ST3_smx:INFO: # loops 1
12:51:46:ST3_smx:INFO: # loops 2
12:51:48:ST3_smx:INFO: Total # of broken channels: 0
12:51:48:ST3_smx:INFO: List of broken channels: []
12:51:48:ST3_smx:INFO: Total # of broken channels: 5
12:51:48:ST3_smx:INFO: List of broken channels: [56, 65, 69, 71, 74]
12:51:50:ST3_smx:INFO: chip: 30-1 28.225000 C 1212.728715 mV
12:51:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:51:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:51:50:ST3_smx:INFO: Electrons
12:51:50:ST3_smx:INFO: # loops 0
12:51:52:ST3_smx:INFO: # loops 1
12:51:53:ST3_smx:INFO: # loops 2
12:51:55:ST3_smx:INFO: Total # of broken channels: 0
12:51:55:ST3_smx:INFO: List of broken channels: []
12:51:55:ST3_smx:INFO: Total # of broken channels: 0
12:51:55:ST3_smx:INFO: List of broken channels: []
12:51:57:ST3_smx:INFO: chip: 21-2 25.062742 C 1218.600960 mV
12:51:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:51:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:51:57:ST3_smx:INFO: Electrons
12:51:57:ST3_smx:INFO: # loops 0
12:51:59:ST3_smx:INFO: # loops 1
12:52:01:ST3_smx:INFO: # loops 2
12:52:02:ST3_smx:INFO: Total # of broken channels: 0
12:52:02:ST3_smx:INFO: List of broken channels: []
12:52:02:ST3_smx:INFO: Total # of broken channels: 0
12:52:02:ST3_smx:INFO: List of broken channels: []
12:52:04:ST3_smx:INFO: chip: 28-3 37.726682 C 1171.483840 mV
12:52:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:52:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:52:04:ST3_smx:INFO: Electrons
12:52:04:ST3_smx:INFO: # loops 0
12:52:05:ST3_smx:INFO: # loops 1
12:52:07:ST3_smx:INFO: # loops 2
12:52:08:ST3_smx:INFO: Total # of broken channels: 0
12:52:08:ST3_smx:INFO: List of broken channels: []
12:52:08:ST3_smx:INFO: Total # of broken channels: 0
12:52:08:ST3_smx:INFO: List of broken channels: []
12:52:10:ST3_smx:INFO: chip: 19-4 40.898880 C 1153.732915 mV
12:52:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:52:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:52:10:ST3_smx:INFO: Electrons
12:52:10:ST3_smx:INFO: # loops 0
12:52:12:ST3_smx:INFO: # loops 1
12:52:13:ST3_smx:INFO: # loops 2
12:52:15:ST3_smx:INFO: Total # of broken channels: 0
12:52:15:ST3_smx:INFO: List of broken channels: []
12:52:15:ST3_smx:INFO: Total # of broken channels: 7
12:52:15:ST3_smx:INFO: List of broken channels: [57, 65, 67, 71, 73, 75, 77]
12:52:16:ST3_smx:INFO: chip: 26-5 37.726682 C 1189.190035 mV
12:52:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:52:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:52:16:ST3_smx:INFO: Electrons
12:52:16:ST3_smx:INFO: # loops 0
12:52:18:ST3_smx:INFO: # loops 1
12:52:20:ST3_smx:INFO: # loops 2
12:52:21:ST3_smx:INFO: Total # of broken channels: 0
12:52:21:ST3_smx:INFO: List of broken channels: []
12:52:21:ST3_smx:INFO: Total # of broken channels: 0
12:52:21:ST3_smx:INFO: List of broken channels: []
12:52:23:ST3_smx:INFO: chip: 17-6 37.726682 C 1171.483840 mV
12:52:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:52:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:52:23:ST3_smx:INFO: Electrons
12:52:23:ST3_smx:INFO: # loops 0
12:52:25:ST3_smx:INFO: # loops 1
12:52:26:ST3_smx:INFO: # loops 2
12:52:28:ST3_smx:INFO: Total # of broken channels: 0
12:52:28:ST3_smx:INFO: List of broken channels: []
12:52:28:ST3_smx:INFO: Total # of broken channels: 0
12:52:28:ST3_smx:INFO: List of broken channels: []
12:52:30:ST3_smx:INFO: chip: 24-7 37.726682 C 1171.483840 mV
12:52:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:52:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:52:30:ST3_smx:INFO: Electrons
12:52:30:ST3_smx:INFO: # loops 0
12:52:31:ST3_smx:INFO: # loops 1
12:52:33:ST3_smx:INFO: # loops 2
12:52:35:ST3_smx:INFO: Total # of broken channels: 0
12:52:35:ST3_smx:INFO: List of broken channels: []
12:52:35:ST3_smx:INFO: Total # of broken channels: 0
12:52:35:ST3_smx:INFO: List of broken channels: []
12:52:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:52:35:febtest:INFO: 23-00 | XA-000-09-004-019-017-012-11 | 28.2 | 1224.5
12:52:36:febtest:INFO: 30-01 | XA-000-09-004-019-005-012-01 | 31.4 | 1230.3
12:52:36:febtest:INFO: 21-02 | XA-000-09-004-037-003-009-14 | 28.2 | 1242.0
12:52:36:febtest:INFO: 28-03 | XA-000-09-004-019-002-012-09 | 40.9 | 1195.1
12:52:36:febtest:INFO: 19-04 | XA-000-09-004-019-014-013-03 | 44.1 | 1177.4
12:52:36:febtest:INFO: 26-05 | XA-000-09-004-019-002-011-09 | 37.7 | 1242.0
12:52:37:febtest:INFO: 17-06 | XA-000-09-004-019-002-014-09 | 40.9 | 1189.2
12:52:37:febtest:INFO: 24-07 | XA-000-09-004-019-014-012-03 | 37.7 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_06_27-12_51_13
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4188| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5600', '1.847', '2.6200']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9770', '1.850', '2.5460']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9490', '1.850', '0.5176']