DTL-STS tests database

FEB_4188 02.07.25 07:29:29

link: XA-000-09-004-019-017-012-11
...SMX_0.root
link: XA-000-09-004-037-003-009-14
...SMX_2.root
link: XA-000-09-004-019-014-013-03
...SMX_4.root
link: XA-000-09-004-019-002-014-09
...SMX_6.root
link: XA-000-09-004-019-005-012-01
...SMX_1.root
link: XA-000-09-004-019-002-012-09
...SMX_3.root
link: XA-000-09-004-019-002-011-09
...SMX_5.root
link: XA-000-09-004-019-014-012-03
...SMX_7.root
link: XA-000-09-004-019-014-012-03
...VddmCSAstatus.root
TextEdit.txt
            07:29:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:29:29:ST3_Shared:INFO:	                         FEB-Sensor                         
07:29:29:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:29:58:ST3_ModuleSelector:INFO:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M8UR1T1011221A2

07:29:58:ST3_ModuleSelector:INFO:	07233

07:29:58:febtest:INFO:	Testing FEB with SN 4188
07:29:59:smx_tester:INFO:	Scanning setup
07:29:59:elinks:INFO:	Disabling clock on downlink 0
07:29:59:elinks:INFO:	Disabling clock on downlink 1
07:29:59:elinks:INFO:	Disabling clock on downlink 2
07:29:59:elinks:INFO:	Disabling clock on downlink 3
07:29:59:elinks:INFO:	Disabling clock on downlink 4
07:29:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:29:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:30:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:30:00:elinks:INFO:	Disabling clock on downlink 0
07:30:00:elinks:INFO:	Disabling clock on downlink 1
07:30:00:elinks:INFO:	Disabling clock on downlink 2
07:30:00:elinks:INFO:	Disabling clock on downlink 3
07:30:00:elinks:INFO:	Disabling clock on downlink 4
07:30:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:30:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:30:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:30:00:elinks:INFO:	Disabling clock on downlink 0
07:30:00:elinks:INFO:	Disabling clock on downlink 1
07:30:00:elinks:INFO:	Disabling clock on downlink 2
07:30:00:elinks:INFO:	Disabling clock on downlink 3
07:30:00:elinks:INFO:	Disabling clock on downlink 4
07:30:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:30:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
07:30:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
07:30:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:30:00:elinks:INFO:	Disabling clock on downlink 0
07:30:00:elinks:INFO:	Disabling clock on downlink 1
07:30:00:elinks:INFO:	Disabling clock on downlink 2
07:30:00:elinks:INFO:	Disabling clock on downlink 3
07:30:00:elinks:INFO:	Disabling clock on downlink 4
07:30:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:30:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:30:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:30:00:elinks:INFO:	Disabling clock on downlink 0
07:30:00:elinks:INFO:	Disabling clock on downlink 1
07:30:00:elinks:INFO:	Disabling clock on downlink 2
07:30:00:elinks:INFO:	Disabling clock on downlink 3
07:30:00:elinks:INFO:	Disabling clock on downlink 4
07:30:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:30:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
07:30:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:30:00:setup_element:INFO:	Scanning clock phase
07:30:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:30:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:30:00:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
07:30:00:setup_element:INFO:	Eye window for uplink 16: _________________________________________________________________________XXXX___
Clock Delay: 34
07:30:00:setup_element:INFO:	Eye window for uplink 17: _________________________________________________________________________XXXX___
Clock Delay: 34
07:30:00:setup_element:INFO:	Eye window for uplink 18: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:30:00:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:30:00:setup_element:INFO:	Eye window for uplink 20: _______________________________________________________________________XXXXX____
Clock Delay: 33
07:30:00:setup_element:INFO:	Eye window for uplink 21: _______________________________________________________________________XXXXX____
Clock Delay: 33
07:30:00:setup_element:INFO:	Eye window for uplink 22: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:30:00:setup_element:INFO:	Eye window for uplink 23: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:30:00:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXX_____
Clock Delay: 32
07:30:00:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXX_____
Clock Delay: 32
07:30:00:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:30:00:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:30:00:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
07:30:00:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
07:30:00:setup_element:INFO:	Eye window for uplink 30: _________________________________________________________________________XXXXX__
Clock Delay: 35
07:30:00:setup_element:INFO:	Eye window for uplink 31: _________________________________________________________________________XXXXX__
Clock Delay: 35
07:30:00:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
07:30:00:setup_element:INFO:	Scanning data phases
07:30:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:30:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:30:06:setup_element:INFO:	Data phase scan results for group 0, downlink 2
07:30:06:setup_element:INFO:	Eye window for uplink 16: XXXX__________________________________XX
Data delay found: 20
07:30:06:setup_element:INFO:	Eye window for uplink 17: XX___________________________________XXX
Data delay found: 19
07:30:06:setup_element:INFO:	Eye window for uplink 18: XX___________________________________XXX
Data delay found: 19
07:30:06:setup_element:INFO:	Eye window for uplink 19: XX__________________________________XXXX
Data delay found: 18
07:30:06:setup_element:INFO:	Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
07:30:06:setup_element:INFO:	Eye window for uplink 21: X__________________________________XXXXX
Data delay found: 17
07:30:06:setup_element:INFO:	Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
07:30:06:setup_element:INFO:	Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
07:30:06:setup_element:INFO:	Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
07:30:06:setup_element:INFO:	Eye window for uplink 25: ________XXXX____________________________
Data delay found: 29
07:30:06:setup_element:INFO:	Eye window for uplink 26: ____________XXXXXX______________________
Data delay found: 34
07:30:06:setup_element:INFO:	Eye window for uplink 27: ______________XXXXXX____________________
Data delay found: 36
07:30:06:setup_element:INFO:	Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
07:30:06:setup_element:INFO:	Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
07:30:06:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXXX_________________
Data delay found: 39
07:30:06:setup_element:INFO:	Eye window for uplink 31: ________________XXXXX___________________
Data delay found: 38
07:30:06:setup_element:INFO:	Setting the data phase to 20 for uplink 16
07:30:06:setup_element:INFO:	Setting the data phase to 19 for uplink 17
07:30:06:setup_element:INFO:	Setting the data phase to 19 for uplink 18
07:30:06:setup_element:INFO:	Setting the data phase to 18 for uplink 19
07:30:06:setup_element:INFO:	Setting the data phase to 15 for uplink 20
07:30:06:setup_element:INFO:	Setting the data phase to 17 for uplink 21
07:30:06:setup_element:INFO:	Setting the data phase to 18 for uplink 22
07:30:06:setup_element:INFO:	Setting the data phase to 15 for uplink 23
07:30:06:setup_element:INFO:	Setting the data phase to 28 for uplink 24
07:30:06:setup_element:INFO:	Setting the data phase to 29 for uplink 25
07:30:06:setup_element:INFO:	Setting the data phase to 34 for uplink 26
07:30:06:setup_element:INFO:	Setting the data phase to 36 for uplink 27
07:30:06:setup_element:INFO:	Setting the data phase to 36 for uplink 28
07:30:06:setup_element:INFO:	Setting the data phase to 36 for uplink 29
07:30:06:setup_element:INFO:	Setting the data phase to 39 for uplink 30
07:30:06:setup_element:INFO:	Setting the data phase to 38 for uplink 31
07:30:06:setup_element:INFO:	Beginning SMX ASICs map scan
07:30:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:30:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:30:06:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
07:30:06:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
07:30:06:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:30:06:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:30:06:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:30:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:30:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:30:06:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:30:06:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:30:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:30:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:30:06:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:30:06:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:30:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:30:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:30:07:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:30:07:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:30:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:30:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:30:08:setup_element:INFO:	Performing Elink synchronization
07:30:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:30:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:30:08:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
07:30:08:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
07:30:08:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
07:30:08:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:30:09:febtest:INFO:	Init all SMX (CSA): 30
07:30:25:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:30:25:febtest:INFO:	23-00 | XA-000-09-004-019-017-012-11 |  31.4 | 1189.2
07:30:25:febtest:INFO:	30-01 | XA-000-09-004-019-005-012-01 |  34.6 | 1195.1
07:30:26:febtest:INFO:	21-02 | XA-000-09-004-037-003-009-14 |  31.4 | 1206.9
07:30:26:febtest:INFO:	28-03 | XA-000-09-004-019-002-012-09 |  40.9 | 1159.7
07:30:26:febtest:INFO:	19-04 | XA-000-09-004-019-014-013-03 |  50.4 | 1141.9
07:30:26:febtest:INFO:	26-05 | XA-000-09-004-019-002-011-09 |  44.1 | 1165.6
07:30:26:febtest:INFO:	17-06 | XA-000-09-004-019-002-014-09 |  44.1 | 1159.7
07:30:27:febtest:INFO:	24-07 | XA-000-09-004-019-014-012-03 |  44.1 | 1159.7
07:30:28:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:30:30:ST3_smx:INFO:	chip: 23-0 	 34.556970 C 	 1200.969315 mV
07:30:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:30:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:30:30:ST3_smx:INFO:		Electrons
07:30:30:ST3_smx:INFO:	# loops 0
07:30:31:ST3_smx:INFO:	# loops 1
07:30:33:ST3_smx:INFO:	# loops 2
07:30:35:ST3_smx:INFO:	Total # of broken channels: 0
07:30:35:ST3_smx:INFO:	List of broken channels: []
07:30:35:ST3_smx:INFO:	Total # of broken channels: 0
07:30:35:ST3_smx:INFO:	List of broken channels: []
07:30:37:ST3_smx:INFO:	chip: 30-1 	 34.556970 C 	 1206.851500 mV
07:30:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:30:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:30:37:ST3_smx:INFO:		Electrons
07:30:37:ST3_smx:INFO:	# loops 0
07:30:38:ST3_smx:INFO:	# loops 1
07:30:40:ST3_smx:INFO:	# loops 2
07:30:42:ST3_smx:INFO:	Total # of broken channels: 0
07:30:42:ST3_smx:INFO:	List of broken channels: []
07:30:42:ST3_smx:INFO:	Total # of broken channels: 0
07:30:42:ST3_smx:INFO:	List of broken channels: []
07:30:44:ST3_smx:INFO:	chip: 21-2 	 31.389742 C 	 1218.600960 mV
07:30:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:30:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:30:44:ST3_smx:INFO:		Electrons
07:30:44:ST3_smx:INFO:	# loops 0
07:30:45:ST3_smx:INFO:	# loops 1
07:30:47:ST3_smx:INFO:	# loops 2
07:30:49:ST3_smx:INFO:	Total # of broken channels: 0
07:30:49:ST3_smx:INFO:	List of broken channels: []
07:30:49:ST3_smx:INFO:	Total # of broken channels: 0
07:30:49:ST3_smx:INFO:	List of broken channels: []
07:30:51:ST3_smx:INFO:	chip: 28-3 	 44.073563 C 	 1171.483840 mV
07:30:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:30:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:30:51:ST3_smx:INFO:		Electrons
07:30:51:ST3_smx:INFO:	# loops 0
07:30:53:ST3_smx:INFO:	# loops 1
07:30:54:ST3_smx:INFO:	# loops 2
07:30:56:ST3_smx:INFO:	Total # of broken channels: 0
07:30:56:ST3_smx:INFO:	List of broken channels: []
07:30:56:ST3_smx:INFO:	Total # of broken channels: 0
07:30:56:ST3_smx:INFO:	List of broken channels: []
07:30:58:ST3_smx:INFO:	chip: 19-4 	 50.430383 C 	 1147.806000 mV
07:30:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:30:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:30:58:ST3_smx:INFO:		Electrons
07:30:58:ST3_smx:INFO:	# loops 0
07:31:00:ST3_smx:INFO:	# loops 1
07:31:01:ST3_smx:INFO:	# loops 2
07:31:03:ST3_smx:INFO:	Total # of broken channels: 0
07:31:03:ST3_smx:INFO:	List of broken channels: []
07:31:03:ST3_smx:INFO:	Total # of broken channels: 0
07:31:03:ST3_smx:INFO:	List of broken channels: []
07:31:05:ST3_smx:INFO:	chip: 26-5 	 44.073563 C 	 1183.292940 mV
07:31:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:31:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:31:05:ST3_smx:INFO:		Electrons
07:31:05:ST3_smx:INFO:	# loops 0
07:31:07:ST3_smx:INFO:	# loops 1
07:31:08:ST3_smx:INFO:	# loops 2
07:31:10:ST3_smx:INFO:	Total # of broken channels: 0
07:31:10:ST3_smx:INFO:	List of broken channels: []
07:31:10:ST3_smx:INFO:	Total # of broken channels: 0
07:31:10:ST3_smx:INFO:	List of broken channels: []
07:31:12:ST3_smx:INFO:	chip: 17-6 	 47.250730 C 	 1165.571835 mV
07:31:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:31:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:31:12:ST3_smx:INFO:		Electrons
07:31:12:ST3_smx:INFO:	# loops 0
07:31:14:ST3_smx:INFO:	# loops 1
07:31:15:ST3_smx:INFO:	# loops 2
07:31:17:ST3_smx:INFO:	Total # of broken channels: 0
07:31:17:ST3_smx:INFO:	List of broken channels: []
07:31:17:ST3_smx:INFO:	Total # of broken channels: 0
07:31:17:ST3_smx:INFO:	List of broken channels: []
07:31:19:ST3_smx:INFO:	chip: 24-7 	 47.250730 C 	 1171.483840 mV
07:31:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:31:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:31:19:ST3_smx:INFO:		Electrons
07:31:19:ST3_smx:INFO:	# loops 0
07:31:21:ST3_smx:INFO:	# loops 1
07:31:23:ST3_smx:INFO:	# loops 2
07:31:24:ST3_smx:INFO:	Total # of broken channels: 0
07:31:24:ST3_smx:INFO:	List of broken channels: []
07:31:24:ST3_smx:INFO:	Total # of broken channels: 0
07:31:24:ST3_smx:INFO:	List of broken channels: []
07:31:25:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:31:25:febtest:INFO:	23-00 | XA-000-09-004-019-017-012-11 |  34.6 | 1218.6
07:31:25:febtest:INFO:	30-01 | XA-000-09-004-019-005-012-01 |  37.7 | 1230.3
07:31:25:febtest:INFO:	21-02 | XA-000-09-004-037-003-009-14 |  34.6 | 1236.2
07:31:26:febtest:INFO:	28-03 | XA-000-09-004-019-002-012-09 |  44.1 | 1195.1
07:31:26:febtest:INFO:	19-04 | XA-000-09-004-019-014-013-03 |  53.6 | 1171.5
07:31:26:febtest:INFO:	26-05 | XA-000-09-004-019-002-011-09 |  44.1 | 1212.7
07:31:26:febtest:INFO:	17-06 | XA-000-09-004-019-002-014-09 |  47.3 | 1183.3
07:31:26:febtest:INFO:	24-07 | XA-000-09-004-019-014-012-03 |  47.3 | 1189.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_07_02-07_29_29
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4188| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	07233

MODULE_NAME:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M8UR1T1011221A2

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4990', '1.848', '2.7140']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9920', '1.850', '2.5720']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9570', '1.850', '0.5199']
Comment.txt