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FEB_4189 09.07.25 07:38:01
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07:38:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:38:01:ST3_Shared:INFO: FEB-Microcable
07:38:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:38:01:febtest:INFO: Testing FEB with SN 4189
07:38:03:smx_tester:INFO: Scanning setup
07:38:03:elinks:INFO: Disabling clock on downlink 0
07:38:03:elinks:INFO: Disabling clock on downlink 1
07:38:03:elinks:INFO: Disabling clock on downlink 2
07:38:03:elinks:INFO: Disabling clock on downlink 3
07:38:03:elinks:INFO: Disabling clock on downlink 4
07:38:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:38:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:38:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:38:03:elinks:INFO: Disabling clock on downlink 0
07:38:03:elinks:INFO: Disabling clock on downlink 1
07:38:03:elinks:INFO: Disabling clock on downlink 2
07:38:03:elinks:INFO: Disabling clock on downlink 3
07:38:03:elinks:INFO: Disabling clock on downlink 4
07:38:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:38:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:38:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:38:03:elinks:INFO: Disabling clock on downlink 0
07:38:03:elinks:INFO: Disabling clock on downlink 1
07:38:03:elinks:INFO: Disabling clock on downlink 2
07:38:03:elinks:INFO: Disabling clock on downlink 3
07:38:03:elinks:INFO: Disabling clock on downlink 4
07:38:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:38:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:38:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
07:38:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
07:38:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
07:38:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
07:38:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
07:38:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
07:38:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
07:38:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
07:38:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:38:03:elinks:INFO: Disabling clock on downlink 0
07:38:03:elinks:INFO: Disabling clock on downlink 1
07:38:03:elinks:INFO: Disabling clock on downlink 2
07:38:03:elinks:INFO: Disabling clock on downlink 3
07:38:03:elinks:INFO: Disabling clock on downlink 4
07:38:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:38:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:38:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:38:03:elinks:INFO: Disabling clock on downlink 0
07:38:03:elinks:INFO: Disabling clock on downlink 1
07:38:03:elinks:INFO: Disabling clock on downlink 2
07:38:03:elinks:INFO: Disabling clock on downlink 3
07:38:03:elinks:INFO: Disabling clock on downlink 4
07:38:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:38:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:38:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:38:04:setup_element:INFO: Scanning clock phase
07:38:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:38:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:38:04:setup_element:INFO: Clock phase scan results for group 0, downlink 2
07:38:04:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
07:38:04:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
07:38:04:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:38:04:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:38:04:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:38:04:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:38:04:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXX_____
Clock Delay: 32
07:38:04:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXX_____
Clock Delay: 32
07:38:04:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
07:38:04:setup_element:INFO: Scanning data phases
07:38:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:38:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:38:09:setup_element:INFO: Data phase scan results for group 0, downlink 2
07:38:09:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
07:38:09:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
07:38:09:setup_element:INFO: Eye window for uplink 26: ___________XXXXXXX______________________
Data delay found: 34
07:38:09:setup_element:INFO: Eye window for uplink 27: _____________XXXXXXX____________________
Data delay found: 36
07:38:09:setup_element:INFO: Eye window for uplink 28: _________________XXXXXX_________________
Data delay found: 39
07:38:09:setup_element:INFO: Eye window for uplink 29: _________________XXXXX__________________
Data delay found: 39
07:38:09:setup_element:INFO: Eye window for uplink 30: _________________XXXXXXX________________
Data delay found: 0
07:38:09:setup_element:INFO: Eye window for uplink 31: _________________XXXXX__________________
Data delay found: 39
07:38:09:setup_element:INFO: Setting the data phase to 30 for uplink 24
07:38:09:setup_element:INFO: Setting the data phase to 32 for uplink 25
07:38:09:setup_element:INFO: Setting the data phase to 34 for uplink 26
07:38:09:setup_element:INFO: Setting the data phase to 36 for uplink 27
07:38:09:setup_element:INFO: Setting the data phase to 39 for uplink 28
07:38:09:setup_element:INFO: Setting the data phase to 39 for uplink 29
07:38:09:setup_element:INFO: Setting the data phase to 0 for uplink 30
07:38:09:setup_element:INFO: Setting the data phase to 39 for uplink 31
07:38:09:setup_element:INFO: Beginning SMX ASICs map scan
07:38:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:38:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:38:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:38:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:38:09:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
07:38:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:38:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:38:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:38:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:38:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:38:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:38:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:38:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:38:12:setup_element:INFO: Performing Elink synchronization
07:38:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:38:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:38:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:38:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:38:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
07:38:12:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:38:12:febtest:INFO: Init all SMX (CSA): 30
07:38:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:38:19:febtest:INFO: 30-01 | XA-000-09-004-037-013-016-00 | 28.2 | 1189.2
07:38:20:febtest:INFO: 28-03 | XA-000-09-004-019-006-022-08 | 37.7 | 1153.7
07:38:20:febtest:INFO: 26-05 | XA-000-09-004-019-012-022-07 | 40.9 | 1141.9
07:38:20:febtest:INFO: 24-07 | XA-000-09-004-019-012-021-07 | 37.7 | 1153.7
07:38:21:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:38:23:ST3_smx:INFO: chip: 30-1 28.225000 C 1206.851500 mV
07:38:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:38:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:38:23:ST3_smx:INFO: Electrons
07:38:23:ST3_smx:INFO: # loops 0
07:38:25:ST3_smx:INFO: # loops 1
07:38:26:ST3_smx:INFO: # loops 2
07:38:28:ST3_smx:INFO: Total # of broken channels: 0
07:38:28:ST3_smx:INFO: List of broken channels: []
07:38:28:ST3_smx:INFO: Total # of broken channels: 0
07:38:28:ST3_smx:INFO: List of broken channels: []
07:38:30:ST3_smx:INFO: chip: 28-3 37.726682 C 1165.571835 mV
07:38:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:38:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:38:30:ST3_smx:INFO: Electrons
07:38:30:ST3_smx:INFO: # loops 0
07:38:31:ST3_smx:INFO: # loops 1
07:38:33:ST3_smx:INFO: # loops 2
07:38:34:ST3_smx:INFO: Total # of broken channels: 0
07:38:34:ST3_smx:INFO: List of broken channels: []
07:38:34:ST3_smx:INFO: Total # of broken channels: 0
07:38:34:ST3_smx:INFO: List of broken channels: []
07:38:36:ST3_smx:INFO: chip: 26-5 40.898880 C 1147.806000 mV
07:38:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:38:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:38:36:ST3_smx:INFO: Electrons
07:38:36:ST3_smx:INFO: # loops 0
07:38:38:ST3_smx:INFO: # loops 1
07:38:39:ST3_smx:INFO: # loops 2
07:38:41:ST3_smx:INFO: Total # of broken channels: 0
07:38:41:ST3_smx:INFO: List of broken channels: []
07:38:41:ST3_smx:INFO: Total # of broken channels: 0
07:38:41:ST3_smx:INFO: List of broken channels: []
07:38:42:ST3_smx:INFO: chip: 24-7 37.726682 C 1159.654860 mV
07:38:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:38:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:38:42:ST3_smx:INFO: Electrons
07:38:42:ST3_smx:INFO: # loops 0
07:38:44:ST3_smx:INFO: # loops 1
07:38:45:ST3_smx:INFO: # loops 2
07:38:47:ST3_smx:INFO: Total # of broken channels: 0
07:38:47:ST3_smx:INFO: List of broken channels: []
07:38:47:ST3_smx:INFO: Total # of broken channels: 0
07:38:47:ST3_smx:INFO: List of broken channels: []
07:38:47:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:38:48:febtest:INFO: 30-01 | XA-000-09-004-037-013-016-00 | 28.2 | 1224.5
07:38:48:febtest:INFO: 28-03 | XA-000-09-004-019-006-022-08 | 40.9 | 1195.1
07:38:48:febtest:INFO: 26-05 | XA-000-09-004-019-012-022-07 | 44.1 | 1171.5
07:38:48:febtest:INFO: 24-07 | XA-000-09-004-019-012-021-07 | 40.9 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_09-07_38_01
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4189| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '0.8304', '1.846', '1.3240']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0100', '1.850', '1.3030']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9959', '1.850', '0.2675']