
FEB_4194 07.07.25 14:33:17
TextEdit.txt
14:33:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:33:17:ST3_Shared:INFO: FEB-Microcable 14:33:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:33:17:febtest:INFO: Testing FEB with SN 4194 14:33:19:smx_tester:INFO: Scanning setup 14:33:19:elinks:INFO: Disabling clock on downlink 0 14:33:19:elinks:INFO: Disabling clock on downlink 1 14:33:19:elinks:INFO: Disabling clock on downlink 2 14:33:19:elinks:INFO: Disabling clock on downlink 3 14:33:19:elinks:INFO: Disabling clock on downlink 4 14:33:19:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:33:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:33:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:33:19:elinks:INFO: Disabling clock on downlink 0 14:33:19:elinks:INFO: Disabling clock on downlink 1 14:33:19:elinks:INFO: Disabling clock on downlink 2 14:33:19:elinks:INFO: Disabling clock on downlink 3 14:33:19:elinks:INFO: Disabling clock on downlink 4 14:33:19:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:33:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:33:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:33:19:elinks:INFO: Disabling clock on downlink 0 14:33:19:elinks:INFO: Disabling clock on downlink 1 14:33:19:elinks:INFO: Disabling clock on downlink 2 14:33:19:elinks:INFO: Disabling clock on downlink 3 14:33:19:elinks:INFO: Disabling clock on downlink 4 14:33:19:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:33:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 14:33:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 14:33:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:33:19:elinks:INFO: Disabling clock on downlink 0 14:33:19:elinks:INFO: Disabling clock on downlink 1 14:33:19:elinks:INFO: Disabling clock on downlink 2 14:33:19:elinks:INFO: Disabling clock on downlink 3 14:33:19:elinks:INFO: Disabling clock on downlink 4 14:33:19:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:33:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:33:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:33:19:elinks:INFO: Disabling clock on downlink 0 14:33:19:elinks:INFO: Disabling clock on downlink 1 14:33:19:elinks:INFO: Disabling clock on downlink 2 14:33:19:elinks:INFO: Disabling clock on downlink 3 14:33:19:elinks:INFO: Disabling clock on downlink 4 14:33:19:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:33:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:33:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:33:19:setup_element:INFO: Scanning clock phase 14:33:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:33:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:33:20:setup_element:INFO: Clock phase scan results for group 0, downlink 2 14:33:20:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXX__ Clock Delay: 34 14:33:20:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXX__ Clock Delay: 34 14:33:20:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXX___ Clock Delay: 34 14:33:20:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXX___ Clock Delay: 34 14:33:20:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXX___ Clock Delay: 33 14:33:20:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXX___ Clock Delay: 33 14:33:20:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXX___ Clock Delay: 33 14:33:20:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXX___ Clock Delay: 33 14:33:20:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____ Clock Delay: 33 14:33:20:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____ Clock Delay: 33 14:33:20:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____ Clock Delay: 33 14:33:20:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____ Clock Delay: 33 14:33:20:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___ Clock Delay: 34 14:33:20:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___ Clock Delay: 34 14:33:20:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXXX_ Clock Delay: 35 14:33:20:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXXX_ Clock Delay: 35 14:33:20:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2 14:33:20:setup_element:INFO: Scanning data phases 14:33:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:33:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:33:25:setup_element:INFO: Data phase scan results for group 0, downlink 2 14:33:25:setup_element:INFO: Eye window for uplink 16: XX__________________________________XXXX Data delay found: 18 14:33:25:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX Data delay found: 17 14:33:25:setup_element:INFO: Eye window for uplink 18: X___________________________________XXXX Data delay found: 18 14:33:25:setup_element:INFO: Eye window for uplink 19: XX__________________________________XXXX Data delay found: 18 14:33:25:setup_element:INFO: Eye window for uplink 20: _________________________________XXXXX__ Data delay found: 15 14:33:25:setup_element:INFO: Eye window for uplink 21: ___________________________________XXXX_ Data delay found: 16 14:33:25:setup_element:INFO: Eye window for uplink 22: X____________________________________XXX Data delay found: 18 14:33:25:setup_element:INFO: Eye window for uplink 23: __________________________________XXXX__ Data delay found: 15 14:33:25:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________ Data delay found: 28 14:33:25:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________ Data delay found: 30 14:33:25:setup_element:INFO: Eye window for uplink 26: ______XXXXXX____________________________ Data delay found: 28 14:33:25:setup_element:INFO: Eye window for uplink 27: _______XXXXXXX__________________________ Data delay found: 30 14:33:25:setup_element:INFO: Eye window for uplink 28: ______________XXXXXX____________________ Data delay found: 36 14:33:25:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________ Data delay found: 36 14:33:25:setup_element:INFO: Eye window for uplink 30: ________________XXXXXXX_________________ Data delay found: 39 14:33:25:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX___________________ Data delay found: 37 14:33:25:setup_element:INFO: Setting the data phase to 18 for uplink 16 14:33:25:setup_element:INFO: Setting the data phase to 17 for uplink 17 14:33:25:setup_element:INFO: Setting the data phase to 18 for uplink 18 14:33:25:setup_element:INFO: Setting the data phase to 18 for uplink 19 14:33:25:setup_element:INFO: Setting the data phase to 15 for uplink 20 14:33:25:setup_element:INFO: Setting the data phase to 16 for uplink 21 14:33:25:setup_element:INFO: Setting the data phase to 18 for uplink 22 14:33:25:setup_element:INFO: Setting the data phase to 15 for uplink 23 14:33:25:setup_element:INFO: Setting the data phase to 28 for uplink 24 14:33:25:setup_element:INFO: Setting the data phase to 30 for uplink 25 14:33:25:setup_element:INFO: Setting the data phase to 28 for uplink 26 14:33:25:setup_element:INFO: Setting the data phase to 30 for uplink 27 14:33:25:setup_element:INFO: Setting the data phase to 36 for uplink 28 14:33:25:setup_element:INFO: Setting the data phase to 36 for uplink 29 14:33:25:setup_element:INFO: Setting the data phase to 39 for uplink 30 14:33:25:setup_element:INFO: Setting the data phase to 37 for uplink 31 14:33:25:setup_element:INFO: Beginning SMX ASICs map scan 14:33:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:33:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:33:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:33:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:33:25:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 14:33:25:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 14:33:25:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 14:33:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 14:33:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 14:33:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 14:33:26:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 14:33:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 14:33:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 14:33:26:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 14:33:26:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 14:33:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 14:33:26:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 14:33:26:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 14:33:26:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 14:33:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 14:33:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 14:33:28:setup_element:INFO: Performing Elink synchronization 14:33:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:33:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:33:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:33:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:33:28:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 14:33:28:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 14:33:29:febtest:INFO: Init all SMX (CSA): 30 14:33:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:33:43:febtest:INFO: 23-00 | XA-000-09-004-037-004-013-06 | 34.6 | 1171.5 14:33:43:febtest:INFO: 30-01 | XA-000-09-004-037-007-013-08 | 31.4 | 1171.5 14:33:43:febtest:INFO: 21-02 | XA-000-09-004-037-016-015-12 | 18.7 | 1224.5 14:33:44:febtest:INFO: 28-03 | XA-000-09-004-037-004-014-06 | 31.4 | 1171.5 14:33:44:febtest:INFO: 19-04 | XA-000-09-004-037-013-013-07 | 28.2 | 1189.2 14:33:44:febtest:INFO: 26-05 | XA-000-09-004-037-013-015-07 | 25.1 | 1201.0 14:33:44:febtest:INFO: 17-06 | XA-000-09-004-037-007-014-08 | 44.1 | 1141.9 14:33:44:febtest:INFO: 24-07 | XA-000-09-004-037-010-013-15 | 37.7 | 1159.7 14:33:45:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 14:33:47:ST3_smx:INFO: chip: 23-0 34.556970 C 1183.292940 mV 14:33:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:33:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:33:47:ST3_smx:INFO: Electrons 14:33:47:ST3_smx:INFO: # loops 0 14:33:49:ST3_smx:INFO: # loops 1 14:33:51:ST3_smx:INFO: # loops 2 14:33:52:ST3_smx:INFO: Total # of broken channels: 0 14:33:52:ST3_smx:INFO: List of broken channels: [] 14:33:52:ST3_smx:INFO: Total # of broken channels: 0 14:33:52:ST3_smx:INFO: List of broken channels: [] 14:33:54:ST3_smx:INFO: chip: 30-1 31.389742 C 1189.190035 mV 14:33:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:33:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:33:54:ST3_smx:INFO: Electrons 14:33:54:ST3_smx:INFO: # loops 0 14:33:56:ST3_smx:INFO: # loops 1 14:33:57:ST3_smx:INFO: # loops 2 14:33:59:ST3_smx:INFO: Total # of broken channels: 0 14:33:59:ST3_smx:INFO: List of broken channels: [] 14:33:59:ST3_smx:INFO: Total # of broken channels: 0 14:33:59:ST3_smx:INFO: List of broken channels: [] 14:34:00:ST3_smx:INFO: chip: 21-2 18.745682 C 1236.187875 mV 14:34:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:34:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:34:00:ST3_smx:INFO: Electrons 14:34:00:ST3_smx:INFO: # loops 0 14:34:02:ST3_smx:INFO: # loops 1 14:34:03:ST3_smx:INFO: # loops 2 14:34:05:ST3_smx:INFO: Total # of broken channels: 0 14:34:05:ST3_smx:INFO: List of broken channels: [] 14:34:05:ST3_smx:INFO: Total # of broken channels: 0 14:34:05:ST3_smx:INFO: List of broken channels: [] 14:34:07:ST3_smx:INFO: chip: 28-3 31.389742 C 1183.292940 mV 14:34:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:34:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:34:07:ST3_smx:INFO: Electrons 14:34:07:ST3_smx:INFO: # loops 0 14:34:08:ST3_smx:INFO: # loops 1 14:34:10:ST3_smx:INFO: # loops 2 14:34:12:ST3_smx:INFO: Total # of broken channels: 0 14:34:12:ST3_smx:INFO: List of broken channels: [] 14:34:12:ST3_smx:INFO: Total # of broken channels: 11 14:34:12:ST3_smx:INFO: List of broken channels: [5, 7, 13, 15, 17, 19, 21, 23, 25, 29, 33] 14:34:13:ST3_smx:INFO: chip: 19-4 31.389742 C 1200.969315 mV 14:34:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:34:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:34:13:ST3_smx:INFO: Electrons 14:34:13:ST3_smx:INFO: # loops 0 14:34:15:ST3_smx:INFO: # loops 1 14:34:16:ST3_smx:INFO: # loops 2 14:34:18:ST3_smx:INFO: Total # of broken channels: 0 14:34:18:ST3_smx:INFO: List of broken channels: [] 14:34:18:ST3_smx:INFO: Total # of broken channels: 0 14:34:18:ST3_smx:INFO: List of broken channels: [] 14:34:20:ST3_smx:INFO: chip: 26-5 25.062742 C 1218.600960 mV 14:34:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:34:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:34:20:ST3_smx:INFO: Electrons 14:34:20:ST3_smx:INFO: # loops 0 14:34:21:ST3_smx:INFO: # loops 1 14:34:23:ST3_smx:INFO: # loops 2 14:34:24:ST3_smx:INFO: Total # of broken channels: 0 14:34:24:ST3_smx:INFO: List of broken channels: [] 14:34:24:ST3_smx:INFO: Total # of broken channels: 0 14:34:24:ST3_smx:INFO: List of broken channels: [] 14:34:26:ST3_smx:INFO: chip: 17-6 47.250730 C 1153.732915 mV 14:34:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:34:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:34:26:ST3_smx:INFO: Electrons 14:34:26:ST3_smx:INFO: # loops 0 14:34:27:ST3_smx:INFO: # loops 1 14:34:29:ST3_smx:INFO: # loops 2 14:34:31:ST3_smx:INFO: Total # of broken channels: 0 14:34:31:ST3_smx:INFO: List of broken channels: [] 14:34:31:ST3_smx:INFO: Total # of broken channels: 0 14:34:31:ST3_smx:INFO: List of broken channels: [] 14:34:32:ST3_smx:INFO: chip: 24-7 37.726682 C 1171.483840 mV 14:34:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:34:32:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:34:32:ST3_smx:INFO: Electrons 14:34:32:ST3_smx:INFO: # loops 0 14:34:34:ST3_smx:INFO: # loops 1 14:34:35:ST3_smx:INFO: # loops 2 14:34:37:ST3_smx:INFO: Total # of broken channels: 0 14:34:37:ST3_smx:INFO: List of broken channels: [] 14:34:37:ST3_smx:INFO: Total # of broken channels: 0 14:34:37:ST3_smx:INFO: List of broken channels: [] 14:34:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:34:38:febtest:INFO: 23-00 | XA-000-09-004-037-004-013-06 | 34.6 | 1201.0 14:34:38:febtest:INFO: 30-01 | XA-000-09-004-037-007-013-08 | 34.6 | 1206.9 14:34:38:febtest:INFO: 21-02 | XA-000-09-004-037-016-015-12 | 21.9 | 1259.6 14:34:38:febtest:INFO: 28-03 | XA-000-09-004-037-004-014-06 | 34.6 | 1206.9 14:34:38:febtest:INFO: 19-04 | XA-000-09-004-037-013-013-07 | 31.4 | 1224.5 14:34:39:febtest:INFO: 26-05 | XA-000-09-004-037-013-015-07 | 28.2 | 1242.0 14:34:39:febtest:INFO: 17-06 | XA-000-09-004-037-007-014-08 | 47.3 | 1177.4 14:34:39:febtest:INFO: 24-07 | XA-000-09-004-037-010-013-15 | 40.9 | 1189.2 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_07_07-14_33_17 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4194| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.6040', '1.849', '3.1730'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0060', '1.850', '2.5750'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9740', '1.850', '0.5211']